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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-16 10:37:40 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-16 10:37:40 +0000 |
| commit | 8a0ff15114ba3715ac24bf7e81dde790bc725c41 (patch) | |
| tree | 2c806464693103752d97a84e18cf6fcbb8577c0e /os/rt/ports/ARM/compilers | |
| parent | 005c5734247da57c4fe2b791a404375d35dd3278 (diff) | |
| download | ChibiOS-8a0ff15114ba3715ac24bf7e81dde790bc725c41.tar.gz ChibiOS-8a0ff15114ba3715ac24bf7e81dde790bc725c41.tar.bz2 ChibiOS-8a0ff15114ba3715ac24bf7e81dde790bc725c41.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7405 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/rt/ports/ARM/compilers')
| -rw-r--r-- | os/rt/ports/ARM/compilers/GCC/chcoreasm.s | 54 |
1 files changed, 21 insertions, 33 deletions
diff --git a/os/rt/ports/ARM/compilers/GCC/chcoreasm.s b/os/rt/ports/ARM/compilers/GCC/chcoreasm.s index 31d1a0037..d73f877ed 100644 --- a/os/rt/ports/ARM/compilers/GCC/chcoreasm.s +++ b/os/rt/ports/ARM/compilers/GCC/chcoreasm.s @@ -147,26 +147,6 @@ _port_switch_arm: * of a register holding the address of the ISR to be invoked, the ISR
* then returns in the common epilogue code where the context switch will
* be performed, if required.
- */
- .code 32
- .func
- .global Irq_Handler
-Irq_Handler:
- stmfd sp!, {r0-r3, r12, lr}
-#if defined(THUMB_NO_INTERWORKING)
- add r0, pc, #1
- bx r0
- .code 16
-#endif
- ldr r0, =ARM_IRQ_VECTOR_REG
- ldr r0, [r0]
- ldr lr, =_port_irq_common // ISR return point.
- bx r0 // Calling the ISR.
- .endfunc
-
-/*
- * Common exit point for all IRQ routines, it performs the rescheduling if
- * required.
* System stack frame structure after a context switch in the
* interrupt handler:
*
@@ -192,27 +172,35 @@ Irq_Handler: * Low +------------+
*/
.balign 16
-#if defined(THUMB_NO_INTERWORKING)
+ .code 32
+ .func
+ .global Irq_Handler
+Irq_Handler:
+ stmfd sp!, {r0-r3, r12, lr}
+ ldr r0, =ARM_IRQ_VECTOR_REG
+ ldr r0, [r0]
+#if !defined(THUMB_NO_INTERWORKING)
+ ldr lr, =_irq_ret_arm // ISR return point.
+ bx r0 // Calling the ISR.
+_irq_ret_arm:
+#else /* defined(THUMB_NO_INTERWORKING) */
+ add r0, pc, #1
+ bx r0
.code 16
- .thumb_func
- .globl _port_irq_common
-_port_irq_common:
- bl chSchIsPreemptionRequired
+ ldr lr, =_irq_ret_thumb // ISR return point.
+ bx r0 // Calling the ISR.
+_irq_ret_thumb:
mov lr, pc
bx lr
.code 32
-#else /* !defined(THUMB_NO_INTERWORKING) */
- .code 32
- .func
- .globl _port_irq_common
-_port_irq_common:
- bl chSchIsPreemptionRequired
-#endif /* !defined(THUMB_NO_INTERWORKING) */
+#endif /* defined(THUMB_NO_INTERWORKING) */
cmp r0, #0
ldmeq sp!, {r0-r3, r12, lr}
subeqs pc, lr, #4 // No reschedule, returns.
- // Saves the IRQ mode registers in the system stack.
+ // Now the frame is created in the system stack, the IRQ
+ // stack is empty.
+ msr CPSR_c, #MODE_SYS | I_BIT
stmfd sp!, {r0-r3, r12, lr}
msr CPSR_c, #MODE_IRQ | I_BIT
mrs r0, SPSR
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