git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3224 35acf78f-673a-0410-8e92-d51de3d6d3f4

15 files changed, 42 insertions, 47 deletions

diff --git a/os/ports/GCC/ARM/chcoreasm.s b/os/ports/GCC/ARM/chcoreasm.s
index 41bd29a90..2266d3f1a 100644
--- a/os/ports/GCC/ARM/chcoreasm.s
+++ b/os/ports/GCC/ARM/chcoreasm.s
@@ -143,12 +143,12 @@ _port_switch_arm:
  *      |     R0     |  |

  *      |     PC     |  |   (user code return address)

  *      |   PSR_USR  | -+   (user code status)

- *      |    ....    | <- mk_DoRescheduleI() stack frame, optimize it for space

+ *      |    ....    | <- chSchDoReschedule() stack frame, optimize it for space

  *      |     LR     | -+   (system code return address)

  *      |     R11    |  |

  *      |     R10    |  |

  *      |     R9     |  |

- *      |     R8     |  | Internal context: mk_SwitchI() frame

+ *      |     R8     |  | Internal context: chSysSwitch() frame

  *      |    (R7)    |  |   (optional, see CH_CURRP_REGISTER_CACHE)

  *      |     R6     |  |

  *      |     R5     |  |

@@ -161,7 +161,7 @@ _port_switch_arm:
 .thumb_func

 .globl _port_irq_common

 _port_irq_common:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         mov     lr, pc

         bx      lr

 .code 32

@@ -169,7 +169,7 @@ _port_irq_common:
 .code 32

 .globl _port_irq_common

 _port_irq_common:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

 #endif /* !THUMB_NO_INTERWORKING */

         cmp     r0, #0                          // Simply returns if a

         ldmeqfd sp!, {r0-r3, r12, lr}           // reschedule is not

@@ -190,12 +190,12 @@ _port_irq_common:
         add     r0, pc, #1

         bx      r0

 .code 16

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

         mov     lr, pc

         bx      lr

 .code 32

 #else /* !THUMB_NO_INTERWORKING */

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 #endif /* !THUMB_NO_INTERWORKING */

 

         // Re-establish the IRQ conditions again.

diff --git a/os/ports/GCC/ARMCMx/chcore.h b/os/ports/GCC/ARMCMx/chcore.h
index 5d47a6699..944094925 100644
--- a/os/ports/GCC/ARMCMx/chcore.h
+++ b/os/ports/GCC/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

diff --git a/os/ports/GCC/ARMCMx/chcore_v6m.c b/os/ports/GCC/ARMCMx/chcore_v6m.c
index 4ee3dca1a..453bc2c65 100644
--- a/os/ports/GCC/ARMCMx/chcore_v6m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v6m.c
@@ -90,12 +90,8 @@ __attribute__((naked))
 #endif

 void _port_switch_from_isr(void) {

 

-  /* The calls to the debug functions are required in order to simulate the

-     correct call protocol from this peculiar code zone.*/

-  dbg_check_lock();

-  if (chSchIsRescRequiredExI())

-    chSchDoRescheduleI();

-  dbg_check_unlock();

+  if (chSchIsPreemptionRequired())

+    chSchDoReschedule();

 #if CORTEX_ALTERNATE_SWITCH

   SCB_ICSR = ICSR_PENDSVSET;

   port_unlock();

diff --git a/os/ports/GCC/ARMCMx/chcore_v7m.c b/os/ports/GCC/ARMCMx/chcore_v7m.c
index 5f9be6f4d..e8a1ff16e 100644
--- a/os/ports/GCC/ARMCMx/chcore_v7m.c
+++ b/os/ports/GCC/ARMCMx/chcore_v7m.c
@@ -141,11 +141,9 @@ __attribute__((naked))
 #endif

 void _port_switch_from_isr(void) {

 

-  /* The calls to the debug functions are required in order to simulate the

-     correct call protocol from this peculiar code zone.*/

   dbg_check_lock();

-  if (chSchIsRescRequiredExI())

-    chSchDoRescheduleI();

+  if (chSchIsPreemptionRequired())

+    chSchDoReschedule();

   dbg_check_unlock();

 #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)

   asm volatile ("svc     #0");

diff --git a/os/ports/GCC/AVR/chcore.h b/os/ports/GCC/AVR/chcore.h
index 2d33b205d..757488948 100644
--- a/os/ports/GCC/AVR/chcore.h
+++ b/os/ports/GCC/AVR/chcore.h
@@ -215,8 +215,8 @@ struct context {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                           \

-  if (chSchIsRescRequiredExI())                                         \

-    chSchDoRescheduleI();                                               \

+  if (chSchIsPreemptionRequired())                                      \

+    chSchDoReschedule();                                                \

 }

 

 /**

diff --git a/os/ports/GCC/MSP430/chcore.h b/os/ports/GCC/MSP430/chcore.h
index 3e3d5b5d1..bac05608c 100644
--- a/os/ports/GCC/MSP430/chcore.h
+++ b/os/ports/GCC/MSP430/chcore.h
@@ -184,8 +184,8 @@ struct context {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                           \

-  if (chSchIsRescRequiredExI())                                         \

-    chSchDoRescheduleI();                                               \

+  if (chSchIsPreemptionRequired())                                      \

+    chSchDoReschedule();                                                \

 }

 

 /**

diff --git a/os/ports/GCC/PPC/SPC56x/ivor.s b/os/ports/GCC/PPC/SPC56x/ivor.s
index 660fab5ed..03bc8b002 100644
--- a/os/ports/GCC/PPC/SPC56x/ivor.s
+++ b/os/ports/GCC/PPC/SPC56x/ivor.s
@@ -73,10 +73,10 @@ IVOR10:
 

         /* System tick handler invocation.*/

         bl          chSysTimerHandlerI

-        bl          chSchIsRescRequiredExI

+        bl          chSchIsPreemptionRequired

         cmpli       cr0, %r3, 0

         beq         cr0, .ctxrestore

-        bl          chSchDoRescheduleI

+        bl          chSchDoReschedule

         b           .ctxrestore

 

         /*

@@ -138,10 +138,10 @@ IVOR4:
         stw         %r3, 0(%r3)             /* Writing any value should do. */

 

         /* Verifies if a reschedule is required.*/

-        bl          chSchIsRescRequiredExI

+        bl          chSchIsPreemptionRequired

         cmpli       cr0, %r3, 0

         beq         cr0, .ctxrestore

-        bl          chSchDoRescheduleI

+        bl          chSchDoReschedule

 

         /* Context restore.*/

 .ctxrestore:

diff --git a/os/ports/IAR/ARMCMx/chcore.h b/os/ports/IAR/ARMCMx/chcore.h
index 5eff85f51..c3e91cc02 100644
--- a/os/ports/IAR/ARMCMx/chcore.h
+++ b/os/ports/IAR/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
index a05ce3aa1..6f6aebcaf 100644
--- a/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
+++ b/os/ports/IAR/ARMCMx/chcoreasm_v6m.s
@@ -37,8 +37,8 @@ SCB_ICSR        SET     0xE000ED04
         SECTION .text:CODE:NOROOT(2)

 

         EXTERN  chThdExit

-        EXTERN  chSchIsRescRequiredExI

-        EXTERN  chSchDoRescheduleI

+        EXTERN  chSchIsPreemptionRequired

+        EXTERN  chSchDoReschedule

 

         THUMB

 

@@ -110,10 +110,10 @@ PendSVVector:
  */

         PUBLIC  _port_switch_from_isr

 _port_switch_from_isr:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         cmp     r0, #0

         beq     noresch

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 noresch:

         ldr     r2, =SCB_ICSR

         movs    r3, #128

diff --git a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
index 8367fcdb0..a9318f991 100644
--- a/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
+++ b/os/ports/IAR/ARMCMx/chcoreasm_v7m.s
@@ -39,8 +39,8 @@ ICSR_PENDSVSET  SET 0x10000000
         SECTION .text:CODE:NOROOT(2)

 

         EXTERN  chThdExit

-        EXTERN  chSchIsRescRequiredExI

-        EXTERN  chSchDoRescheduleI

+        EXTERN  chSchIsPreemptionRequired

+        EXTERN  chSchDoReschedule

 

         THUMB

 

@@ -76,9 +76,9 @@ _port_thread_start:
  */

         PUBLIC  _port_switch_from_isr

 _port_switch_from_isr:

-        bl      chSchIsRescRequiredExI

+        bl      chSchIsPreemptionRequired

         cbz     r0, .L2

-        bl      chSchDoRescheduleI

+        bl      chSchDoReschedule

 .L2:

 #if CORTEX_SIMPLIFIED_PRIORITY

         mov     r3, #LWRD SCB_ICSR

diff --git a/os/ports/RC/STM8/chcore.h b/os/ports/RC/STM8/chcore.h
index 07b7fa0b6..e889cf1d0 100644
--- a/os/ports/RC/STM8/chcore.h
+++ b/os/ports/RC/STM8/chcore.h
@@ -206,8 +206,8 @@ struct stm8_startctx {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                               \

-  if (chSchIsRescRequiredExI())                                             \

-    chSchDoRescheduleI();                                                   \

+  if (chSchIsPreemptionRequired())                                          \

+    chSchDoReschedule();                                                    \

 }

 

 /**

diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h
index 42b397e93..7c4e82613 100644
--- a/os/ports/RVCT/ARMCMx/chcore.h
+++ b/os/ports/RVCT/ARMCMx/chcore.h
@@ -116,7 +116,7 @@
  *          separate interrupt stack and the stack space between @p intctx and

  *          @p extctx is known to be zero.

  * @note    In this port it is conservatively set to 16 because the function

- *          @p chSchDoRescheduleI() can have a stack frame, expecially with

+ *          @p chSchDoReschedule() can have a stack frame, expecially with

  *          compiler optimizations disabled.

  */

 #ifndef PORT_INT_REQUIRED_STACK

@@ -227,6 +227,7 @@ struct intctx {
 

 /**

  * @brief   Platform dependent part of the @p Thread structure.

+

  * @details In this port the structure just holds a pointer to the @p intctx

  *          structure representing the stack pointer at context switch time.

  */

diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
index 579680421..cf67d82c2 100644
--- a/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
+++ b/os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
@@ -34,8 +34,8 @@ SCB_ICSR        EQU     0xE000ED04
                 AREA    |.text|, CODE, READONLY

 

                 IMPORT  chThdExit

-                IMPORT  chSchIsRescRequiredExI

-                IMPORT  chSchDoRescheduleI

+                IMPORT  chSchIsPreemptionRequired

+                IMPORT  chSchDoReschedule

 

 /*

  * Performs a context switch between two threads.

@@ -109,10 +109,10 @@ PendSVVector       PROC
  */

                 EXPORT  _port_switch_from_isr

 _port_switch_from_isr PROC

-                bl      chSchIsRescRequiredExI

+                bl      chSchIsPreemptionRequired

                 cmp     r0, #0

                 beq     noresch

-                bl      chSchDoRescheduleI

+                bl      chSchDoReschedule

 noresch

                 ldr     r2, =SCB_ICSR

                 movs    r3, #128

diff --git a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
index f6acf2968..db2c747ca 100644
--- a/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
+++ b/os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
@@ -36,8 +36,8 @@ ICSR_PENDSVSET  EQU     0x10000000
                 AREA    |.text|, CODE, READONLY

 

                 IMPORT  chThdExit

-                IMPORT  chSchIsRescRequiredExI

-                IMPORT  chSchDoRescheduleI

+                IMPORT  chSchIsPreemptionRequired

+                IMPORT  chSchDoReschedule

 

 /*

  * Performs a context switch between two threads.

@@ -73,9 +73,9 @@ _port_thread_start PROC
  */

                 EXPORT  _port_switch_from_isr

 _port_switch_from_isr PROC

-                bl      chSchIsRescRequiredExI

+                bl      chSchIsPreemptionRequired

                 cbz     r0, noreschedule

-                bl      chSchDoRescheduleI

+                bl      chSchDoReschedule

 noreschedule

 #if CORTEX_SIMPLIFIED_PRIORITY

                 mov     r3, #SCB_ICSR :AND: 0xFFFF

diff --git a/os/ports/cosmic/STM8/chcore.h b/os/ports/cosmic/STM8/chcore.h
index 93a4c24f0..75bed68cc 100644
--- a/os/ports/cosmic/STM8/chcore.h
+++ b/os/ports/cosmic/STM8/chcore.h
@@ -203,8 +203,8 @@ struct stm8_startctx {
  *          enabled to invoke system APIs.

  */

 #define PORT_IRQ_EPILOGUE() {                                               \

-  if (chSchIsRescRequiredExI())                                             \

-    chSchDoRescheduleI();                                                   \

+  if (chSchIsPreemptionRequired())                                          \

+    chSchDoReschedule();                                                    \

 }

 

 /**