git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2024 35acf78f-673a-0410-8e92-d51de3d6d3f4

7 files changed, 33 insertions, 22 deletions

diff --git a/os/ports/GCC/ARM7/port.dox b/os/ports/GCC/ARM7/port.dox
index 7f61bbf63..b70d230e7 100644
--- a/os/ports/GCC/ARM7/port.dox
+++ b/os/ports/GCC/ARM7/port.dox
@@ -18,12 +18,11 @@
 */

 

 /**

- * @defgroup ARM7 ARM7TDMI

- * @details The ARM7 architecture is quite complex for a microcontroller and

- * some explanations are required about the port choices.

+ * @defgroup ARM7 ARM7

+ * @details ARM7 port for the GCC compiler.

  *

- * @section ARM7_NOTES The ARM7 modes

- * The ARM7 port supports three modes:

+ * @section ARM7_NOTES Supported ARM7 modes

+ * The ARM7-GCC port supports three modes:

  * - Pure ARM mode, this is the preferred mode for code speed. The code size

  *   is larger however. This mode is enabled when all the modules are compiled

  *   in ARM mode, see the Makefiles.

@@ -118,7 +117,7 @@
  * greatly improves code efficiency and size. You can look at the serial

  * driver for real examples of interrupt handlers.

  *

- * @ingroup ports

+ * @ingroup gcc

  */

 

 /**

diff --git a/os/ports/GCC/ARMCMx/port.dox b/os/ports/GCC/ARMCMx/port.dox
index 5cef7ea98..3b60e6fc6 100644
--- a/os/ports/GCC/ARMCMx/port.dox
+++ b/os/ports/GCC/ARMCMx/port.dox
@@ -19,8 +19,11 @@
 

 /**

  * @defgroup ARMCMx ARM Cortex-Mx

- * @details This port supports the ARMv6-M and ARMv7-M architectures (all the

- * Cortex-Mx cores).

+ * @details ARM Cortex-Mx port for the GCC compiler.

+ 

+ * @section ARMCMx_INTRO

+ * This port supports all the cores implementing the ARMv6-M and ARMv7-M

+ * architectures.

  *

  * @section ARMCMx_STATES_A System logical states in ARMv6-M

  * - <b>Init</b>. This state is represented by the startup code and the

@@ -102,7 +105,7 @@
  * - The threads are started in thread-privileged mode.

  * - Interrupt nesting and the other advanced core/NVIC features are supported.

  * .

- * @ingroup ports

+ * @ingroup gcc

  */

 

 /**

diff --git a/os/ports/GCC/AVR/port.dox b/os/ports/GCC/AVR/port.dox
index 512d7f2e5..d5bf64f99 100644
--- a/os/ports/GCC/AVR/port.dox
+++ b/os/ports/GCC/AVR/port.dox
@@ -19,8 +19,7 @@
 

 /**

  * @defgroup AVR MegaAVR

- * @details AVR port details. This section how the ChibiOS/RT features are

- * implemented on this architecture.

+ * @details AVR port for the GCC compiler.

  *

  * @section AVR_STATES Mapping of the System States in the AVR port

  * The ChibiOS/RT logical @ref system_states are mapped as follow in the AVR

@@ -50,7 +49,7 @@
  *   by modifying the @p INT_REQUIRED_STACK macro into

  *   <b>./ports/AVR/chcore.h</b>.

  * .

- * @ingroup ports

+ * @ingroup gcc

  */

 

 /**

diff --git a/os/ports/GCC/MSP430/port.dox b/os/ports/GCC/MSP430/port.dox
index c68ac48bc..721540baf 100644
--- a/os/ports/GCC/MSP430/port.dox
+++ b/os/ports/GCC/MSP430/port.dox
@@ -19,8 +19,7 @@
 

 /**

  * @defgroup MSP430 MSP430

- * @details MSP430 port details. This section how the ChibiOS/RT features are

- * implemented on this architecture.

+ * @details MSP430 port for the GCC compiler.

  *

  * @section MSP430_STATES Mapping of the System States in the MSP430 port

  * The ChibiOS/RT logical @ref system_states are mapped as follow in the MSP430

@@ -56,7 +55,7 @@
  *   select the proper low power mode for you application by defining the

  *   macro @p port_wait_for_interrupt().

  * .

- * @ingroup ports

+ * @ingroup gcc

  */

 

 /**

diff --git a/os/ports/GCC/PPC/port.dox b/os/ports/GCC/PPC/port.dox
index e020387f9..6295641b6 100644
--- a/os/ports/GCC/PPC/port.dox
+++ b/os/ports/GCC/PPC/port.dox
@@ -18,9 +18,8 @@
 */

 

 /**

- * @defgroup PPC PowerPC

- * @details PowerPC port details. This section describes how the ChibiOS/RT

- * features are implemented on this architecture.

+ * @defgroup PPC Power Architecture

+ * @details Power Architecture port for the GCC compiler.

  *

  * @section PPC_STATES Mapping of the System States in the PowerPC port

  * The ChibiOS/RT logical @ref system_states are mapped as follow in the

@@ -53,7 +52,7 @@
  * - The Book-E Decrementer Timer, mapped on IVOR10, is used for system tick.

  * - Interrupt nesting is not currently supported.

  * .

- * @ingroup ports

+ * @ingroup gcc

  */

 

 /**

diff --git a/os/ports/RC/STM8/port.dox b/os/ports/RC/STM8/port.dox
index 3c2e812a8..66f88c427 100644
--- a/os/ports/RC/STM8/port.dox
+++ b/os/ports/RC/STM8/port.dox
@@ -19,8 +19,7 @@
 

 /**

  * @defgroup STM8 STM8

- * @details STM8 port details. This section how the ChibiOS/RT features are

- * implemented on this architecture.

+ * @details STM8 port for the Raisonance C compiler.

  *

  * @section STM8_STATES Mapping of the System States in the STM8 port

  * The ChibiOS/RT logical @ref system_states are mapped as follow in the STM8

@@ -58,7 +57,7 @@
  *   because the missing support of the @p inline "C" keyword in the

  *   compiler.

  * .

- * @ingroup ports

+ * @ingroup raisonance

  */

 

 /**

diff --git a/os/ports/ports.dox b/os/ports/ports.dox
index 393d787be..e47c390fe 100644
--- a/os/ports/ports.dox
+++ b/os/ports/ports.dox
@@ -23,3 +23,16 @@
  * ChibiOS/RT ports.

  */

 

+/**

+ * @defgroup gcc GCC Ports

+ * Ports for the GCC compiler or derivatives.

+ *

+ * @ingroup ports

+ */

+

+/**

+ * @defgroup raisonance Raisonance Ports

+ * Ports for the Raisonance compiler or derivatives.

+ *

+ * @ingroup ports

+ */