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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-05-24 18:31:34 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2012-05-24 18:31:34 +0000 |
commit | 7a6a1679a413987ffa47f2f9892e241f3448f5f0 (patch) | |
tree | 88c38d7e249eeedc7b51979486262a0c7619bc0e /os/ports/RVCT | |
parent | 293eddc33f8957f1bb896ef074bb56bf2ec2f895 (diff) | |
download | ChibiOS-7a6a1679a413987ffa47f2f9892e241f3448f5f0.tar.gz ChibiOS-7a6a1679a413987ffa47f2f9892e241f3448f5f0.tar.bz2 ChibiOS-7a6a1679a413987ffa47f2f9892e241f3448f5f0.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4232 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/RVCT')
-rw-r--r-- | os/ports/RVCT/ARMCMx/chcore.h | 8 | ||||
-rw-r--r-- | os/ports/RVCT/ARMCMx/chcore_v6m.h | 9 | ||||
-rw-r--r-- | os/ports/RVCT/ARMCMx/chcore_v7m.h | 13 |
3 files changed, 26 insertions, 4 deletions
diff --git a/os/ports/RVCT/ARMCMx/chcore.h b/os/ports/RVCT/ARMCMx/chcore.h index 950cc571f..ef3bc623c 100644 --- a/os/ports/RVCT/ARMCMx/chcore.h +++ b/os/ports/RVCT/ARMCMx/chcore.h @@ -87,6 +87,12 @@ (((n) >= 0) && ((n) < CORTEX_PRIORITY_LEVELS))
/**
+ * @brief Priority level verification macro.
+ */
+#define CORTEX_IS_VALID_KERNEL_PRIORITY(n) \
+ (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
+
+/**
* @brief Priority level to priority mask conversion macro.
*/
#define CORTEX_PRIORITY_MASK(n) \
@@ -169,7 +175,7 @@ struct intctx {}; */
#define chSchIsPreemptionRequired() \
(currp->p_preempt ? firstprio(&rlist.r_queue) > currp->p_prio : \
- firstprio(&rlist.r_queue) >= currp->p_prio)
+ firstprio(&rlist.r_queue) >= currp->p_prio)
#else /* CH_TIME_QUANTUM == 0 */
#define chSchIsPreemptionRequired() \
(firstprio(&rlist.r_queue) > currp->p_prio)
diff --git a/os/ports/RVCT/ARMCMx/chcore_v6m.h b/os/ports/RVCT/ARMCMx/chcore_v6m.h index e659912ee..685eddaef 100644 --- a/os/ports/RVCT/ARMCMx/chcore_v6m.h +++ b/os/ports/RVCT/ARMCMx/chcore_v6m.h @@ -107,6 +107,15 @@ /* Port derived parameters. */
/*===========================================================================*/
+/**
+ * @brief Maximum usable priority for normal ISRs.
+ */
+#if CORTEX_ALTERNATE_SWITCH || defined(__DOXYGEN__)
+#define CORTEX_MAX_KERNEL_PRIORITY 1
+#else
+#define CORTEX_MAX_KERNEL_PRIORITY 0
+#endif
+
/*===========================================================================*/
/* Port exported info. */
/*===========================================================================*/
diff --git a/os/ports/RVCT/ARMCMx/chcore_v7m.h b/os/ports/RVCT/ARMCMx/chcore_v7m.h index c31bbcffe..8ff4f630f 100644 --- a/os/ports/RVCT/ARMCMx/chcore_v7m.h +++ b/os/ports/RVCT/ARMCMx/chcore_v7m.h @@ -129,7 +129,7 @@ * @brief NVIC VTOR initialization expression.
*/
#if !defined(CORTEX_VTOR_INIT) || defined(__DOXYGEN__)
-#define CORTEX_VTOR_INIT 0x00000000
+#define CORTEX_VTOR_INIT 0x00000000
#endif
/**
@@ -145,14 +145,21 @@ /* Port derived parameters. */
/*===========================================================================*/
+#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
+/**
+ * @brief Maximum usable priority for normal ISRs.
+ */
+#define CORTEX_MAX_KERNEL_PRIORITY (CORTEX_PRIORITY_SVCALL + 1)
+
/**
* @brief BASEPRI level within kernel lock.
* @note In compact kernel mode this constant value is enforced to zero.
*/
-#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
#define CORTEX_BASEPRI_KERNEL \
- CORTEX_PRIORITY_MASK(CORTEX_PRIORITY_SVCALL+1)
+ CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
#else
+
+#define CORTEX_MAX_KERNEL_PRIORITY 1
#define CORTEX_BASEPRI_KERNEL 0
#endif
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