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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-08-20 12:53:46 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2009-08-20 12:53:46 +0000
commit0b8f1183fe1f321fdd71e9d1fc5a28323f9036a7 (patch)
treeee7377804987aca48f47113819ae0e374327d643 /os/ports/GCC/ARM7/crt0.lst
parent6c11580166f3b6cdb32b3c0d02d34d911dbc2f13 (diff)
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1090 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/ports/GCC/ARM7/crt0.lst')
-rw-r--r--os/ports/GCC/ARM7/crt0.lst451
1 files changed, 233 insertions, 218 deletions
diff --git a/os/ports/GCC/ARM7/crt0.lst b/os/ports/GCC/ARM7/crt0.lst
index eed22b391..5fa605d14 100644
--- a/os/ports/GCC/ARM7/crt0.lst
+++ b/os/ports/GCC/ARM7/crt0.lst
@@ -1,218 +1,233 @@
-GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 1
-
-
- 1 # 1 "../../os/ports/GCC/ARM7/crt0.s"
- 2 # 1 "<built-in>"
- 1 /*
- 0
- 0
- 2 ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
- 3
- 4 This file is part of ChibiOS/RT.
- 5
- 6 ChibiOS/RT is free software; you can redistribute it and/or modify
- 7 it under the terms of the GNU General Public License as published by
- 8 the Free Software Foundation; either version 3 of the License, or
- 9 (at your option) any later version.
- 10
- 11 ChibiOS/RT is distributed in the hope that it will be useful,
- 12 but WITHOUT ANY WARRANTY; without even the implied warranty of
- 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- 14 GNU General Public License for more details.
- 15
- 16 You should have received a copy of the GNU General Public License
- 17 along with this program. If not, see <http://www.gnu.org/licenses/>.
- 18 */
- 19
- 20 /**
- 21 * @file ports/ARM7/crt0.s
- 22 * @brief Generic ARM7 startup file for ChibiOS/RT.
- 23 * @addtogroup ARM7_CORE
- 24 * @{
- 25 */
- 26 /** @cond never */
- 27
- 28 .set MODE_USR, 0x10
- 29 .set MODE_FIQ, 0x11
- 30 .set MODE_IRQ, 0x12
- 31 .set MODE_SVC, 0x13
- 32 .set MODE_ABT, 0x17
- 33 .set MODE_UND, 0x1B
- 34 .set MODE_SYS, 0x1F
- 35
- 36 .equ I_BIT, 0x80
- 37 .equ F_BIT, 0x40
- 38
- 39 .text
- 40 .code 32
- 41 .balign 4
- 42
- 43 /*
- 44 * Reset handler.
- 45 */
- 46 .global ResetHandler
- 47 ResetHandler:
- 48 /*
- 49 * Stack pointers initialization.
- 50 */
- 51 ldr r0, =__ram_end__
- 52 /* Undefined */
- 53 msr CPSR_c, #MODE_UND | I_BIT | F_BIT
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 2
-
-
- 54 ???? 1040 0000 mov sp, r0
- 55 ldr r1, =__und_stack_size__
- 56 ???? 0080 sub r0, r0, r1
- 57 /* Abort */
- 58 msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
- 59 ???? 1040 0000 mov sp, r0
- 60 ldr r1, =__abt_stack_size__
- 61 ???? 0080 sub r0, r0, r1
- 62 /* FIQ */
- 63 msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
- 64 ???? 1040 0000 mov sp, r0
- 65 ldr r1, =__fiq_stack_size__
- 66 ???? 0080 sub r0, r0, r1
- 67 /* IRQ */
- 68 msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
- 69 ???? 1040 0000 mov sp, r0
- 70 ldr r1, =__irq_stack_size__
- 71 ???? 0080 sub r0, r0, r1
- 72 /* Supervisor */
- 73 msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
- 74 ???? 1040 0000 mov sp, r0
- 75 ldr r1, =__svc_stack_size__
- 76 ???? 0080 sub r0, r0, r1
- 77 /* System */
- 78 msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
- 79 ???? 1040 0000 mov sp, r0
- 80 // ldr r1, =__sys_stack_size__
- 81 // sub r0, r0, r1
- 82 /*
- 83 * Early initialization.
- 84 */
- 85 #ifndef THUMB_NO_INTERWORKING
- 86 bl hwinit0
- 87 #else
- 88 add r0, pc, #1
- 89 bx r0
- 90 .code 16
- 91 bl hwinit0
- 92 mov r0, pc
- 93 bx r0
- 94 .code 32
- 95 #endif
- 96 /*
- 97 * Data initialization.
- 98 * NOTE: It assumes that the DATA size is a multiple of 4.
- 99 */
- 100 ldr r1, =_textdata
- 101 ldr r2, =_data
- 102 ldr r3, =_edata
- 103 dataloop:
- 104 ???? 0392 cmp r2, r3
- 105 ldrlo r0, [r1], #4
- 106 strlo r0, [r2], #4
- 107 blo dataloop
- 108 /*
- 109 * BSS initialization.
- 110 * NOTE: It assumes that the BSS size is a multiple of 4.
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 3
-
-
- 111 */
- 112 ???? 0340 mov r0, #0
- 113 ldr r1, =_bss_start
- 114 ldr r2, =_bss_end
- 115 bssloop:
- 116 ???? 0291 cmp r1, r2
- 117 strlo r0, [r1], #4
- 118 blo bssloop
- 119 /*
- 120 * Late initialization.
- 121 */
- 122 #ifdef THUMB_NO_INTERWORKING
- 123 add r0, pc, #1
- 124 bx r0
- 125 .code 16
- 126 bl hwinit1
- 127 mov r0, #0
- 128 mov r1, r0
- 129 bl main
- 130 ldr r1, =MainExitHandler
- 131 bx r1
- 132 .code 32
- 133 #else
- 134 bl hwinit1
- 135 ???? 0340 mov r0, #0
- 136 ???? 0041 mov r1, r0
- 137 bl main
- 138 b MainExitHandler
- 139 #endif
- 140
- 141 /*
- 142 * Default main function exit handler.
- 143 */
- 144 .weak MainExitHandler
- 145 .globl MainExitHandler
- 146 MainExitHandler:
- 147
- 148 .loop: b .loop
- 149
- 150 /*
- 151 * Default early initialization code. It is declared weak in order to be
- 152 * replaced by the real initialization code.
- 153 * Early initialization is performed just after reset before BSS and DATA
- 154 * segments initialization.
- 155 */
- 156 #ifdef THUMB_NO_INTERWORKING
- 157 .thumb_func
- 158 .code 16
- 159 #endif
- 160 .weak hwinit0
- 161 hwinit0:
- 162 bx lr
- 163 .code 32
- 164
- 165 /*
- 166 * Default late initialization code. It is declared weak in order to be
- 167 * replaced by the real initialization code.
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 4
-
-
- 168 * Late initialization is performed after BSS and DATA segments initialization
- 169 * and before invoking the main() function.
- 170 */
- 171 #ifdef THUMB_NO_INTERWORKING
- 172 .thumb_func
- 173 .code 16
- 174 #endif
- 175 .weak hwinit1
- 176 hwinit1:
- 177 bx lr
- 178 .code 32
- GAS LISTING /cygdrive/c/DOCUME~1/Giovanni/IMPOST~1/Temp/ccgRWKd6.s page 5
-
-
-DEFINED SYMBOLS
- *ABS*:00000000 ../../os/ports/GCC/ARM7/crt0.s
-../../os/ports/GCC/ARM7/crt0.s:28 *ABS*:00000010 MODE_USR
-../../os/ports/GCC/ARM7/crt0.s:29 *ABS*:00000011 MODE_FIQ
-../../os/ports/GCC/ARM7/crt0.s:30 *ABS*:00000012 MODE_IRQ
-../../os/ports/GCC/ARM7/crt0.s:31 *ABS*:00000013 MODE_SVC
-../../os/ports/GCC/ARM7/crt0.s:32 *ABS*:00000017 MODE_ABT
-../../os/ports/GCC/ARM7/crt0.s:33 *ABS*:0000001b MODE_UND
-../../os/ports/GCC/ARM7/crt0.s:34 *ABS*:0000001f MODE_SYS
-../../os/ports/GCC/ARM7/crt0.s:36 *ABS*:00000080 I_BIT
-../../os/ports/GCC/ARM7/crt0.s:37 *ABS*:00000040 F_BIT
-../../os/ports/GCC/ARM7/crt0.s:47 .text:00000000 ResetHandler
-../../os/ports/GCC/ARM7/crt0.s:103 .text:00000000 dataloop
-../../os/ports/GCC/ARM7/crt0.s:115 .text:00000000 bssloop
-../../os/ports/GCC/ARM7/crt0.s:146 .text:00000000 MainExitHandler
-../../os/ports/GCC/ARM7/crt0.s:148 .text:00000000 .loop
-../../os/ports/GCC/ARM7/crt0.s:161 .text:00000000 hwinit0
-../../os/ports/GCC/ARM7/crt0.s:176 .text:00000000 hwinit1
-
-UNDEFINED SYMBOLS
-sp
+ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 1
+
+
+ 1 # 1 "../../os/ports/GCC/ARM7/crt0.s"
+ 1 /*
+ 0
+ 0
+ 2 ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+ 3
+ 4 This file is part of ChibiOS/RT.
+ 5
+ 6 ChibiOS/RT is free software; you can redistribute it and/or modify
+ 7 it under the terms of the GNU General Public License as published by
+ 8 the Free Software Foundation; either version 3 of the License, or
+ 9 (at your option) any later version.
+ 10
+ 11 ChibiOS/RT is distributed in the hope that it will be useful,
+ 12 but WITHOUT ANY WARRANTY; without even the implied warranty of
+ 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ 14 GNU General Public License for more details.
+ 15
+ 16 You should have received a copy of the GNU General Public License
+ 17 along with this program. If not, see <http://www.gnu.org/licenses/>.
+ 18 */
+ 19
+ 20 /**
+ 21 * @file ARM7/crt0.s
+ 22 * @brief Generic ARM7 startup file for ChibiOS/RT.
+ 23 * @addtogroup ARM7_CORE
+ 24 * @{
+ 25 */
+ 26 /** @cond never */
+ 27
+ 28 .set MODE_USR, 0x10
+ 29 .set MODE_FIQ, 0x11
+ 30 .set MODE_IRQ, 0x12
+ 31 .set MODE_SVC, 0x13
+ 32 .set MODE_ABT, 0x17
+ 33 .set MODE_UND, 0x1B
+ 34 .set MODE_SYS, 0x1F
+ 35
+ 36 .equ I_BIT, 0x80
+ 37 .equ F_BIT, 0x40
+ 38
+ 39 .text
+ 40 .code 32
+ 41 .balign 4
+ 42
+ 43 /*
+ 44 * Reset handler.
+ 45 */
+ 46 .global ResetHandler
+ 47 ResetHandler:
+ 48 /*
+ 49 * Stack pointers initialization.
+ 50 */
+ 51 0000 AC009FE5 ldr r0, =__ram_end__
+ 52 /* Undefined */
+ 53 0004 DBF021E3 msr CPSR_c, #MODE_UND | I_BIT | F_BIT
+ 54 0008 00D0A0E1 mov sp, r0
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 2
+
+
+ 55 000c A4109FE5 ldr r1, =__und_stack_size__
+ 56 0010 010040E0 sub r0, r0, r1
+ 57 /* Abort */
+ 58 0014 D7F021E3 msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
+ 59 0018 00D0A0E1 mov sp, r0
+ 60 001c 98109FE5 ldr r1, =__abt_stack_size__
+ 61 0020 010040E0 sub r0, r0, r1
+ 62 /* FIQ */
+ 63 0024 D1F021E3 msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
+ 64 0028 00D0A0E1 mov sp, r0
+ 65 002c 8C109FE5 ldr r1, =__fiq_stack_size__
+ 66 0030 010040E0 sub r0, r0, r1
+ 67 /* IRQ */
+ 68 0034 D2F021E3 msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
+ 69 0038 00D0A0E1 mov sp, r0
+ 70 003c 80109FE5 ldr r1, =__irq_stack_size__
+ 71 0040 010040E0 sub r0, r0, r1
+ 72 /* Supervisor */
+ 73 0044 D3F021E3 msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
+ 74 0048 00D0A0E1 mov sp, r0
+ 75 004c 74109FE5 ldr r1, =__svc_stack_size__
+ 76 0050 010040E0 sub r0, r0, r1
+ 77 /* System */
+ 78 0054 DFF021E3 msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
+ 79 0058 00D0A0E1 mov sp, r0
+ 80 // ldr r1, =__sys_stack_size__
+ 81 // sub r0, r0, r1
+ 82 /*
+ 83 * Early initialization.
+ 84 */
+ 85 #ifndef THUMB_NO_INTERWORKING
+ 86 005c FEFFFFEB bl hwinit0
+ 87 #else
+ 88 add r0, pc, #1
+ 89 bx r0
+ 90 .code 16
+ 91 bl hwinit0
+ 92 mov r0, pc
+ 93 bx r0
+ 94 .code 32
+ 95 #endif
+ 96 /*
+ 97 * Data initialization.
+ 98 * NOTE: It assumes that the DATA size is a multiple of 4.
+ 99 */
+ 100 0060 64109FE5 ldr r1, =_textdata
+ 101 0064 64209FE5 ldr r2, =_data
+ 102 0068 64309FE5 ldr r3, =_edata
+ 103 dataloop:
+ 104 006c 030052E1 cmp r2, r3
+ 105 0070 04009134 ldrlo r0, [r1], #4
+ 106 0074 04008234 strlo r0, [r2], #4
+ 107 0078 FBFFFF3A blo dataloop
+ 108 /*
+ 109 * BSS initialization.
+ 110 * NOTE: It assumes that the BSS size is a multiple of 4.
+ 111 */
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 3
+
+
+ 112 007c 0000A0E3 mov r0, #0
+ 113 0080 50109FE5 ldr r1, =_bss_start
+ 114 0084 50209FE5 ldr r2, =_bss_end
+ 115 bssloop:
+ 116 0088 020051E1 cmp r1, r2
+ 117 008c 04008134 strlo r0, [r1], #4
+ 118 0090 FCFFFF3A blo bssloop
+ 119 /*
+ 120 * Late initialization.
+ 121 */
+ 122 #ifdef THUMB_NO_INTERWORKING
+ 123 add r0, pc, #1
+ 124 bx r0
+ 125 .code 16
+ 126 bl hwinit1
+ 127 mov r0, #0
+ 128 mov r1, r0
+ 129 bl main
+ 130 ldr r1, =MainExitHandler
+ 131 bx r1
+ 132 .code 32
+ 133 #else
+ 134 0094 FEFFFFEB bl hwinit1
+ 135 0098 0000A0E3 mov r0, #0
+ 136 009c 0010A0E1 mov r1, r0
+ 137 00a0 FEFFFFEB bl main
+ 138 00a4 FEFFFFEA b MainExitHandler
+ 139 #endif
+ 140
+ 141 /*
+ 142 * Default main function exit handler.
+ 143 */
+ 144 .weak MainExitHandler
+ 145 .globl MainExitHandler
+ 146 MainExitHandler:
+ 147
+ 148 00a8 FEFFFFEA .loop: b .loop
+ 149
+ 150 /*
+ 151 * Default early initialization code. It is declared weak in order to be
+ 152 * replaced by the real initialization code.
+ 153 * Early initialization is performed just after reset before BSS and DATA
+ 154 * segments initialization.
+ 155 */
+ 156 #ifdef THUMB_NO_INTERWORKING
+ 157 .thumb_func
+ 158 .code 16
+ 159 #endif
+ 160 .weak hwinit0
+ 161 hwinit0:
+ 162 00ac 1EFF2FE1 bx lr
+ 163 .code 32
+ 164
+ 165 /*
+ 166 * Default late initialization code. It is declared weak in order to be
+ 167 * replaced by the real initialization code.
+ 168 * Late initialization is performed after BSS and DATA segments initialization
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 4
+
+
+ 169 * and before invoking the main() function.
+ 170 */
+ 171 #ifdef THUMB_NO_INTERWORKING
+ 172 .thumb_func
+ 173 .code 16
+ 174 #endif
+ 175 .weak hwinit1
+ 176 hwinit1:
+ 177 00b0 1EFF2FE1 bx lr
+ 178 00b4 00000000 .code 32
+ 178 00000000
+ 178 00000000
+ 178 00000000
+ 178 00000000
+ ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp/ccUcFP6A.s page 5
+
+
+DEFINED SYMBOLS
+../../os/ports/GCC/ARM7/crt0.s:28 *ABS*:00000010 MODE_USR
+../../os/ports/GCC/ARM7/crt0.s:29 *ABS*:00000011 MODE_FIQ
+../../os/ports/GCC/ARM7/crt0.s:30 *ABS*:00000012 MODE_IRQ
+../../os/ports/GCC/ARM7/crt0.s:31 *ABS*:00000013 MODE_SVC
+../../os/ports/GCC/ARM7/crt0.s:32 *ABS*:00000017 MODE_ABT
+../../os/ports/GCC/ARM7/crt0.s:33 *ABS*:0000001b MODE_UND
+../../os/ports/GCC/ARM7/crt0.s:34 *ABS*:0000001f MODE_SYS
+../../os/ports/GCC/ARM7/crt0.s:36 *ABS*:00000080 I_BIT
+../../os/ports/GCC/ARM7/crt0.s:37 *ABS*:00000040 F_BIT
+../../os/ports/GCC/ARM7/crt0.s:40 .text:00000000 $a
+../../os/ports/GCC/ARM7/crt0.s:47 .text:00000000 ResetHandler
+../../os/ports/GCC/ARM7/crt0.s:161 .text:000000ac hwinit0
+../../os/ports/GCC/ARM7/crt0.s:103 .text:0000006c dataloop
+../../os/ports/GCC/ARM7/crt0.s:115 .text:00000088 bssloop
+../../os/ports/GCC/ARM7/crt0.s:176 .text:000000b0 hwinit1
+../../os/ports/GCC/ARM7/crt0.s:146 .text:000000a8 MainExitHandler
+../../os/ports/GCC/ARM7/crt0.s:148 .text:000000a8 .loop
+../../os/ports/GCC/ARM7/crt0.s:178 .text:000000b4 $d
+
+UNDEFINED SYMBOLS
+__ram_end__
+__und_stack_size__
+__abt_stack_size__
+__fiq_stack_size__
+__irq_stack_size__
+__svc_stack_size__
+_textdata
+_data
+_edata
+_bss_start
+_bss_end
+main