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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-11 12:09:26 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-11 12:09:26 +0000 |
| commit | 8041eaf33c2f50f2ef7ed5580d1fb4741c9431c9 (patch) | |
| tree | 149bdef5cf8d5d9d9109a1a41e8ee76212a14328 /os/hal | |
| parent | 8d2cce8eed6a41f0ba315a77723e25c77ae260fc (diff) | |
| download | ChibiOS-8041eaf33c2f50f2ef7ed5580d1fb4741c9431c9.tar.gz ChibiOS-8041eaf33c2f50f2ef7ed5580d1fb4741c9431c9.tar.bz2 ChibiOS-8041eaf33c2f50f2ef7ed5580d1fb4741c9431c9.zip | |
DSPI working on SPC56ELxx.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5833 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/platforms/SPC56ELxx/platform.mk | 2 | ||||
| -rw-r--r-- | os/hal/platforms/SPC56ELxx/spc56el_registry.h | 38 |
2 files changed, 40 insertions, 0 deletions
diff --git a/os/hal/platforms/SPC56ELxx/platform.mk b/os/hal/platforms/SPC56ELxx/platform.mk index 267b25664..07f558c7c 100644 --- a/os/hal/platforms/SPC56ELxx/platform.mk +++ b/os/hal/platforms/SPC56ELxx/platform.mk @@ -1,5 +1,6 @@ # List of all the SPC56ELxx platform files.
PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/SPC56ELxx/hal_lld.c \
+ ${CHIBIOS}/os/hal/platforms/SPC5xx/DSPI_v1/spi_lld.c \
${CHIBIOS}/os/hal/platforms/SPC5xx/EDMA_v1/spc5_edma.c \
${CHIBIOS}/os/hal/platforms/SPC5xx/eTimer_v1/icu_lld.c \
${CHIBIOS}/os/hal/platforms/SPC5xx/FlexPWM_v1/pwm_lld.c \
@@ -8,6 +9,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/platforms/SPC56ELxx/hal_lld.c \ # Required include directories
PLATFORMINC = ${CHIBIOS}/os/hal/platforms/SPC56ELxx \
+ ${CHIBIOS}/os/hal/platforms/SPC5xx/DSPI_v1 \
${CHIBIOS}/os/hal/platforms/SPC5xx/EDMA_v1 \
${CHIBIOS}/os/hal/platforms/SPC5xx/eTimer_v1 \
${CHIBIOS}/os/hal/platforms/SPC5xx/FlexPWM_v1 \
diff --git a/os/hal/platforms/SPC56ELxx/spc56el_registry.h b/os/hal/platforms/SPC56ELxx/spc56el_registry.h index fcbd3d3d8..83fdab87c 100644 --- a/os/hal/platforms/SPC56ELxx/spc56el_registry.h +++ b/os/hal/platforms/SPC56ELxx/spc56el_registry.h @@ -38,6 +38,44 @@ #define SPC5_EDMA_NCHANNELS 16
#define SPC5_EDMA_HAS_MUX TRUE
+/* DSPI attribures.*/
+#define SPC5_HAS_DSPI0 TRUE
+#define SPC5_HAS_DSPI1 TRUE
+#define SPC5_HAS_DSPI2 TRUE
+#define SPC5_HAS_DSPI3 FALSE
+#define SPC5_HAS_DSPI4 FALSE
+#define SPC5_DSPI_FIFO_DEPTH 5
+#define SPC5_DSPI0_PCTL 4
+#define SPC5_DSPI1_PCTL 5
+#define SPC5_DSPI2_PCTL 6
+#define SPC5_DSPI0_TX1_DMA_DEV_ID 1
+#define SPC5_DSPI0_TX2_DMA_DEV_ID 0
+#define SPC5_DSPI0_RX_DMA_DEV_ID 2
+#define SPC5_DSPI1_TX1_DMA_DEV_ID 3
+#define SPC5_DSPI1_TX2_DMA_DEV_ID 0
+#define SPC5_DSPI1_RX_DMA_DEV_ID 4
+#define SPC5_DSPI2_TX1_DMA_DEV_ID 5
+#define SPC5_DSPI2_TX2_DMA_DEV_ID 0
+#define SPC5_DSPI2_RX_DMA_DEV_ID 6
+#define SPC5_DSPI0_TFFF_HANDLER vector76
+#define SPC5_DSPI0_TFFF_NUMBER 76
+#define SPC5_DSPI1_TFFF_HANDLER vector96
+#define SPC5_DSPI1_TFFF_NUMBER 96
+#define SPC5_DSPI2_TFFF_HANDLER vector116
+#define SPC5_DSPI2_TFFF_NUMBER 116
+#define SPC5_DSPI0_ENABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI0_PCTL, SPC5_SPI_DSPI0_START_PCTL)
+#define SPC5_DSPI0_DISABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI0_PCTL, SPC5_SPI_DSPI0_STOP_PCTL)
+#define SPC5_DSPI1_ENABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI1_PCTL, SPC5_SPI_DSPI1_START_PCTL)
+#define SPC5_DSPI1_DISABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI1_PCTL, SPC5_SPI_DSPI1_STOP_PCTL)
+#define SPC5_DSPI2_ENABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI2_PCTL, SPC5_SPI_DSPI2_START_PCTL)
+#define SPC5_DSPI2_DISABLE_CLOCK() \
+ halSPCSetPeripheralClockMode(SPC5_DSPI2_PCTL, SPC5_SPI_DSPI2_STOP_PCTL)
+
/* LINFlex attributes.*/
#define SPC5_HAS_LINFLEX0 TRUE
#define SPC5_LINFLEX0_PCTL 48
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