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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-08 13:20:10 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-05-08 13:20:10 +0000
commit732eaa72c18b9bc6ddb9b6c5ac2294420d14552e (patch)
treeb8a84f945f5eff61e24fd76fd95d94f2b76797bf /os/hal
parent60975ca7fed0e2960bced2fe72239422f8376068 (diff)
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I2C. Code cleanups.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@2937 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/include/i2c.h28
-rw-r--r--os/hal/platforms/STM32/i2c_lld.c30
-rw-r--r--os/hal/src/i2c.c4
3 files changed, 31 insertions, 31 deletions
diff --git a/os/hal/include/i2c.h b/os/hal/include/i2c.h
index 6e740cfa9..c3e5c0538 100644
--- a/os/hal/include/i2c.h
+++ b/os/hal/include/i2c.h
@@ -77,11 +77,11 @@
* @brief Driver state machine possible states.
*/
typedef enum {
- I2C_UNINIT = 0, /**< @brief Not initialized. */
- I2C_STOP = 1, /**< @brief Stopped. */
- I2C_READY = 2, /**< @brief Ready. */
- I2C_ACTIVE = 3, /**< @brief In communication. */
- I2C_COMPLETE = 4, /**< @brief Asynchronous operation complete. */
+ I2C_UNINIT = 0, /**< @brief Not initialized. */
+ I2C_STOP = 1, /**< @brief Stopped. */
+ I2C_READY = 2, /**< @brief Ready. */
+ I2C_ACTIVE = 3, /**< @brief In communication. */
+ I2C_COMPLETE = 4, /**< @brief Asynchronous operation complete. */
// slave part
I2C_SACTIVE = 10,
@@ -150,12 +150,12 @@ struct I2CSlaveConfig{
/**
* @brief Receive and transmit buffers.
*/
- size_t tx_remaining_bytes;
- size_t rx_remaining_bytes;
- i2cblock_t *rxbuf;/*!< Pointer to receive buffer. */
- i2cblock_t *txbuf;/*!< Pointer to transmit buffer.*/
+ size_t tx_bytes;
+ size_t rx_bytes;
+ i2cblock_t *rxbuf; /*!< Pointer to receive buffer. */
+ i2cblock_t *txbuf; /*!< Pointer to transmit buffer.*/
uint16_t slave_addr;
- uint8_t nbit_address;
+ uint8_t nbit_address; /*!< Length of address (must be 7 or 10).*/
i2cflags_t errors;
i2cflags_t flags;
/* Status Change @p EventSource.*/
@@ -224,10 +224,10 @@ struct I2CSlaveConfig{
*/
#define _i2c_isr_code(i2cp, i2cscfg) { \
(i2cp)->id_state = I2C_COMPLETE; \
- if(((i2cp)->id_slave_config)->id_callback) { \
- ((i2cp)->id_slave_config)->id_callback(i2cp, i2cscfg); \
- } \
- _i2c_wakeup_isr(i2cp); \
+ if(((i2cp)->id_slave_config)->id_callback) { \
+ ((i2cp)->id_slave_config)->id_callback(i2cp, i2cscfg); \
+ } \
+ _i2c_wakeup_isr(i2cp); \
}
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index 7d48b01c8..02f1105de 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -73,20 +73,20 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
txBuffp = (uint8_t*)i2cp->id_slave_config->txbuf;
datap = txBuffp;
txBuffp++;
- i2cp->id_slave_config->tx_remaining_bytes--;
+ i2cp->id_slave_config->tx_bytes--;
/* If no further data to be sent, disable the I2C ITBUF in order to not have a TxE interrupt */
- if(i2cp->id_slave_config->tx_remaining_bytes == 0) {
+ if(i2cp->id_slave_config->tx_bytes == 0) {
dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN;
}
//EV8_1 write the first data
dp->DR = *datap;
break;
case I2C_EV8_MASTER_BYTE_TRANSMITTING:
- if(i2cp->id_slave_config->tx_remaining_bytes > 0) {
+ if(i2cp->id_slave_config->tx_bytes > 0) {
datap = txBuffp;
txBuffp++;
- i2cp->id_slave_config->tx_remaining_bytes--;
- if(i2cp->id_slave_config->tx_remaining_bytes == 0) {
+ i2cp->id_slave_config->tx_bytes--;
+ if(i2cp->id_slave_config->tx_bytes == 0) {
/* If no further data to be sent, disable the ITBUF in order to not have a TxE interrupt */
dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN;
}
@@ -95,7 +95,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
break;
case I2C_EV8_2_MASTER_BYTE_TRANSMITTED:
/* if nothing to read then generate stop */
- if (i2cp->id_slave_config->rx_remaining_bytes == 0){
+ if (i2cp->id_slave_config->rx_bytes == 0){
dp->CR1 |= I2C_CR1_STOP; // stop generation
/* Disable ITEVT In order to not have again a BTF IT */
dp->CR2 &= (uint16_t)~I2C_CR2_ITEVTEN;
@@ -135,12 +135,12 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
rxBuffp = i2cp->id_slave_config->rxbuf;
break;
case I2C_EV7_MASTER_REC_BYTE_RECEIVED:
- if(i2cp->id_slave_config->rx_remaining_bytes != 3) {
+ if(i2cp->id_slave_config->rx_bytes != 3) {
/* Read the data register */
*rxBuffp = dp->DR;
rxBuffp++;
- i2cp->id_slave_config->rx_remaining_bytes--;
- switch(i2cp->id_slave_config->rx_remaining_bytes){
+ i2cp->id_slave_config->rx_bytes--;
+ switch(i2cp->id_slave_config->rx_bytes){
case 3:
/* Disable the ITBUF in order to have only the BTF interrupt */
dp->CR2 &= (uint16_t)~I2C_CR2_ITBUFEN;
@@ -172,7 +172,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
chSysUnlockFromIsr();
rxBuffp++;
/* Decrement the number of readed bytes */
- i2cp->id_slave_config->rx_remaining_bytes -= 2;
+ i2cp->id_slave_config->rx_bytes -= 2;
i2cp->id_slave_config->flags = 0;
// ready for read DataN on the next EV7
break;
@@ -187,7 +187,7 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) {
rxBuffp++;
/* Read the DataN*/
*rxBuffp = dp->DR;
- i2cp->id_slave_config->rx_remaining_bytes = 0;
+ i2cp->id_slave_config->rx_bytes = 0;
i2cp->id_slave_config->flags = 0;
/* Portable I2C ISR code defined in the high level driver, note, it is a macro.*/
_i2c_isr_code(i2cp, i2cp->id_slave_config);
@@ -574,11 +574,11 @@ void i2c_lld_master_receive(I2CDriver *i2cp){
i2cp->id_slave_config->errors = 0;
// Only one byte to be received
- if(i2cp->id_slave_config->rx_remaining_bytes == 1) {
+ if(i2cp->id_slave_config->rx_bytes == 1) {
i2cp->id_slave_config->flags |= I2C_FLG_1BTR;
}
// Only two bytes to be received
- else if(i2cp->id_slave_config->rx_remaining_bytes == 2) {
+ else if(i2cp->id_slave_config->rx_bytes == 2) {
i2cp->id_slave_config->flags |= I2C_FLG_2BTR;
i2cp->id_i2c->CR1 |= I2C_CR1_POS; // Acknowledge Position
}
@@ -623,11 +623,11 @@ void i2c_lld_master_transceive(I2CDriver *i2cp){
i2cp->id_slave_config->errors = 0;
// Only one byte to be received
- if(i2cp->id_slave_config->rx_remaining_bytes == 1) {
+ if(i2cp->id_slave_config->rx_bytes == 1) {
i2cp->id_slave_config->flags |= I2C_FLG_1BTR;
}
// Only two bytes to be received
- else if(i2cp->id_slave_config->rx_remaining_bytes == 2) {
+ else if(i2cp->id_slave_config->rx_bytes == 2) {
i2cp->id_slave_config->flags |= I2C_FLG_2BTR;
i2cp->id_i2c->CR1 |= I2C_CR1_POS; // Acknowledge Position
}
diff --git a/os/hal/src/i2c.c b/os/hal/src/i2c.c
index 1a2873a29..18d1d78c0 100644
--- a/os/hal/src/i2c.c
+++ b/os/hal/src/i2c.c
@@ -144,7 +144,7 @@ void i2cMasterTransmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg) {
txbuf = i2cscfg->txbuf;
nbit_addr = i2cscfg->nbit_address;
- n = i2cscfg->tx_remaining_bytes;
+ n = i2cscfg->tx_bytes;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && \
((nbit_addr == 7) || (nbit_addr == 10)) && (n > 0) && (txbuf != NULL),
@@ -192,7 +192,7 @@ void i2cMasterReceive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){
uint8_t nbit_addr;
rxbuf = i2cscfg->rxbuf;
- n = i2cscfg->rx_remaining_bytes;
+ n = i2cscfg->rx_bytes;
nbit_addr = i2cscfg->nbit_address;
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) && (n > 0) && \