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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-08-23 12:14:39 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-08-23 12:14:39 +0000
commit590c03982fcf964a54948e33952701d4fe76023b (patch)
tree94b6d7160c54f0c2755bea9cdb1d4baa8787bbab /os/hal
parent4377d247aedc476bc9a7784ecf534ac662ff7dbd (diff)
downloadChibiOS-590c03982fcf964a54948e33952701d4fe76023b.tar.gz
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6213 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/platforms/STM32/SPIv1/spi_lld.c18
-rw-r--r--os/hal/platforms/STM32/SPIv1/spi_lld.h8
-rw-r--r--os/hal/platforms/STM32/USARTv1/uart_lld.c100
-rw-r--r--os/hal/platforms/STM32/USARTv1/uart_lld.h8
4 files changed, 43 insertions, 91 deletions
diff --git a/os/hal/platforms/STM32/SPIv1/spi_lld.c b/os/hal/platforms/STM32/SPIv1/spi_lld.c
index dad91c6a8..74d21273a 100644
--- a/os/hal/platforms/STM32/SPIv1/spi_lld.c
+++ b/os/hal/platforms/STM32/SPIv1/spi_lld.c
@@ -216,49 +216,49 @@ void spi_lld_start(SPIDriver *spip) {
if (spip->state == SPI_STOP) {
#if STM32_SPI_USE_SPI1
if (&SPID1 == spip) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(spip->dmarx,
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI1_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #2", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI1(FALSE);
}
#endif
#if STM32_SPI_USE_SPI2
if (&SPID2 == spip) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(spip->dmarx,
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #3", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI2_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #4", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI2(FALSE);
}
#endif
#if STM32_SPI_USE_SPI3
if (&SPID3 == spip) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(spip->dmarx,
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_rx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #5", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(spip->dmatx,
STM32_SPI_SPI3_IRQ_PRIORITY,
(stm32_dmaisr_t)spi_lld_serve_tx_interrupt,
(void *)spip);
- chDbgAssert(!b, "spi_lld_start(), #6", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableSPI3(FALSE);
}
#endif
diff --git a/os/hal/platforms/STM32/SPIv1/spi_lld.h b/os/hal/platforms/STM32/SPIv1/spi_lld.h
index fe37c8f66..b0a65d7cd 100644
--- a/os/hal/platforms/STM32/SPIv1/spi_lld.h
+++ b/os/hal/platforms/STM32/SPIv1/spi_lld.h
@@ -328,17 +328,13 @@ struct SPIDriver{
/**
* @brief Waiting thread.
*/
- Thread *thread;
+ thread_reference_t thread;
#endif /* SPI_USE_WAIT */
#if SPI_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
-#if CH_USE_MUTEXES || defined(__DOXYGEN__)
/**
* @brief Mutex protecting the bus.
*/
- Mutex mutex;
-#elif CH_USE_SEMAPHORES
- Semaphore semaphore;
-#endif
+ mutex_t mutex;
#endif /* SPI_USE_MUTUAL_EXCLUSION */
#if defined(SPI_DRIVER_EXT_FIELDS)
SPI_DRIVER_EXT_FIELDS
diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.c b/os/hal/platforms/STM32/USARTv1/uart_lld.c
index cad1cf084..d77d9bd98 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.c
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.c
@@ -59,16 +59,16 @@
STM32_DMA_GETCHANNEL(STM32_UART_UART4_RX_DMA_STREAM, \
STM32_UART4_RX_DMA_CHN)
-#define UART4_TX_DMA_CHANNEL \
- STM32_DMA_GETCHANNEL(STM32_UART_UART4_TX_DMA_STREAM, \
+#define UART4_TX_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_UART_UART4_TX_DMA_STREAM, \
STM32_UART4_TX_DMA_CHN)
#define UART5_RX_DMA_CHANNEL \
STM32_DMA_GETCHANNEL(STM32_UART_UART5_RX_DMA_STREAM, \
STM32_UART5_RX_DMA_CHN)
-#define UART5_TX_DMA_CHANNEL \
- STM32_DMA_GETCHANNEL(STM32_UART_UART5_TX_DMA_STREAM, \
+#define UART5_TX_DMA_CHANNEL \
+ STM32_DMA_GETCHANNEL(STM32_UART_UART5_TX_DMA_STREAM, \
STM32_UART5_TX_DMA_CHN)
#define USART6_RX_DMA_CHANNEL \
@@ -79,14 +79,6 @@
STM32_DMA_GETCHANNEL(STM32_UART_USART6_TX_DMA_STREAM, \
STM32_USART6_TX_DMA_CHN)
-#if (STM32_UART_USE_UART4 || STM32_UART_USE_UART5)
- #define STM32_UART45_CR2_CHECK_MASK (USART_CR2_STOP_0 | USART_CR2_CLKEN | \
- USART_CR2_CPOL | USART_CR2_CPHA | USART_CR2_LBCL)
-
- #define STM32_UART45_CR3_CHECK_MASK (USART_CR3_CTSIE | USART_CR3_CTSE | \
- USART_CR3_RTSE | USART_CR3_SCEN | USART_CR3_NACK)
-#endif
-
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -508,28 +500,6 @@ void uart_lld_init(void) {
}
/**
- * @brief Check CR2 and CR3 values for compatibility with UART4, UART5.
- *
- * @param[in] uartp pointer to the @p UARTDriver object
- *
- * @notapi
- */
-#if (STM32_UART_USE_UART4 || STM32_UART_USE_UART5)
-static void uart_check_config(const UARTDriver *uartp) {
-
- uint16_t cr;
-
- cr = uartp->config->cr2;
- chDbgCheck((cr & STM32_UART45_CR2_CHECK_MASK) == 0,
- "Some flags from CR2 unavailable for this UART");
-
- cr = uartp->config->cr3;
- chDbgCheck((cr & STM32_UART45_CR3_CHECK_MASK) == 0,
- "Some flags from CR3 unavailable for this UART");
-}
-#endif /* (STM32_UART_USE_UART4 || STM32_UART_USE_UART5) */
-
-/**
* @brief Configures and activates the UART peripheral.
*
* @param[in] uartp pointer to the @p UARTDriver object
@@ -538,31 +508,22 @@ static void uart_check_config(const UARTDriver *uartp) {
*/
void uart_lld_start(UARTDriver *uartp) {
-#if STM32_UART_USE_UART4
- if (uartp == &UARTD4)
- uart_check_config(uartp);
-#elif STM32_UART_USE_UART5
- else if (uartp == &UARTD5)
- uart_check_config(uartp);
-#endif
-
if (uartp->state == UART_STOP) {
#if STM32_UART_USE_USART1
if (&UARTD1 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_USART1_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #1", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_USART1_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #2", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUSART1(FALSE);
- nvicEnableVector(STM32_USART1_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_USART1_IRQ_PRIORITY));
+ nvicEnableVector(STM32_USART1_NUMBER, STM32_UART_USART1_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART1_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART1_DMA_PRIORITY);
}
@@ -570,20 +531,19 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_USART2
if (&UARTD2 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_USART2_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #3", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_USART2_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #4", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUSART2(FALSE);
- nvicEnableVector(STM32_USART2_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_USART2_IRQ_PRIORITY));
+ nvicEnableVector(STM32_USART2_NUMBER, STM32_UART_USART2_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART2_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART2_DMA_PRIORITY);
}
@@ -591,20 +551,19 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_USART3
if (&UARTD3 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_USART3_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #5", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_USART3_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #6", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUSART3(FALSE);
- nvicEnableVector(STM32_USART3_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_USART3_IRQ_PRIORITY));
+ nvicEnableVector(STM32_USART3_NUMBER, STM32_UART_USART3_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART3_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART3_DMA_PRIORITY);
}
@@ -612,20 +571,19 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_UART4
if (&UARTD4 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART4_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #7", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_UART4_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #8", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUART4(FALSE);
- nvicEnableVector(STM32_UART4_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_UART4_IRQ_PRIORITY));
+ nvicEnableVector(STM32_UART4_NUMBER, STM32_UART_UART4_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART4_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART4_DMA_PRIORITY);
}
@@ -633,20 +591,19 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_UART5
if (&UARTD5 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_UART5_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #9", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_UART5_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #10", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUART5(FALSE);
- nvicEnableVector(STM32_UART5_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_UART5_IRQ_PRIORITY));
+ nvicEnableVector(STM32_UART5_NUMBER, STM32_UART_UART5_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(UART5_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_UART5_DMA_PRIORITY);
}
@@ -654,20 +611,19 @@ void uart_lld_start(UARTDriver *uartp) {
#if STM32_UART_USE_USART6
if (&UARTD6 == uartp) {
- bool_t b;
+ bool b;
b = dmaStreamAllocate(uartp->dmarx,
STM32_UART_USART6_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_rx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #11", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
b = dmaStreamAllocate(uartp->dmatx,
STM32_UART_USART6_IRQ_PRIORITY,
(stm32_dmaisr_t)uart_lld_serve_tx_end_irq,
(void *)uartp);
- chDbgAssert(!b, "uart_lld_start(), #12", "stream already allocated");
+ osalDbgAssert(!b, "stream already allocated");
rccEnableUSART6(FALSE);
- nvicEnableVector(STM32_USART6_NUMBER,
- CORTEX_PRIORITY_MASK(STM32_UART_USART6_IRQ_PRIORITY));
+ nvicEnableVector(STM32_USART6_NUMBER, STM32_UART_USART6_IRQ_PRIORITY);
uartp->dmamode |= STM32_DMA_CR_CHSEL(USART6_RX_DMA_CHANNEL) |
STM32_DMA_CR_PL(STM32_UART_USART6_DMA_PRIORITY);
}
diff --git a/os/hal/platforms/STM32/USARTv1/uart_lld.h b/os/hal/platforms/STM32/USARTv1/uart_lld.h
index ba8f00f1e..6c7df15e0 100644
--- a/os/hal/platforms/STM32/USARTv1/uart_lld.h
+++ b/os/hal/platforms/STM32/USARTv1/uart_lld.h
@@ -259,7 +259,7 @@
* @note This option is only available on platforms with enhanced DMA.
*/
#if !defined(STM32_UART_UART4_RX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#endif
/**
@@ -267,7 +267,7 @@
* @note This option is only available on platforms with enhanced DMA.
*/
#if !defined(STM32_UART_UART4_TX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#endif
/**
@@ -275,7 +275,7 @@
* @note This option is only available on platforms with enhanced DMA.
*/
#if !defined(STM32_UART_UART5_RX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#endif
/**
@@ -283,7 +283,7 @@
* @note This option is only available on platforms with enhanced DMA.
*/
#if !defined(STM32_UART_UART5_TX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#endif
/**