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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-06-02 15:20:59 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2016-06-02 15:20:59 +0000 |
| commit | 41212137418b35ce36f8bf3e9f92eb602314c371 (patch) | |
| tree | 51aa972b22806341ec41018c674809896f49bf07 /os/hal | |
| parent | e3b62eb4c307d4a4f452b4d47a7e6c0d5f2072cb (diff) | |
| download | ChibiOS-41212137418b35ce36f8bf3e9f92eb602314c371.tar.gz ChibiOS-41212137418b35ce36f8bf3e9f92eb602314c371.tar.bz2 ChibiOS-41212137418b35ce36f8bf3e9f92eb602314c371.zip | |
Fixed Bug #750
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9557 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c | 10 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c index 5a01134ef..a9f3240f1 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.c @@ -16,7 +16,7 @@ /**
* @file ADCv3/hal_adc_lld.c
- * @brief STM32F3xx ADC subsystem low level driver source.
+ * @brief STM32 ADC subsystem low level driver source.
*
* @addtogroup ADC
* @{
@@ -534,6 +534,7 @@ void adc_lld_init(void) { ADC1_COMMON->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
rccDisableADC12(FALSE);
#endif
+#endif
#if STM32_ADC_USE_ADC3 || STM32_ADC_USE_ADC4
rccEnableADC34(FALSE);
rccResetADC34();
@@ -541,7 +542,6 @@ void adc_lld_init(void) { rccDisableADC34(FALSE);
#endif
#endif
-#endif
#if defined(STM32L4XX)
rccEnableADC123(FALSE);
@@ -705,7 +705,7 @@ void adc_lld_stop(ADCDriver *adcp) { #endif
#if STM32_ADC_USE_ADC2
- if (&ADCD1 == adcp) {
+ if (&ADCD2 == adcp) {
#if defined(STM32F3XX)
/* Resetting CCR options except default ones.*/
adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA;
@@ -715,7 +715,7 @@ void adc_lld_stop(ADCDriver *adcp) { #endif
#if STM32_ADC_USE_ADC3
- if (&ADCD1 == adcp) {
+ if (&ADCD3 == adcp) {
#if defined(STM32F3XX)
/* Resetting CCR options except default ones.*/
adcp->adcc->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA;
@@ -725,7 +725,7 @@ void adc_lld_stop(ADCDriver *adcp) { #endif
#if STM32_ADC_USE_ADC4
- if (&ADCD1 == adcp) {
+ if (&ADCD4 == adcp) {
#if defined(STM32F3XX)
/* Resetting CCR options except default ones.*/
adcp->adcc->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA;
diff --git a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h index 2a295aead..d9ccea7cf 100644 --- a/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h @@ -16,7 +16,7 @@ /**
* @file ADCv3/hal_adc_lld.h
- * @brief STM32F3xx ADC subsystem low level driver header.
+ * @brief STM32 ADC subsystem low level driver header.
*
* @addtogroup ADC
* @{
|