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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-12-17 11:36:46 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-12-17 11:36:46 +0000
commit3ff51b09a448a0986cdfd388b40a790bf5033a32 (patch)
tree132b42f3e8ca0ddab92e5173ca6fca669e6373fa /os/hal
parent590fe7872d776200c5d188c945d673d0bbd4dd48 (diff)
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PVD for STM32F4x code cleanups.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3623 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
-rw-r--r--os/hal/platforms/STM32F4xx/hal_lld.c5
-rw-r--r--os/hal/platforms/STM32F4xx/hal_lld.h4
2 files changed, 4 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c
index b2862caa4..d33237c2d 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.c
+++ b/os/hal/platforms/STM32F4xx/hal_lld.c
@@ -74,9 +74,8 @@ void hal_lld_init(void) {
SysTick_CTRL_TICKINT_Msk;
#if STM32_PVD_ENABLE
- /* Power voltage detector initialization */
- PWR->CR |= PWR_CR_PVDE;
- PWR->CR |= STM32_PLS & STM32_PLS_MASK;
+ /* Programmable voltage detector initialization */
+ PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
#endif /* STM32_PVD_ENABLE */
#if defined(STM32_DMA_REQUIRED)
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.h b/os/hal/platforms/STM32F4xx/hal_lld.h
index 7ab2dff84..dc158b536 100644
--- a/os/hal/platforms/STM32F4xx/hal_lld.h
+++ b/os/hal/platforms/STM32F4xx/hal_lld.h
@@ -549,14 +549,14 @@
#endif
/**
- * @brief Enables or disables the power voltage detector.
+ * @brief Enables or disables the programmable voltage detector.
*/
#if !defined(STM32_PVD_ENABLE) || defined(__DOXYGEN__)
#define STM32_PVD_ENABLE FALSE
#endif
/**
- * @brief Enables or disables the power voltage detector.
+ * @brief Sets voltage level for programmable voltage detector.
*/
#if !defined(STM32_PLS) || defined(__DOXYGEN__)
#define STM32_PLS STM32_PLS_LEV0