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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-18 14:30:38 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-18 14:30:38 +0000 |
| commit | 3b951cfb3744648a4ad18788dc373d7fa880a964 (patch) | |
| tree | 3800547d882dd6a77e6ed2713d8ac594888806c3 /os/hal | |
| parent | 5a99b9e5bfbf97a65a082efd0e325ab764024dc6 (diff) | |
| download | ChibiOS-3b951cfb3744648a4ad18788dc373d7fa880a964.tar.gz ChibiOS-3b951cfb3744648a4ad18788dc373d7fa880a964.tar.bz2 ChibiOS-3b951cfb3744648a4ad18788dc373d7fa880a964.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5250 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/platforms/SPC56ELxx/spc56el_registry.h | 4 | ||||
| -rw-r--r-- | os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c | 2 |
2 files changed, 5 insertions, 1 deletions
diff --git a/os/hal/platforms/SPC56ELxx/spc56el_registry.h b/os/hal/platforms/SPC56ELxx/spc56el_registry.h index c95b916d2..30da7cf7e 100644 --- a/os/hal/platforms/SPC56ELxx/spc56el_registry.h +++ b/os/hal/platforms/SPC56ELxx/spc56el_registry.h @@ -40,6 +40,8 @@ #define SPC5_LINFLEX0_RXI_NUMBER 79
#define SPC5_LINFLEX0_TXI_NUMBER 80
#define SPC5_LINFLEX0_ERR_NUMBER 81
+#define SPC5_LINFLEX0_CLK (halSPCGetSystemClock() / \
+ SPC5_SYSCLK_DIVIDER_VALUE)
#define SPC5_HAS_LINFLEX1 TRUE
#define SPC5_LINFLEX1_PCTL 49
@@ -49,6 +51,8 @@ #define SPC5_LINFLEX1_RXI_NUMBER 99
#define SPC5_LINFLEX1_TXI_NUMBER 100
#define SPC5_LINFLEX1_ERR_NUMBER 101
+#define SPC5_LINFLEX1_CLK (halSPCGetSystemClock() / \
+ SPC5_SYSCLK_DIVIDER_VALUE)
#define SPC5_HAS_LINFLEX2 FALSE
diff --git a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c index a79ff5962..9516a7f6a 100644 --- a/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c +++ b/os/hal/platforms/SPC5xx/LINFlex_v1/serial_lld.c @@ -91,7 +91,7 @@ static void spc5_linflex_init(SerialDriver *sdp, const SerialConfig *config) { parameters.*/
linflexp->UARTCR.R = SPC5_UARTCR_UART; /* UART mode FIRST. */
linflexp->UARTCR.R = SPC5_UARTCR_UART | SPC5_UARTCR_RXEN | config->mode;
- div = halSPCGetSystemClock() / config->speed;
+ div = SPC5_LINFLEX0_CLK / config->speed;
linflexp->LINFBRR.R = (uint16_t)(div & 15); /* Fractional divider. */
linflexp->LINIBRR.R = (uint16_t)(div >> 4); /* Integer divider. */
linflexp->UARTSR.R = 0xFFFF; /* Clearing UARTSR register.*/
|