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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-03-18 09:31:08 +0000 |
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| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-03-18 09:31:08 +0000 |
| commit | 3976d935b831fd5062b8c4a458d873392aadf164 (patch) | |
| tree | 7461d80ac655486db3f562232d1c44187f4557dd /os/hal | |
| parent | c476cc79ff54f45cc71bc4446df33e75ac1842ad (diff) | |
| download | ChibiOS-3976d935b831fd5062b8c4a458d873392aadf164.tar.gz ChibiOS-3976d935b831fd5062b8c4a458d873392aadf164.tar.bz2 ChibiOS-3976d935b831fd5062b8c4a458d873392aadf164.zip | |
Fixed bug #473.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6780 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/platforms/STM32F30x/hal_lld.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/os/hal/platforms/STM32F30x/hal_lld.h b/os/hal/platforms/STM32F30x/hal_lld.h index 625700ab5..b2d138877 100644 --- a/os/hal/platforms/STM32F30x/hal_lld.h +++ b/os/hal/platforms/STM32F30x/hal_lld.h @@ -253,10 +253,10 @@ #define STM32_I2C2SW_SYSCLK (1 << 5) /**< I2C2 clock is SYSCLK. */
#define STM32_TIM1SW_MASK (1 << 8) /**< TIM1 clock source mask. */
#define STM32_TIM1SW_PCLK2 (0 << 8) /**< TIM1 clock is PCLK2. */
-#define STM32_TIM1SW_PLLX2 (1 << 10) /**< TIM1 clock is PLL*2. */
-#define STM32_TIM8SW_MASK (1 << 10) /**< TIM8 clock source mask. */
-#define STM32_TIM8SW_PCLK2 (0 << 10) /**< TIM8 clock is PCLK2. */
-#define STM32_TIM8SW_PLLX2 (1 << 10) /**< TIM8 clock is PLL*2. */
+#define STM32_TIM1SW_PLLX2 (1 << 8) /**< TIM1 clock is PLL*2. */
+#define STM32_TIM8SW_MASK (1 << 9) /**< TIM8 clock source mask. */
+#define STM32_TIM8SW_PCLK2 (0 << 9) /**< TIM8 clock is PCLK2. */
+#define STM32_TIM8SW_PLLX2 (1 << 9) /**< TIM8 clock is PLL*2. */
#define STM32_USART2SW_MASK (3 << 16) /**< USART2 clock source mask. */
#define STM32_USART2SW_PCLK (0 << 16) /**< USART2 clock is PCLK. */
#define STM32_USART2SW_SYSCLK (1 << 16) /**< USART2 clock is SYSCLK. */
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