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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-07-21 10:19:41 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-07-21 10:19:41 +0000 |
| commit | 3385f4899fd4ada96ac0d54e86f1a175ddc8c26a (patch) | |
| tree | fc2ed5f2e902dd654b09a571b58d5df38cd10d17 /os/hal | |
| parent | ac887d4f50d5848167ba8faad1f2c48bede36cb4 (diff) | |
| download | ChibiOS-3385f4899fd4ada96ac0d54e86f1a175ddc8c26a.tar.gz ChibiOS-3385f4899fd4ada96ac0d54e86f1a175ddc8c26a.tar.bz2 ChibiOS-3385f4899fd4ada96ac0d54e86f1a175ddc8c26a.zip | |
BKPSRAM. Added support on STM32F4x and STM32F2x platforms.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6014 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal')
| -rw-r--r-- | os/hal/platforms/STM32F4xx/hal_lld.c | 14 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_rcc.h | 23 |
2 files changed, 37 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32F4xx/hal_lld.c b/os/hal/platforms/STM32F4xx/hal_lld.c index faf480333..d99661799 100644 --- a/os/hal/platforms/STM32F4xx/hal_lld.c +++ b/os/hal/platforms/STM32F4xx/hal_lld.c @@ -45,12 +45,15 @@ /**
* @brief Initializes the backup domain.
+ * @note WARNING! Changing clock source impossible without resetting
+ * of the whole BKP domain.
*/
static void hal_lld_backup_domain_init(void) {
/* Backup domain access enabled and left open.*/
PWR->CR |= PWR_CR_DBP;
+#if HAL_USE_RTC
/* Reset BKP domain if different clock source selected.*/
if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL) {
/* Backup domain reset.*/
@@ -76,6 +79,17 @@ static void hal_lld_backup_domain_init(void) { RCC->BDCR |= RCC_BDCR_RTCEN;
}
#endif /* STM32_RTCSEL != STM32_RTCSEL_NOCLOCK */
+#endif /* HAL_USE_RTC */
+
+#if HAL_USE_BKPSRAM
+ rccEnableBKPSRAM(false);
+
+ PWR->CSR |= PWR_CSR_BRE;
+ while ((PWR->CSR & PWR_CSR_BRR) == 0)
+ ; /* Waits until the regulator is stable */
+#else
+ PWR->CSR &= ~PWR_CSR_BRE;
+#endif /* HAL_USE_BKPSRAM */
}
/*===========================================================================*/
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index d87bc2ab2..b429d7bcd 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -387,6 +387,29 @@ /** @} */
/**
+ * @name BKPSRAM specific RCC operations
+ * @{
+ */
+/**
+ * @brief Enables the BKPSRAM peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableBKPSRAM(lp) rccEnableAHB1(RCC_AHB1ENR_BKPSRAMEN, lp)
+
+/**
+ * @brief Disables the BKPSRAM peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableBKPSRAM(lp) rccDisableAHB1(RCC_AHB1ENR_BKPSRAMEN, lp)
+/** @} */
+
+/**
* @name PWR interface specific RCC operations
* @{
*/
|