git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6392 35acf78f-673a-0410-8e92-d51de3d6d3f4

7 files changed, 578 insertions, 538 deletions

diff --git a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
index abe7124a4..681e68ca6 100644
--- a/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
+++ b/os/hal/platforms/SPC560BCxx/spc560bc_registry.h
@@ -165,6 +165,7 @@
 #define SPC5_HAS_FLEXCAN0                                   TRUE

 #define SPC5_FLEXCAN0_PCTL                                  16

 #define SPC5_FLEXCAN0_MB                                    64

+#define SPC5_FLEXCAN0_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector65

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector66

 #define SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_HANDLER             vector68

@@ -187,6 +188,7 @@
 #define SPC5_HAS_FLEXCAN1                                   TRUE

 #define SPC5_FLEXCAN1_PCTL                                  17

 #define SPC5_FLEXCAN1_MB                                    64

+#define SPC5_FLEXCAN1_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER           vector85

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER              vector86

 #define SPC5_FLEXCAN1_FLEXCAN_BUF_00_03_HANDLER             vector88

@@ -209,6 +211,7 @@
 #define SPC5_HAS_FLEXCAN2                                   TRUE

 #define SPC5_FLEXCAN2_PCTL                                  18

 #define SPC5_FLEXCAN2_MB                                    64

+#define SPC5_FLEXCAN2_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER           vector105

 #define SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER              vector106

 #define SPC5_FLEXCAN2_FLEXCAN_BUF_00_03_HANDLER             vector108

@@ -231,6 +234,7 @@
 #define SPC5_HAS_FLEXCAN3                                   TRUE

 #define SPC5_FLEXCAN3_PCTL                                  19

 #define SPC5_FLEXCAN3_MB                                    64

+#define SPC5_FLEXCAN3_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER           vector173

 #define SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER              vector174

 #define SPC5_FLEXCAN3_FLEXCAN_BUF_00_03_HANDLER             vector176

@@ -253,6 +257,7 @@
 #define SPC5_HAS_FLEXCAN4                                   TRUE

 #define SPC5_FLEXCAN4_PCTL                                  20

 #define SPC5_FLEXCAN4_MB                                    64

+#define SPC5_FLEXCAN4_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER           vector190

 #define SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER              vector191

 #define SPC5_FLEXCAN4_FLEXCAN_BUF_00_03_HANDLER             vector193

@@ -275,6 +280,7 @@
 #define SPC5_HAS_FLEXCAN5                                   TRUE

 #define SPC5_FLEXCAN5_PCTL                                  21

 #define SPC5_FLEXCAN5_MB                                    64

+#define SPC5_FLEXCAN5_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER           vector202

 #define SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER              vector203

 #define SPC5_FLEXCAN5_FLEXCAN_BUF_00_03_HANDLER             vector205

diff --git a/os/hal/platforms/SPC560Dxx/spc560d_registry.h b/os/hal/platforms/SPC560Dxx/spc560d_registry.h
index d1bec2991..a3372e513 100644
--- a/os/hal/platforms/SPC560Dxx/spc560d_registry.h
+++ b/os/hal/platforms/SPC560Dxx/spc560d_registry.h
@@ -110,6 +110,28 @@
 #define SPC5_SIUL_NUM_PCRS                  77

 #define SPC5_SIUL_NUM_PADSELS               63

 #define SPC5_SIUL_SYSTEM_PINS               32,33

+

+/* FlexCAN attributes.*/

+#define SPC5_HAS_FLEXCAN0                                   TRUE

+#define SPC5_FLEXCAN0_PCTL                                  16

+#define SPC5_FLEXCAN0_MB                                    32

+#define SPC5_FLEXCAN0_SHARED_IRQ                            TRUE

+#define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector65

+#define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector66

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_HANDLER             vector68

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_04_07_HANDLER             vector69

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_HANDLER             vector70

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_HANDLER             vector71

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER             vector72

+#define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_NUMBER            65

+#define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_NUMBER               66

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_NUMBER              68

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_04_07_NUMBER              69

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_NUMBER              70

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_NUMBER              71

+#define SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_NUMBER              72

+#define SPC5_FLEXCAN0_ENABLE_CLOCK()                        halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_START_PCTL);

+#define SPC5_FLEXCAN0_DISABLE_CLOCK()                       halSPCSetPeripheralClockMode(SPC5_FLEXCAN0_PCTL, SPC5_CAN_FLEXCAN0_STOP_PCTL);

 /** @} */

 

 #endif /* _SPC560D_REGISTRY_H_ */

diff --git a/os/hal/platforms/SPC560Pxx/spc560p_registry.h b/os/hal/platforms/SPC560Pxx/spc560p_registry.h
index 54d38e0f6..a99413952 100644
--- a/os/hal/platforms/SPC560Pxx/spc560p_registry.h
+++ b/os/hal/platforms/SPC560Pxx/spc560p_registry.h
@@ -282,6 +282,7 @@
 #define SPC5_HAS_FLEXCAN0                                   TRUE

 #define SPC5_FLEXCAN0_PCTL                                  16

 #define SPC5_FLEXCAN0_MB                                    32

+#define SPC5_FLEXCAN0_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector65

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector66

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_WAK_HANDLER               vector67

diff --git a/os/hal/platforms/SPC563Mxx/spc563m_registry.h b/os/hal/platforms/SPC563Mxx/spc563m_registry.h
index 5e3c98dbe..5f467e3fa 100644
--- a/os/hal/platforms/SPC563Mxx/spc563m_registry.h
+++ b/os/hal/platforms/SPC563Mxx/spc563m_registry.h
@@ -128,6 +128,7 @@
 /* FlexCAN attributes.*/

 #define SPC5_HAS_FLEXCAN0                                   TRUE

 #define SPC5_FLEXCAN0_MB                                    64

+#define SPC5_FLEXCAN0_SHARED_IRQ                            FALSE

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector152

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector153

 #define SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER                vector155

@@ -173,6 +174,7 @@
 

 #define SPC5_HAS_FLEXCAN1                                   TRUE

 #define SPC5_FLEXCAN1_MB                                    32

+#define SPC5_FLEXCAN1_SHARED_IRQ                            FALSE

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER              vector173

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER           vector174

 #define SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER                vector176

diff --git a/os/hal/platforms/SPC564Axx/spc564a_registry.h b/os/hal/platforms/SPC564Axx/spc564a_registry.h
index ee043df5e..6619b82d3 100644
--- a/os/hal/platforms/SPC564Axx/spc564a_registry.h
+++ b/os/hal/platforms/SPC564Axx/spc564a_registry.h
@@ -169,6 +169,7 @@
 /* FlexCAN attributes.*/

 #define SPC5_HAS_FLEXCAN0                                   TRUE

 #define SPC5_FLEXCAN0_MB                                    64

+#define SPC5_FLEXCAN0_SHARED_IRQ                            FALSE

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector152

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector153

 #define SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER                vector155

@@ -214,6 +215,7 @@
 

 #define SPC5_HAS_FLEXCAN1                                   TRUE

 #define SPC5_FLEXCAN1_MB                                    64

+#define SPC5_FLEXCAN1_SHARED_IRQ                            FALSE

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER              vector173

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER           vector174

 #define SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER                vector176

@@ -259,6 +261,7 @@
 

 #define SPC5_HAS_FLEXCAN2                                   TRUE

 #define SPC5_FLEXCAN2_MB                                    64

+#define SPC5_FLEXCAN2_SHARED_IRQ                            FALSE

 #define SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER              vector280

 #define SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER           vector281

 #define SPC5_FLEXCAN2_FLEXCAN_BUF_00_HANDLER                vector283

diff --git a/os/hal/platforms/SPC56ELxx/spc56el_registry.h b/os/hal/platforms/SPC56ELxx/spc56el_registry.h
index 83fdab87c..7553510bc 100644
--- a/os/hal/platforms/SPC56ELxx/spc56el_registry.h
+++ b/os/hal/platforms/SPC56ELxx/spc56el_registry.h
@@ -236,6 +236,7 @@
 #define SPC5_HAS_FLEXCAN0                                   TRUE

 #define SPC5_FLEXCAN0_PCTL                                  16

 #define SPC5_FLEXCAN0_MB                                    32

+#define SPC5_FLEXCAN0_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER           vector65

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER              vector66

 #define SPC5_FLEXCAN0_FLEXCAN_ESR_WAK_HANDLER               vector67

@@ -258,6 +259,7 @@
 #define SPC5_HAS_FLEXCAN1                                   TRUE

 #define SPC5_FLEXCAN1_PCTL                                  17

 #define SPC5_FLEXCAN1_MB                                    32

+#define SPC5_FLEXCAN1_SHARED_IRQ                            TRUE

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER           vector85

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER              vector86

 #define SPC5_FLEXCAN1_FLEXCAN_ESR_WAK_HANDLER               vector87

diff --git a/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c b/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c
index d8bda8da2..eb04ffff0 100644
--- a/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c
+++ b/os/hal/platforms/SPC5xx/FlexCAN_v1/can_lld.c
@@ -22,6 +22,7 @@
  * @{

  */

 

+#include "ch.h"

 #include "hal.h"

 

 #if HAL_USE_CAN || defined(__DOXYGEN__)

@@ -124,65 +125,66 @@ static void can_lld_tx_handler(CANDriver *canp) {
   }

 #endif

 

-  osalSysLockFromISR();

-  osalQueueWakeupAllI(&canp->txqueue, MSG_OK);

+  chSysLockFromISR();

+  while (chSemGetCounterI(&canp->txsem) < 0)

+    chSemSignalI(&canp->txsem);

 

 #if SPC5_CAN_USE_FLEXCAN0 && (SPC5_FLEXCAN0_MB == 32)

   if(&CAND1 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN0 && (SPC5_FLEXCAN0_MB == 64)

   if(&CAND1 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 #if SPC5_CAN_USE_FLEXCAN1 && (SPC5_FLEXCAN1_MB == 32)

   if(&CAND2 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN1 && (SPC5_FLEXCAN1_MB == 64)

   if(&CAND2 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 #if SPC5_CAN_USE_FLEXCAN2 && (SPC5_FLEXCAN2_MB == 32)

   if(&CAND3 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN2 && (SPC5_FLEXCAN2_MB == 64)

   if(&CAND3 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 #if SPC5_CAN_USE_FLEXCAN3 && (SPC5_FLEXCAN3_MB == 32)

   if(&CAND4 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN3 && (SPC5_FLEXCAN3_MB == 64)

   if(&CAND4 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 #if SPC5_CAN_USE_FLEXCAN4 && (SPC5_FLEXCAN4_MB == 32)

   if(&CAND5 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN4 && (SPC5_FLEXCAN4_MB == 64)

   if(&CAND5 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 #if SPC5_CAN_USE_FLEXCAN5 && (SPC5_FLEXCAN5_MB == 32)

   if(&CAND6 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag1 & 0xFFFFFF00);

   }

 #elif SPC5_CAN_USE_FLEXCAN5 && (SPC5_FLEXCAN5_MB == 64)

   if(&CAND6 == canp) {

-    osalEventBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

+    chEvtBroadcastFlagsI(&canp->txempty_event, iflag2 | (iflag1 & 0xFFFFFF00));

   }

 #endif

 

-  osalSysUnlockFromISR();

+  chSysUnlockFromISR();

 }

 

 /**

@@ -197,10 +199,12 @@ static void can_lld_rx_handler(CANDriver *canp) {
 

   iflag1 = canp->flexcan->IFRL.R;

   if ((iflag1 & 0x000000FF) != 0) {

-    osalSysLockFromISR();

-    osalQueueWakeupAllI(&canp->rxqueue, MSG_OK);

-    osalEventBroadcastFlagsI(&canp->rxfull_event, iflag1 & 0x000000FF);

-    osalSysUnlockFromISR();

+    chSysLockFromISR();

+	while (chSemGetCounterI(&canp->rxsem) < 0)

+      chSemSignalI(&canp->rxsem);

+

+    chEvtBroadcastFlagsI(&canp->rxfull_event, iflag1 & 0x000000FF);

+    chSysUnlockFromISR();

 

     /* Release the mailbox.*/

     canp->flexcan->IFRL.R = iflag1 & 0x000000FF;

@@ -235,9 +239,9 @@ static void can_lld_err_handler(CANDriver *canp) {
     canp->flexcan->ESR.B.ERRINT = 1U;

     flags |= CAN_FRAMING_ERROR;

   }

-  osalSysLockFromISR();

-  osalEventBroadcastFlagsI(&canp->error_event, flags);

-  osalSysUnlockFromISR();

+  chSysLockFromISR();

+  chEvtBroadcastFlagsI(&canp->error_event, flags);

+  chSysUnlockFromISR();

 }

 

 /*===========================================================================*/

@@ -245,20 +249,20 @@ static void can_lld_err_handler(CANDriver *canp) {
 /*===========================================================================*/

 

 #if SPC5_CAN_USE_FLEXCAN0 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN0_SHARED_IRQ

 /**

  * @brief   CAN1 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -266,14 +270,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -281,14 +285,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -296,14 +300,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -311,14 +315,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -326,14 +330,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -341,14 +345,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -356,14 +360,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -371,14 +375,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -386,14 +390,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -401,14 +405,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -416,14 +420,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -431,14 +435,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -446,14 +450,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -461,14 +465,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -476,13 +480,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -490,13 +494,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN0_MB == 64)

@@ -505,13 +509,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -520,13 +524,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -534,13 +538,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -548,14 +552,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -563,13 +567,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -577,13 +581,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN0_MB == 64)

@@ -592,13 +596,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -607,13 +611,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -621,13 +625,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -635,13 +639,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -649,32 +653,32 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND1);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN0 */

 

 #if SPC5_CAN_USE_FLEXCAN1 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN1_SHARED_IRQ

 /**

  * @brief   CAN2 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -682,14 +686,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -697,14 +701,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -712,14 +716,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -727,14 +731,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -742,14 +746,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -757,14 +761,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -772,14 +776,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -787,14 +791,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -802,14 +806,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -817,14 +821,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -832,14 +836,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -847,14 +851,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -862,14 +866,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -877,14 +881,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -892,13 +896,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -906,13 +910,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN1_MB == 64)

@@ -921,13 +925,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -936,13 +940,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -950,13 +954,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -964,14 +968,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -979,13 +983,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -993,13 +997,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN1_MB == 64)

@@ -1008,13 +1012,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -1023,13 +1027,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -1037,13 +1041,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1051,13 +1055,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1065,32 +1069,32 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND2);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN1 */

 

 #if SPC5_CAN_USE_FLEXCAN2 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN2_SHARED_IRQ

 /**

  * @brief   CAN3 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1098,14 +1102,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1113,14 +1117,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1128,14 +1132,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1143,14 +1147,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1158,14 +1162,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1173,14 +1177,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1188,14 +1192,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1203,14 +1207,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1218,14 +1222,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1233,14 +1237,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1248,14 +1252,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1263,14 +1267,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1278,14 +1282,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1293,14 +1297,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1308,13 +1312,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1322,13 +1326,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN2_MB == 64)

@@ -1337,13 +1341,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -1352,13 +1356,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1366,13 +1370,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -1380,14 +1384,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1395,13 +1399,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1409,13 +1413,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN2_MB == 64)

@@ -1424,13 +1428,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -1439,13 +1443,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -1453,13 +1457,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1467,13 +1471,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1481,32 +1485,32 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND3);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN2 */

 

 #if SPC5_CAN_USE_FLEXCAN3 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN3_SHARED_IRQ

 /**

  * @brief   CAN4 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1514,14 +1518,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1529,14 +1533,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1544,14 +1548,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1559,14 +1563,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1574,14 +1578,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1589,14 +1593,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1604,14 +1608,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1619,14 +1623,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1634,14 +1638,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1649,14 +1653,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1664,14 +1668,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1679,14 +1683,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1694,14 +1698,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1709,14 +1713,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1724,13 +1728,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1738,13 +1742,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN3_MB == 64)

@@ -1753,13 +1757,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -1768,13 +1772,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1782,13 +1786,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -1796,14 +1800,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1811,13 +1815,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1825,13 +1829,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN3_MB == 64)

@@ -1840,13 +1844,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -1855,13 +1859,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -1869,13 +1873,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1883,13 +1887,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1897,32 +1901,32 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND4);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN3 */

 

 #if SPC5_CAN_USE_FLEXCAN4 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN4_SHARED_IRQ

 /**

  * @brief   CAN5 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1930,14 +1934,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1945,14 +1949,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1960,14 +1964,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1975,14 +1979,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -1990,14 +1994,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2005,14 +2009,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2020,14 +2024,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2035,14 +2039,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2050,14 +2054,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2065,14 +2069,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2080,14 +2084,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2095,14 +2099,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2110,14 +2114,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2125,14 +2129,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2140,13 +2144,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2154,13 +2158,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN4_MB == 64)

@@ -2169,13 +2173,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -2184,13 +2188,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2198,13 +2202,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -2212,14 +2216,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2227,13 +2231,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2241,13 +2245,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN4_MB == 64)

@@ -2256,13 +2260,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -2271,13 +2275,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -2285,13 +2289,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2299,13 +2303,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2313,32 +2317,32 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND5);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN4 */

 

 #if SPC5_CAN_USE_FLEXCAN5 || defined(__DOXYGEN__)

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN5_SHARED_IRQ

 /**

  * @brief   CAN6 RX interrupt handler for MB 0.

  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2346,14 +2350,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_01_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_01_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2361,14 +2365,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_01_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_02_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_02_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2376,14 +2380,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_02_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_03_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2391,14 +2395,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2406,14 +2410,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_05_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_05_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2421,14 +2425,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_05_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_06_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_06_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2436,14 +2440,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_06_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_07_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2451,14 +2455,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2466,14 +2470,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_09_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_09_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2481,14 +2485,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_09_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_10_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_10_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2496,14 +2500,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_10_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2511,14 +2515,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2526,14 +2530,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_13_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_13_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2541,14 +2545,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_13_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_14_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_14_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2556,13 +2560,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_14_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2570,13 +2574,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN5_MB == 64)

@@ -2585,13 +2589,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -2600,13 +2604,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2614,13 +2618,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #else

 /**

@@ -2628,14 +2632,14 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_11_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_11_HANDLER) {

 

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2643,13 +2647,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_08_11_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_15_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_15_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2657,13 +2661,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_12_15_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 #if (SPC5_FLEXCAN5_MB == 64)

@@ -2672,13 +2676,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_16_31_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_tx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 

@@ -2687,13 +2691,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_32_63_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_03_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_03_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /*

@@ -2701,13 +2705,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_00_03_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_07_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_07_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_rx_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2715,13 +2719,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_BUF_04_07_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 

 /**

@@ -2729,13 +2733,13 @@ OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_HANDLER) {
  *

  * @isr

  */

-OSAL_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER) {

+CH_IRQ_HANDLER(SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_HANDLER) {

 

-  OSAL_IRQ_PROLOGUE();

+  CH_IRQ_PROLOGUE();

 

   can_lld_err_handler(&CAND6);

 

-  OSAL_IRQ_EPILOGUE();

+  CH_IRQ_EPILOGUE();

 }

 #endif

 #endif /* SPC5_CAN_USE_FLEXCAN5 */

@@ -2755,7 +2759,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND1);

   CAND1.flexcan = &SPC5_FLEXCAN_0;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN0_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN0_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN0_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN0_FLEXCAN_ESR_BOFF_NUMBER].R =

@@ -2818,7 +2822,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND2);

   CAND2.flexcan = &SPC5_FLEXCAN_1;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN1_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN1_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN1_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN1_FLEXCAN_ESR_BOFF_NUMBER].R =

@@ -2881,7 +2885,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND3);

   CAND3.flexcan = &SPC5_FLEXCAN_2;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN2_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN2_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN2_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN2_FLEXCAN_ESR_BOFF_NUMBER].R =

@@ -2944,7 +2948,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND4);

   CAND4.flexcan = &SPC5_FLEXCAN_3;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN3_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN3_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN3_FLEXCAN_ESR_BOFF_NUMBER].R =

@@ -3007,7 +3011,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND5);

   CAND5.flexcan = &SPC5_FLEXCAN_4;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN4_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN4_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN4_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN4_FLEXCAN_ESR_BOFF_NUMBER].R =

@@ -3070,7 +3074,7 @@ void can_lld_init(void) {
   /* Driver initialization.*/

   canObjectInit(&CAND6);

   CAND6.flexcan = &SPC5_FLEXCAN_5;

-#if (defined _SPC563M64L5_ || defined _SPC563M64L7_ || defined _SPC564A70L7_)

+#if !SPC5_FLEXCAN5_SHARED_IRQ

   INTC.PSR[SPC5_FLEXCAN5_FLEXCAN_ESR_ERR_INT_NUMBER].R =

       SPC5_CAN_FLEXCAN5_IRQ_PRIORITY;

   INTC.PSR[SPC5_FLEXCAN5_FLEXCAN_ESR_BOFF_NUMBER].R =