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| author | isiora <none@example.com> | 2018-02-27 00:23:45 +0000 |
|---|---|---|
| committer | isiora <none@example.com> | 2018-02-27 00:23:45 +0000 |
| commit | e372b812a0296ddae2247976467f4b1fa29730ad (patch) | |
| tree | d685aa48bfcb202b870dd194b4099223dca11e09 /os/hal/ports | |
| parent | e801a7980d6968cfaf4c6d4fa737dbd07a0c9eb5 (diff) | |
| download | ChibiOS-e372b812a0296ddae2247976467f4b1fa29730ad.tar.gz ChibiOS-e372b812a0296ddae2247976467f4b1fa29730ad.tar.bz2 ChibiOS-e372b812a0296ddae2247976467f4b1fa29730ad.zip | |
Added L2 related code.
git-svn-id: https://svn.code.sf.net/p/chibios/svn2/trunk@11581 110e8d01-0319-4d1e-a829-52ad28d1bb01
Diffstat (limited to 'os/hal/ports')
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/sama_cache.c | 18 | ||||
| -rw-r--r-- | os/hal/ports/SAMA/SAMA5D2x/sama_cache.h | 1 |
2 files changed, 17 insertions, 2 deletions
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c index 64f1f32d2..5c01ba359 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c +++ b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.c @@ -26,7 +26,6 @@ /**
* @brief Invalidate D-Cache Region
- * @TODO: Extend to L2C
*
* @param[in] start Pointer to beginning of memory region.
* @param[in] length Length of the memory location.
@@ -41,11 +40,18 @@ void cacheInvalidateRegion(void *start, uint32_t length) { for (mva = start_addr & ~L1_CACHE_BYTES; mva < end_addr; mva += L1_CACHE_BYTES) {
L1C_InvalidateDCacheMVA((uint32_t *)mva);
}
+#if defined(ARM_ENABLE_L2CC)
+#if ARM_ENABLE_L2CC
+ /* Invalidate L2 Cache */
+ for (mva = start_addr & ~L2_CACHE_BYTES; mva < end_addr; mva += L2_CACHE_BYTES) {
+ L2C_InvPa((uint32_t *)mva);
+ }
+#endif
+#endif
}
/**
* @brief Clean D-Cache Region
- * @TODO: Extend to L2C
*
* @param[in] start Pointer to beginning of memory region.
* @param[in] length Length of the memory location.
@@ -60,6 +66,14 @@ void cacheCleanRegion(void *start, uint32_t length) { for (mva = start_addr & ~L1_CACHE_BYTES; mva < end_addr; mva += L1_CACHE_BYTES) {
L1C_CleanDCacheMVA((uint32_t *)mva);
}
+#if defined(ARM_ENABLE_L2CC)
+#if ARM_ENABLE_L2CC
+ /* Invalidate L2 Cache */
+ for (mva = start_addr & ~L2_CACHE_BYTES; mva < end_addr; mva += L2_CACHE_BYTES) {
+ L2C_CleanPa((uint32_t *)mva);
+ }
+#endif
+#endif
}
/** @} */
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h index fc7bcedac..1608a023c 100644 --- a/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h +++ b/os/hal/ports/SAMA/SAMA5D2x/sama_cache.h @@ -28,6 +28,7 @@ /* Driver constants. */
/*===========================================================================*/
#define L1_CACHE_BYTES 32u
+#define L2_CACHE_BYTES 32u
#ifdef __cplusplus
extern "C" {
|