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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-19 10:51:38 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-19 10:51:38 +0000 |
| commit | 0c379c379b5333e1d30023fc6ef34dee159c06e2 (patch) | |
| tree | 0cd0fe6adf29a04e5d9e6ae940a017562bb4c836 /os/hal/ports/STM32/STM32F7xx | |
| parent | 52d583ec3b89f04d4daa3688026bde568315b64c (diff) | |
| download | ChibiOS-0c379c379b5333e1d30023fc6ef34dee159c06e2.tar.gz ChibiOS-0c379c379b5333e1d30023fc6ef34dee159c06e2.tar.bz2 ChibiOS-0c379c379b5333e1d30023fc6ef34dee159c06e2.zip | |
Fixed bug #913.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11345 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/ports/STM32/STM32F7xx')
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.c | 12 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F7xx/hal_lld.h | 46 |
2 files changed, 40 insertions, 18 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c index 20af00675..74ab39734 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c @@ -279,12 +279,12 @@ void stm32_clock_init(void) { }
/* Peripheral clock sources.*/
- RCC->DCKCFGR2 = STM32_SDMMCSEL | STM32_CK48MSEL | STM32_CECSEL |
- STM32_LPTIM1SEL | STM32_I2C4SEL | STM32_I2C3SEL |
- STM32_I2C2SEL | STM32_I2C1SEL | STM32_UART8SEL |
- STM32_UART7SEL | STM32_USART6SEL | STM32_UART5SEL |
- STM32_UART4SEL | STM32_USART3SEL | STM32_USART2SEL |
- STM32_USART1SEL;
+ RCC->DCKCFGR2 = STM32_SDMMC2SEL | STM32_SDMMC1SEL | STM32_CK48MSEL |
+ STM32_CECSEL | STM32_LPTIM1SEL | STM32_I2C4SEL |
+ STM32_I2C3SEL | STM32_I2C2SEL | STM32_I2C1SEL |
+ STM32_UART8SEL | STM32_UART7SEL | STM32_USART6SEL |
+ STM32_UART5SEL | STM32_UART4SEL | STM32_USART3SEL |
+ STM32_USART2SEL | STM32_USART1SEL;
/* Flash setup.*/
FLASH->ACR = FLASH_ACR_ARTEN | FLASH_ACR_PRFTEN | STM32_FLASHBITS;
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.h b/os/hal/ports/STM32/STM32F7xx/hal_lld.h index d84e2333f..d0c503361 100644 --- a/os/hal/ports/STM32/STM32F7xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.h @@ -412,9 +412,13 @@ #define STM32_CK48MSEL_PLL (0 << 27) /**< PLL48CLK source is PLL. */
#define STM32_CK48MSEL_PLLSAI (1 << 27) /**< PLL48CLK source is PLLSAI. */
-#define STM32_SDMMCSEL_MASK (1 << 28) /**< SDMMCSEL mask. */
-#define STM32_SDMMCSEL_PLL48CLK (0 << 28) /**< SDMMC source is PLL48CLK. */
-#define STM32_SDMMCSEL_SYSCLK (1 << 28) /**< SDMMC source is SYSCLK. */
+#define STM32_SDMMC1SEL_MASK (1 << 28) /**< SDMMC1SEL mask. */
+#define STM32_SDMMC1SEL_PLL48CLK (0 << 28) /**< SDMMC1 source is PLL48CLK. */
+#define STM32_SDMMC1SEL_SYSCLK (1 << 28) /**< SDMMC1 source is SYSCLK. */
+
+#define STM32_SDMMC2SEL_MASK (1 << 29) /**< SDMMC2SEL mask. */
+#define STM32_SDMMC2SEL_PLL48CLK (0 << 29) /**< SDMMC2 source is PLL48CLK. */
+#define STM32_SDMMC2SEL_SYSCLK (1 << 29) /**< SDMMC2 source is SYSCLK. */
/** @} */
/**
@@ -848,10 +852,17 @@ #endif
/**
- * @brief SDMMC clock source.
+ * @brief SDMMC1 clock source.
+ */
+#if !defined(STM32_SDMMC1SEL) || defined(__DOXYGEN__)
+#define STM32_SDMMC1SEL STM32_SDMMC1SEL_PLL48CLK
+#endif
+
+/**
+ * @brief SDMMC2 clock source.
*/
-#if !defined(STM32_SDMMCSEL) || defined(__DOXYGEN__)
-#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL48CLK
+#if !defined(STM32_SDMMC2SEL) || defined(__DOXYGEN__)
+#define STM32_SDMMC2SEL STM32_SDMMC2SEL_PLL48CLK
#endif
/**
@@ -1961,14 +1972,25 @@ #endif
/**
- * @brief SDMMC frequency.
+ * @brief SDMMC1 frequency.
+ */
+#if (STM32_SDMMC1SEL == STM32_SDMMC1SEL_PLL48CLK) || defined(__DOXYGEN__)
+#define STM32_SDMMC1CLK STM32_PLL48CLK
+#elif STM32_SDMMC1SEL == STM32_SDMMCSEL_SYSCLK
+#define STM32_SDMMC1CLK STM32_SYSCLK
+#else
+#error "invalid source selected for SDMMC1 clock"
+#endif
+
+/**
+ * @brief SDMMC2 frequency.
*/
-#if (STM32_SDMMCSEL == STM32_SDMMCSEL_PLL48CLK) || defined(__DOXYGEN__)
-#define STM32_SDMMCCLK STM32_PLL48CLK
-#elif STM32_SDMMCSEL == STM32_SDMMCSEL_SYSCLK
-#define STM32_SDMMCCLK STM32_SYSCLK
+#if (STM32_SDMMC2SEL == STM32_SDMMC1SEL_PLL48CLK) || defined(__DOXYGEN__)
+#define STM32_SDMMC2CLK STM32_PLL48CLK
+#elif STM32_SDMMC2SEL == STM32_SDMMCSEL_SYSCLK
+#define STM32_SDMMC2CLK STM32_SYSCLK
#else
-#error "invalid source selected for SDMMC clock"
+#error "invalid source selected for SDMMC2 clock"
#endif
/**
|