Adjustments to the EXT driver, not yet finished. Moved all STM32 drivers in private subdirectories.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8119 35acf78f-673a-0410-8e92-d51de3d6d3f4

3 files changed, 100 insertions, 47 deletions

diff --git a/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c b/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c
index 7d5e38cff..e83378c16 100644
--- a/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c
+++ b/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c
@@ -55,11 +55,14 @@
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector58) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 0);

-  EXTD1.config->channels[0].cb(&EXTD1, 0);

+  pr = EXTI->PR & EXTI->IMR & (1 << 0);

+  EXTI->PR = pr;

+  if (pr & (1 << 0))

+    EXTD1.config->channels[0].cb(&EXTD1, 0);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -72,11 +75,14 @@ OSAL_IRQ_HANDLER(Vector58) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector5C) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 1);

-  EXTD1.config->channels[1].cb(&EXTD1, 1);

+  pr = EXTI->PR & EXTI->IMR & (1 << 1);

+  EXTI->PR = pr;

+  if (pr & (1 << 1))

+    EXTD1.config->channels[1].cb(&EXTD1, 1);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -89,11 +95,14 @@ OSAL_IRQ_HANDLER(Vector5C) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector60) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 2);

-  EXTD1.config->channels[2].cb(&EXTD1, 2);

+  pr = EXTI->PR & EXTI->IMR & (1 << 2);

+  EXTI->PR = pr;

+  if (pr & (1 << 2))

+    EXTD1.config->channels[2].cb(&EXTD1, 2);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -106,11 +115,14 @@ OSAL_IRQ_HANDLER(Vector60) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector64) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 3);

-  EXTD1.config->channels[3].cb(&EXTD1, 3);

+  pr = EXTI->PR & EXTI->IMR & (1 << 3);

+  EXTI->PR = pr;

+  if (pr & (1 << 3))

+    EXTD1.config->channels[3].cb(&EXTD1, 3);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -123,11 +135,14 @@ OSAL_IRQ_HANDLER(Vector64) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector68) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 4);

-  EXTD1.config->channels[4].cb(&EXTD1, 4);

+  pr = EXTI->PR & EXTI->IMR & (1 << 4);

+  EXTI->PR = pr;

+  if (pr & (1 << 4))

+    EXTD1.config->channels[4].cb(&EXTD1, 4);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -144,7 +159,8 @@ OSAL_IRQ_HANDLER(Vector9C) {
 

   OSAL_IRQ_PROLOGUE();

 

-  pr = EXTI->PR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | (1 << 9));

+  pr = EXTI->PR & EXTI->IMR & ((1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |

+                               (1 << 9));

   EXTI->PR = pr;

   if (pr & (1 << 5))

     EXTD1.config->channels[5].cb(&EXTD1, 5);

@@ -172,8 +188,8 @@ OSAL_IRQ_HANDLER(VectorE0) {
 

   OSAL_IRQ_PROLOGUE();

 

-  pr = EXTI->PR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 14) |

-                   (1 << 15));

+  pr = EXTI->PR & EXTI->IMR & ((1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |

+                               (1 << 14) | (1 << 15));

   EXTI->PR = pr;

   if (pr & (1 << 10))

     EXTD1.config->channels[10].cb(&EXTD1, 10);

@@ -199,11 +215,14 @@ OSAL_IRQ_HANDLER(VectorE0) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector44) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 16);

-  EXTD1.config->channels[16].cb(&EXTD1, 16);

+  pr = EXTI->PR & EXTI->IMR & (1 << 16);

+  EXTI->PR = pr;

+  if (pr & (1 << 16))

+    EXTD1.config->channels[16].cb(&EXTD1, 16);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -216,11 +235,14 @@ OSAL_IRQ_HANDLER(Vector44) {
  * @isr

  */

 OSAL_IRQ_HANDLER(VectorE4) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 17);

-  EXTD1.config->channels[17].cb(&EXTD1, 17);

+  pr = EXTI->PR & EXTI->IMR & (1 << 17);

+  EXTI->PR = pr;

+  if (pr & (1 << 17))

+    EXTD1.config->channels[17].cb(&EXTD1, 17);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -233,11 +255,14 @@ OSAL_IRQ_HANDLER(VectorE4) {
  * @isr

  */

 OSAL_IRQ_HANDLER(VectorE8) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 18);

-  EXTD1.config->channels[18].cb(&EXTD1, 18);

+  pr = EXTI->PR & EXTI->IMR & (1 << 18);

+  EXTI->PR = pr;

+  if (pr & (1 << 18))

+    EXTD1.config->channels[18].cb(&EXTD1, 18);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -250,11 +275,14 @@ OSAL_IRQ_HANDLER(VectorE8) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector48) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 19);

-  EXTD1.config->channels[19].cb(&EXTD1, 19);

+  pr = EXTI->PR & EXTI->IMR & (1 << 19);

+  EXTI->PR = pr;

+  if (pr & (1 << 19))

+    EXTD1.config->channels[19].cb(&EXTD1, 19);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -267,11 +295,14 @@ OSAL_IRQ_HANDLER(Vector48) {
  * @isr

  */

 OSAL_IRQ_HANDLER(Vector4C) {

+  uint32_t pr;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR = (1 << 20);

-  EXTD1.config->channels[20].cb(&EXTD1, 20);

+  pr = EXTI->PR & EXTI->IMR & (1 << 20);

+  EXTI->PR = pr;

+  if (pr & (1 << 20))

+    EXTD1.config->channels[20].cb(&EXTD1, 20);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -288,7 +319,7 @@ OSAL_IRQ_HANDLER(Vector140) {
 

   OSAL_IRQ_PROLOGUE();

 

-  pr = EXTI->PR & ((1 << 21) | (1 << 22) | (1 << 29));

+  pr = EXTI->PR & EXTI->IMR & ((1 << 21) | (1 << 22) | (1 << 29));

   EXTI->PR = pr;

   if (pr & (1 << 21))

     EXTD1.config->channels[21].cb(&EXTD1, 21);

@@ -312,14 +343,14 @@ OSAL_IRQ_HANDLER(Vector144) {
 

   OSAL_IRQ_PROLOGUE();

 

-  pr = EXTI->PR & ((1 << 30) | (1 << 31));

+  pr = EXTI->PR & EXTI->IMR & ((1 << 30) | (1 << 31));

   EXTI->PR = pr;

   if (pr & (1 << 30))

     EXTD1.config->channels[30].cb(&EXTD1, 30);

   if (pr & (1 << 31))

     EXTD1.config->channels[31].cb(&EXTD1, 31);

 

-  pr = EXTI->PR2 & (1 << 0);

+  pr = EXTI->PR2 & EXTI->IMR2 & (1 << 0);

   EXTI->PR2 = pr;

   if (pr & (1 << 0))

     EXTD1.config->channels[32].cb(&EXTD1, 32);

@@ -335,11 +366,14 @@ OSAL_IRQ_HANDLER(Vector144) {
  * @isr

  */

 OSAL_IRQ_HANDLER(RTC_WKUP_IRQHandler) {

+  uint32_t pr2;

 

   OSAL_IRQ_PROLOGUE();

 

-  EXTI->PR2 = (1 << 1);

-  EXTD1.config->channels[33].cb(&EXTD1, 33);

+  pr2 = EXTI->PR2 & EXTI->IMR & (1 << 1);

+  EXTI->PR2 = pr2;

+  if (pr2 & (1 << 1))

+    EXTD1.config->channels[33].cb(&EXTD1, 33);

 

   OSAL_IRQ_EPILOGUE();

 }

@@ -372,7 +406,7 @@ void ext_lld_exti_irq_enable(void) {
   nvicEnableVector(RTC_WKUP_IRQn, STM32_EXT_EXTI20_IRQ_PRIORITY);

   nvicEnableVector(COMP1_2_3_IRQn, STM32_EXT_EXTI21_22_29_IRQ_PRIORITY);

   nvicEnableVector(COMP4_5_6_IRQn, STM32_EXT_EXTI30_32_IRQ_PRIORITY);

-#if STM32_EXTI_NUM_CHANNELS >= 34

+#if STM32_EXTI_NUM_LINES >= 34

   nvicEnableVector(COMP7_IRQn, STM32_EXT_EXTI33_IRQ_PRIORITY);

 #endif

 }

@@ -400,7 +434,7 @@ void ext_lld_exti_irq_disable(void) {
   nvicDisableVector(RTC_WKUP_IRQn);

   nvicDisableVector(COMP1_2_3_IRQn);

   nvicDisableVector(COMP4_5_6_IRQn);

-#if STM32_EXTI_NUM_CHANNELS >= 34

+#if STM32_EXTI_NUM_LINES >= 34

   nvicDisableVector(COMP7_IRQn);

 #endif

 }

diff --git a/os/hal/ports/STM32/STM32F3xx/platform.mk b/os/hal/ports/STM32/STM32F3xx/platform.mk
index 8dfd9cf13..0f0837cab 100644
--- a/os/hal/ports/STM32/STM32F3xx/platform.mk
+++ b/os/hal/ports/STM32/STM32F3xx/platform.mk
@@ -9,16 +9,16 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
 ifneq ($(findstring HAL_USE_ADC TRUE,$(HALCONF)),)

 PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/adc_lld.c

 endif

-ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)

-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c \

-               $(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c

-endif

 ifneq ($(findstring HAL_USE_CAN TRUE,$(HALCONF)),)

-PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c

+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c

 endif

 ifneq ($(findstring HAL_USE_DAC TRUE,$(HALCONF)),)

 PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c

 endif

+ifneq ($(findstring HAL_USE_EXT TRUE,$(HALCONF)),)

+PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \

+               $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c

+endif

 ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)

 PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c

 endif

@@ -55,9 +55,9 @@ PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
                $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/hal_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/adc_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/ext_lld_isr.c \

-               $(CHIBIOS)/os/hal/ports/STM32/LLD/can_lld.c \

-               $(CHIBIOS)/os/hal/ports/STM32/LLD/ext_lld.c \

+               $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1/can_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1/dac_lld.c \

+               $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/ext_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c \

@@ -74,8 +74,9 @@ endif
 # Required include directories

 PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \

                $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx \

-               $(CHIBIOS)/os/hal/ports/STM32/LLD \

+               $(CHIBIOS)/os/hal/ports/STM32/LLD/CANv1 \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/DACv1 \

+               $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1 \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2 \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2 \

                $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2 \

diff --git a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
index 067f5dc00..02f095809 100644
--- a/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
+++ b/os/hal/ports/STM32/STM32F3xx/stm32_registry.h
@@ -79,7 +79,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             34

+#define STM32_EXTI_NUM_LINES                34

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -274,7 +276,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             34

+#define STM32_EXTI_NUM_LINES                34

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -446,7 +450,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             33

+#define STM32_EXTI_NUM_LINES                33

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -617,7 +623,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             33

+#define STM32_EXTI_NUM_LINES                33

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -791,7 +799,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             34

+#define STM32_EXTI_NUM_LINES                34

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -977,7 +987,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             33

+#define STM32_EXTI_NUM_LINES                33

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -1151,7 +1163,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             33

+#define STM32_EXTI_NUM_LINES                33

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -1322,7 +1336,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             34

+#define STM32_EXTI_NUM_LINES                34

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE

@@ -1512,7 +1528,9 @@
 #define STM32_HAS_ETH                       FALSE

 

 /* EXTI attributes.*/

-#define STM32_EXTI_NUM_CHANNELS             33

+#define STM32_EXTI_NUM_LINES                33

+#define STM32_EXTI_IMR_MASK                 0x1F800000U

+#define STM32_EXTI_IMR2_MASK                0xFFFFFFFCU

 

 /* GPIO attributes.*/

 #define STM32_HAS_GPIOA                     TRUE