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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-07-01 13:36:59 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-07-01 13:36:59 +0000
commitaf0e40079ded13b8842e8d129fa6ed2f37fdf678 (patch)
tree53189f84b2d636dd3c7757f4dc6df75106bcf750 /os/hal/platforms
parent551a1c1f22fb53085ab9485115fc3d27af92083c (diff)
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I2C. Trying to add optional WAIT support. Driver broken.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3101 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r--os/hal/platforms/STM32/i2c_lld.c34
-rw-r--r--os/hal/platforms/STM32/i2c_lld.h2
2 files changed, 21 insertions, 15 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c
index d9ca29a9e..a4aa2927d 100644
--- a/os/hal/platforms/STM32/i2c_lld.c
+++ b/os/hal/platforms/STM32/i2c_lld.c
@@ -561,13 +561,16 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr,
i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */
-#if !I2C_USE_WAIT
- /* Wait until the START condition is generated on the bus:
- * the START bit is cleared by hardware */
- uint32_t timeout = 0xfffff;
- while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
- ;
-#endif /* I2C_USE_WAIT */
+//#if !I2C_USE_WAIT
+// /* Wait until the START condition is generated on the bus:
+// * the START bit is cleared by hardware */
+// uint32_t timeout = 0xfffff;
+// while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
+// ;
+//#endif /* I2C_USE_WAIT */
+ uint32_t timeout = 0xfffff;
+ while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
+ ;
}
@@ -623,13 +626,16 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr,
i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */
-#if !I2C_USE_WAIT
- /* Wait until the START condition is generated on the bus:
- * the START bit is cleared by hardware */
- uint32_t timeout = 0xfffff;
- while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
- ;
-#endif /* I2C_USE_WAIT */
+//#if !I2C_USE_WAIT
+// /* Wait until the START condition is generated on the bus:
+// * the START bit is cleared by hardware */
+// uint32_t timeout = 0xfffff;
+// while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
+// ;
+//#endif /* I2C_USE_WAIT */
+ uint32_t timeout = 0xfffff;
+ while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
+ ;
}
diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index f1f065359..0b95a893d 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -142,7 +142,7 @@ struct I2CDriver{
/**
* @brief Thread waiting for I/O completion.
*/
- Thread *thread;
+ Thread *id_thread;
#endif /* I2C_USE_WAIT */
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__)