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author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-07 17:57:42 +0000 |
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committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-07 17:57:42 +0000 |
commit | 0738591b023a4e2c6cacebadebfef08aafea4d6e (patch) | |
tree | 548902f7ec4920c84a90b39b514d0def5054a5da /os/hal/platforms | |
parent | ac8123d2da74ac0bb6cb2d968bf79fe48905ad87 (diff) | |
download | ChibiOS-0738591b023a4e2c6cacebadebfef08aafea4d6e.tar.gz ChibiOS-0738591b023a4e2c6cacebadebfef08aafea4d6e.tar.bz2 ChibiOS-0738591b023a4e2c6cacebadebfef08aafea4d6e.zip |
I2C. Switch to synchronous model.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3570 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms')
-rw-r--r-- | os/hal/platforms/STM32/i2c_lld.c | 36 | ||||
-rw-r--r-- | os/hal/platforms/STM32/i2c_lld.h | 15 |
2 files changed, 21 insertions, 30 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index f3291f819..1345c847b 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -185,8 +185,6 @@ static void i2c_serve_event_interrupt(I2CDriver *i2cp) { } else i2cp->id_i2c->CR1 |= I2C_CR1_STOP; - while(i2cp->id_i2c->CR1 & I2C_CR1_STOP) - ; _i2c_isr_code(i2cp, i2cp->id_slave_config); break; @@ -205,8 +203,6 @@ static void i2c_lld_serve_rx_end_irq(I2CDriver *i2cp){ dmaStreamDisable(i2cp->dmarx); i2cp->id_i2c->CR1 |= I2C_CR1_STOP; - while(i2cp->id_i2c->CR1 & I2C_CR1_STOP) - ; _i2c_isr_code(i2cp, i2cp->id_slave_config); } @@ -227,7 +223,7 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp){ * @param[in] i2cp pointer to the @p I2CDriver object */ static void i2c_serve_error_interrupt(I2CDriver *i2cp) { - i2cflags_t flags; + i2cflags_t errors; I2C_TypeDef *reg; chSysLockFromIsr(); @@ -239,43 +235,41 @@ static void i2c_serve_error_interrupt(I2CDriver *i2cp) { chSysUnlockFromIsr(); reg = i2cp->id_i2c; - flags = I2CD_NO_ERROR; + errors = I2CD_NO_ERROR; if(reg->SR1 & I2C_SR1_BERR) { /* Bus error */ reg->SR1 &= ~I2C_SR1_BERR; - flags |= I2CD_BUS_ERROR; + errors |= I2CD_BUS_ERROR; } if(reg->SR1 & I2C_SR1_ARLO) { /* Arbitration lost */ reg->SR1 &= ~I2C_SR1_ARLO; - flags |= I2CD_ARBITRATION_LOST; + errors |= I2CD_ARBITRATION_LOST; } if(reg->SR1 & I2C_SR1_AF) { /* Acknowledge fail */ reg->SR1 &= ~I2C_SR1_AF; reg->CR1 |= I2C_CR1_STOP; /* setting stop bit */ - while(i2cp->id_i2c->CR1 & I2C_CR1_STOP) - ; - flags |= I2CD_ACK_FAILURE; + errors |= I2CD_ACK_FAILURE; } if(reg->SR1 & I2C_SR1_OVR) { /* Overrun */ reg->SR1 &= ~I2C_SR1_OVR; - flags |= I2CD_OVERRUN; + errors |= I2CD_OVERRUN; } if(reg->SR1 & I2C_SR1_PECERR) { /* PEC error */ reg->SR1 &= ~I2C_SR1_PECERR; - flags |= I2CD_PEC_ERROR; + errors |= I2CD_PEC_ERROR; } if(reg->SR1 & I2C_SR1_TIMEOUT) { /* SMBus Timeout */ reg->SR1 &= ~I2C_SR1_TIMEOUT; - flags |= I2CD_TIMEOUT; + errors |= I2CD_TIMEOUT; } if(reg->SR1 & I2C_SR1_SMBALERT) { /* SMBus alert */ reg->SR1 &= ~I2C_SR1_SMBALERT; - flags |= I2CD_SMB_ALERT; + errors |= I2CD_SMB_ALERT; } - if(flags != I2CD_NO_ERROR) { /* send communication end signal */ + if(errors != I2CD_NO_ERROR) { /* send communication end signal */ chSysLockFromIsr(); - i2cAddFlagsI(i2cp, flags); + i2cAddFlagsI(i2cp, errors); chSysUnlockFromIsr(); _i2c_isr_err_code(i2cp, i2cp->id_slave_config); } @@ -523,6 +517,10 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint8_t slave_addr, dmaStreamSetTransactionSize(i2cp->dmarx, rxbytes); dmaStreamSetMode(i2cp->dmarx, ((i2cp->dmamode) | mode)); + /* wait stop bit from previouse transaction*/ + while(i2cp->id_i2c->CR1 & I2C_CR1_STOP) + ; + i2cp->id_i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN; i2cp->id_i2c->CR1 |= I2C_CR1_START | I2C_CR1_ACK; } @@ -561,6 +559,10 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint8_t slave_addr, dmaStreamSetTransactionSize(i2cp->dmatx, txbytes); dmaStreamSetMode(i2cp->dmatx, ((i2cp->dmamode) | mode)); + /* wait stop bit from previouse transaction*/ + while(i2cp->id_i2c->CR1 & I2C_CR1_STOP) + ; + i2cp->id_i2c->CR2 |= I2C_CR2_ITERREN | I2C_CR2_ITEVTEN; i2cp->id_i2c->CR1 |= I2C_CR1_START; } diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h index 2ca6b872a..4e9051e39 100644 --- a/os/hal/platforms/STM32/i2c_lld.h +++ b/os/hal/platforms/STM32/i2c_lld.h @@ -274,11 +274,6 @@ typedef struct { typedef struct I2CDriver I2CDriver; /** - * @brief Type of a structure representing an I2C slave config. - */ -typedef struct I2CSlaveConfig I2CSlaveConfig; - -/** * @brief Structure representing an I2C driver. */ struct I2CDriver{ @@ -287,12 +282,11 @@ struct I2CDriver{ */ i2cstate_t id_state; -#if I2C_USE_WAIT /** * @brief Thread waiting for I/O completion. */ Thread *id_thread; -#endif /* I2C_USE_WAIT */ + #if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__) /** @@ -308,10 +302,6 @@ struct I2CDriver{ * @brief Current configuration data. */ const I2CConfig *id_config; - /** - * @brief Current slave configuration data. - */ - const I2CSlaveConfig *id_slave_config; __IO size_t txbytes; /*!< @brief Number of bytes to be transmitted. */ __IO size_t rxbytes; /*!< @brief Number of bytes to be received. */ @@ -341,8 +331,7 @@ struct I2CDriver{ (i2cp->id_i2c->SR2 & I2C_SR2_BUSY) -/* Wait until BUSY flag is reset: a STOP has been generated on the bus - * signaling the end of transmission. Normally this wait function +/* Wait until BUSY flag is reset. Normally this wait function * does not block thread, only if slave not response it does. */ #define i2c_lld_wait_bus_free(i2cp) { \ |