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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-04-06 17:40:11 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-04-06 17:40:11 +0000 |
| commit | 85513252eea3357ce2efe177a10fc548d03669a2 (patch) | |
| tree | 62d933b09c7f8bd6cbedd863420f6bd2994e938a /os/hal/platforms/STM32F4xx | |
| parent | 03fab93a8b8809ac405e83349579fbfa8adfb7f0 (diff) | |
| download | ChibiOS-85513252eea3357ce2efe177a10fc548d03669a2.tar.gz ChibiOS-85513252eea3357ce2efe177a10fc548d03669a2.tar.bz2 ChibiOS-85513252eea3357ce2efe177a10fc548d03669a2.zip | |
Added support for timer 9 to the STM32 PWM driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5550 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F4xx')
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_isr.h | 2 | ||||
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_rcc.h | 27 |
2 files changed, 29 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32F4xx/stm32_isr.h b/os/hal/platforms/STM32F4xx/stm32_isr.h index 66095c218..2f3664f61 100644 --- a/os/hal/platforms/STM32F4xx/stm32_isr.h +++ b/os/hal/platforms/STM32F4xx/stm32_isr.h @@ -85,6 +85,7 @@ #define STM32_TIM5_HANDLER TIM5_IRQHandler
#define STM32_TIM8_UP_HANDLER TIM8_UP_IRQHandler
#define STM32_TIM8_CC_HANDLER TIM8_CC_IRQHandler
+#define STM32_TIM9_HANDLER TIM9_IRQHandler
#define STM32_TIM1_UP_NUMBER TIM1_UP_TIM10_IRQn
#define STM32_TIM1_CC_NUMBER TIM1_CC_IRQn
@@ -94,6 +95,7 @@ #define STM32_TIM5_NUMBER TIM5_IRQn
#define STM32_TIM8_UP_NUMBER TIM8_UP_TIM13_IRQn
#define STM32_TIM8_CC_NUMBER TIM8_CC_IRQn
+#define STM32_TIM9_NUMBER TIM1_BRK_TIM9_IRQn
/*
* USART units.
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index 295bbc5a3..db3f594ee 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -915,6 +915,33 @@ * @api
*/
#define rccResetTIM8() rccResetAPB2(RCC_APB2RSTR_TIM8RST)
+
+/**
+ * @brief Disables the TIM9 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
+
+/**
+ * @brief Resets the TIM8 peripheral.
+ *
+ * @api
+ */
+#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)
+
+/**
+ * @brief Enables the TIM89peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableTIM9(lp) rccEnableAPB2(RCC_APB2ENR_TIM9EN, lp)
/** @} */
/**
|