diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-05-04 09:20:30 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-05-04 09:20:30 +0000 |
| commit | 6dc59bdf42a4342127dfbef2c1284bf544295a78 (patch) | |
| tree | 00507dbd431183a5f030126bf3b48229a6666550 /os/hal/platforms/STM32 | |
| parent | 2a2598ff1b1e696b2b6f0076a419329911edac30 (diff) | |
| download | ChibiOS-6dc59bdf42a4342127dfbef2c1284bf544295a78.tar.gz ChibiOS-6dc59bdf42a4342127dfbef2c1284bf544295a78.tar.bz2 ChibiOS-6dc59bdf42a4342127dfbef2c1284bf544295a78.zip | |
ICU support for STM32 TIM9 unit.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5673 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32')
| -rw-r--r-- | os/hal/platforms/STM32/icu_lld.c | 52 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/icu_lld.h | 32 |
2 files changed, 82 insertions, 2 deletions
diff --git a/os/hal/platforms/STM32/icu_lld.c b/os/hal/platforms/STM32/icu_lld.c index ccf70bb70..2e3c4334b 100644 --- a/os/hal/platforms/STM32/icu_lld.c +++ b/os/hal/platforms/STM32/icu_lld.c @@ -87,6 +87,14 @@ ICUDriver ICUD5; ICUDriver ICUD8;
#endif
+/**
+ * @brief ICUD9 driver identifier.
+ * @note The driver ICUD9 allocates the timer TIM9 when enabled.
+ */
+#if STM32_ICU_USE_TIM9 || defined(__DOXYGEN__)
+ICUDriver ICUD9;
+#endif
+
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
@@ -297,6 +305,28 @@ CH_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) { }
#endif /* STM32_ICU_USE_TIM8 */
+#if STM32_ICU_USE_TIM9
+#if !defined(STM32_TIM9_HANDLER)
+#error "STM32_TIM9_HANDLER not defined"
+#endif
+/**
+ * @brief TIM9 interrupt handler.
+ * @note It is assumed that the various sources are only activated if the
+ * associated callback pointer is not equal to @p NULL in order to not
+ * perform an extra check in a potentially critical interrupt handler.
+ *
+ * @isr
+ */
+CH_IRQ_HANDLER(STM32_TIM9_HANDLER) {
+
+ CH_IRQ_PROLOGUE();
+
+ icu_lld_serve_interrupt(&ICUD9);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif /* STM32_ICU_USE_TIM9 */
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
@@ -343,6 +373,12 @@ void icu_lld_init(void) { icuObjectInit(&ICUD8);
ICUD8.tim = STM32_TIM8;
#endif
+
+#if STM32_ICU_USE_TIM9
+ /* Driver initialization.*/
+ icuObjectInit(&ICUD9);
+ ICUD9.tim = STM32_TIM9;
+#endif
}
/**
@@ -399,7 +435,6 @@ void icu_lld_start(ICUDriver *icup) { icup->clock = STM32_TIMCLK1;
}
#endif
-
#if STM32_ICU_USE_TIM5
if (&ICUD5 == icup) {
rccEnableTIM5(FALSE);
@@ -420,6 +455,15 @@ void icu_lld_start(ICUDriver *icup) { icup->clock = STM32_TIMCLK2;
}
#endif
+#if STM32_ICU_USE_TIM9
+ if (&ICUD9 == icup) {
+ rccEnableTIM9(FALSE);
+ rccResetTIM9();
+ nvicEnableVector(STM32_TIM9_NUMBER,
+ CORTEX_PRIORITY_MASK(STM32_ICU_TIM9_IRQ_PRIORITY));
+ icup->clock = STM32_TIMCLK1;
+ }
+#endif
}
else {
/* Driver re-configuration scenario, it must be stopped first.*/
@@ -541,6 +585,12 @@ void icu_lld_stop(ICUDriver *icup) { rccDisableTIM8(FALSE);
}
#endif
+#if STM32_ICU_USE_TIM9
+ if (&ICUD9 == icup) {
+ nvicDisableVector(STM32_TIM9_NUMBER);
+ rccDisableTIM9(FALSE);
+ }
+#endif
}
}
diff --git a/os/hal/platforms/STM32/icu_lld.h b/os/hal/platforms/STM32/icu_lld.h index 90d401969..ee5f313f3 100644 --- a/os/hal/platforms/STM32/icu_lld.h +++ b/os/hal/platforms/STM32/icu_lld.h @@ -94,6 +94,15 @@ #endif
/**
+ * @brief ICUD9 driver enable switch.
+ * @details If set to @p TRUE the support for ICUD9 is included.
+ * @note The default is @p TRUE.
+ */
+#if !defined(STM32_ICU_USE_TIM9) || defined(__DOXYGEN__)
+#define STM32_ICU_USE_TIM9 FALSE
+#endif
+
+/**
* @brief ICUD1 interrupt priority level setting.
*/
#if !defined(STM32_ICU_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
@@ -134,6 +143,13 @@ #if !defined(STM32_ICU_TIM8_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#endif
+
+/**
+ * @brief ICUD9 interrupt priority level setting.
+ */
+#if !defined(STM32_ICU_TIM9_IRQ_PRIORITY) || defined(__DOXYGEN__)
+#define STM32_ICU_TIM9_IRQ_PRIORITY 7
+#endif
/** @} */
/*===========================================================================*/
@@ -164,9 +180,14 @@ #error "TIM8 not present in the selected device"
#endif
+#if STM32_ICU_USE_TIM9 && !STM32_HAS_TIM9
+#error "TIM9 not present in the selected device"
+#endif
+
#if !STM32_ICU_USE_TIM1 && !STM32_ICU_USE_TIM2 && \
!STM32_ICU_USE_TIM3 && !STM32_ICU_USE_TIM4 && \
- !STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8
+ !STM32_ICU_USE_TIM5 && !STM32_ICU_USE_TIM8 && \
+ !STM32_ICU_USE_TIM9
#error "ICU driver activated but no TIM peripheral assigned"
#endif
@@ -200,6 +221,11 @@ #error "Invalid IRQ priority assigned to TIM8"
#endif
+#if STM32_ICU_USE_TIM9 && \
+ !CORTEX_IS_VALID_KERNEL_PRIORITY(STM32_ICU_TIM9_IRQ_PRIORITY)
+#error "Invalid IRQ priority assigned to TIM9"
+#endif
+
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
@@ -355,6 +381,10 @@ extern ICUDriver ICUD5; extern ICUDriver ICUD8;
#endif
+#if STM32_ICU_USE_TIM9 && !defined(__DOXYGEN__)
+extern ICUDriver ICUD9;
+#endif
+
#ifdef __cplusplus
extern "C" {
#endif
|
