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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-02-07 14:12:58 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2017-02-07 14:12:58 +0000 |
| commit | e3d87e924536a80ae78fe6868f34a4d4a8bc1ecc (patch) | |
| tree | 8ad6ec935b13c0e449d40e1ba265ad25f43aa1d4 /os/common | |
| parent | 8872d9680cc3b2a91e1a818f02f9befa7811ceb7 (diff) | |
| download | ChibiOS-e3d87e924536a80ae78fe6868f34a4d4a8bc1ecc.tar.gz ChibiOS-e3d87e924536a80ae78fe6868f34a4d4a8bc1ecc.tar.bz2 ChibiOS-e3d87e924536a80ae78fe6868f34a4d4a8bc1ecc.zip | |
Unified HighTec and plain GCC compiler ports for e200z. Demos defaulted to GCC.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10097 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/common')
41 files changed, 1094 insertions, 5645 deletions
diff --git a/os/common/ports/e200/compilers/GCC/chcoreasm.S b/os/common/ports/e200/compilers/GCC/chcoreasm.S index 80e6dd0eb..d5a01464f 100644 --- a/os/common/ports/e200/compilers/GCC/chcoreasm.S +++ b/os/common/ports/e200/compilers/GCC/chcoreasm.S @@ -106,8 +106,8 @@ _port_thread_start: mtctr r30
se_bctrl
#if defined(_CHIBIOS_RT_CONF_)
- li r0, 0
- bl chThdExit
+ e_li r0, 0
+ e_bl chThdExit
#endif
#if defined(_CHIBIOS_NIL_CONF_)
se_li r0, 0
diff --git a/os/common/ports/e200/compilers/GCC/ivor.S b/os/common/ports/e200/compilers/GCC/ivor.S index 8f1c61c65..fc6ec7eb8 100644 --- a/os/common/ports/e200/compilers/GCC/ivor.S +++ b/os/common/ports/e200/compilers/GCC/ivor.S @@ -58,7 +58,7 @@ .type _IVOR10, @function
_IVOR10:
/* Saving the external context (port_extctx structure).*/
- stwu sp, -80(sp)
+ e_stwu sp, -80(sp)
#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
e_stmvsrrw 8(sp) /* Saves PC, MSR. */
e_stmvsprw 16(sp) /* Saves CR, LR, CTR, XER. */
@@ -91,11 +91,11 @@ _IVOR10: /* Increasing the SPGR0 register.*/
mfspr r0, 272
- eaddi r0, r0, 1
+ se_addi r0, 1
mtspr 272, r0
/* Reset DIE bit in TSR register.*/
- lis r3, 0x0800 /* DIS bit mask. */
+ e_lis r3, 0x0800 /* DIS bit mask. */
mtspr 336, r3 /* TSR register. */
/* Restoring pre-IRQ MSR register value.*/
@@ -107,14 +107,14 @@ _IVOR10: mtMSR r0
#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_enter_isr
- bl _dbg_check_lock_from_isr
+ e_bl _dbg_check_enter_isr
+ e_bl _dbg_check_lock_from_isr
#endif
/* System tick handler invocation.*/
- bl chSysTimerHandlerI
+ e_bl chSysTimerHandlerI
#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock_from_isr
- bl _dbg_check_leave_isr
+ e_bl _dbg_check_unlock_from_isr
+ e_bl _dbg_check_leave_isr
#endif
#if PPC_USE_IRQ_PREEMPTION
@@ -123,7 +123,7 @@ _IVOR10: #endif
/* Jumps to the common IVOR epilogue code.*/
- b _ivor_exit
+ e_b _ivor_exit
#endif /* PPC_SUPPORTS_DECREMENTER */
/*
diff --git a/os/common/ports/e200/compilers/HighTec/chcoreasm.S b/os/common/ports/e200/compilers/HighTec/chcoreasm.S deleted file mode 100755 index a4016f1ea..000000000 --- a/os/common/ports/e200/compilers/HighTec/chcoreasm.S +++ /dev/null @@ -1,115 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file e200/compilers/GCC/chcoreasm.s
- * @brief Power Architecture port low level code.
- *
- * @addtogroup PPC_GCC_CORE
- * @{
- */
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-#if !defined(FALSE) || defined(__DOXYGEN__)
-#define FALSE 0
-#endif
-
-#if !defined(TRUE) || defined(__DOXYGEN__)
-#define TRUE 1
-#endif
-
-/*===========================================================================*/
-/* Code section. */
-/*===========================================================================*/
-
-#define _FROM_ASM_
-#include "chlicense.h"
-#include "chconf.h"
-#include "chcore.h"
-
-#if !defined(__DOXYGEN__)
-
-/*
- * RTOS-specific context offset.
- */
-#if defined(_CHIBIOS_RT_CONF_)
-#define CONTEXT_OFFSET 12
-#elif defined(_CHIBIOS_NIL_CONF_)
-#define CONTEXT_OFFSET 0
-#else
-#error "invalid chconf.h"
-#endif
-
-#if PPC_USE_VLE == TRUE
- .section .text_vle, "ax"
-#else
- .section .text, "ax"
-#endif
-
- .align 2
- .globl _port_switch
- .type _port_switch, @function
-_port_switch:
- subi %sp, %sp, 80
- mflr %r0
- stw %r0, 84(%sp)
- mfcr %r0
- stw %r0, 0(%sp)
- stmw %r14, 4(%sp)
-
- stw %sp, 12(%r4)
- lwz %sp, 12(%r3)
-
- lmw %r14, 4(%sp)
- lwz %r0, 0(%sp)
- mtcr %r0
- lwz %r0, 84(%sp)
- mtlr %r0
- addi %sp, %sp, 80
- blr
-
- .align 2
- .globl _port_thread_start
- .type _port_thread_start, @function
-_port_thread_start:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock
-#endif
-#if CH_DBG_STATISTICS
- bl _stats_stop_measure_crit_thd
-#endif
- wrteei 1
- mr %r3, %r31
- mtctr %r30
- bctrl
-#if defined(_CHIBIOS_RT_CONF_)
- li %r0, 0
- bl chThdExit
-#endif
-#if defined(_CHIBIOS_NIL_CONF_)
- se_li %r0, 0
- e_bl chSysHalt
-#endif
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/chtypes.h b/os/common/ports/e200/compilers/HighTec/chtypes.h deleted file mode 100755 index 20a601e93..000000000 --- a/os/common/ports/e200/compilers/HighTec/chtypes.h +++ /dev/null @@ -1,115 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file e200/compilers/GCC/chtypes.h
- * @brief Power e200 port system types.
- *
- * @addtogroup PPC_GCC_CORE
- * @{
- */
-
-#ifndef CHTYPES_H
-#define CHTYPES_H
-
-#include <stddef.h>
-#include <stdint.h>
-#include <stdbool.h>
-
-/**
- * @name Common constants
- */
-/**
- * @brief Generic 'false' boolean constant.
- */
-#if !defined(FALSE) || defined(__DOXYGEN__)
-#define FALSE 0
-#endif
-
-/**
- * @brief Generic 'true' boolean constant.
- */
-#if !defined(TRUE) || defined(__DOXYGEN__)
-#define TRUE 1
-#endif
-/** @} */
-
-/**
- * @name Kernel types
- * @{
- */
-typedef uint32_t rtcnt_t; /**< Realtime counter. */
-typedef uint64_t rttime_t; /**< Realtime accumulator. */
-typedef uint32_t syssts_t; /**< System status word. */
-typedef uint8_t tmode_t; /**< Thread flags. */
-typedef uint8_t tstate_t; /**< Thread state. */
-typedef uint8_t trefs_t; /**< Thread references counter. */
-typedef uint8_t tslices_t; /**< Thread time slices counter.*/
-typedef uint32_t tprio_t; /**< Thread priority. */
-typedef int32_t msg_t; /**< Inter-thread message. */
-typedef int32_t eventid_t; /**< Numeric event identifier. */
-typedef uint32_t eventmask_t; /**< Mask of event identifiers. */
-typedef uint32_t eventflags_t; /**< Mask of event flags. */
-typedef int32_t cnt_t; /**< Generic signed counter. */
-typedef uint32_t ucnt_t; /**< Generic unsigned counter. */
-/** @} */
-
-/**
- * @brief ROM constant modifier.
- * @note It is set to use the "const" keyword in this port.
- */
-#define ROMCONST const
-
-/**
- * @brief Makes functions not inlineable.
- * @note If the compiler does not support such attribute then some
- * time-dependent services could be degraded.
- */
-#define NOINLINE __attribute__((noinline))
-
-/**
- * @brief Optimized thread function declaration macro.
- */
-#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg)
-
-/**
- * @brief Packed variable specifier.
- */
-#define PACKED_VAR __attribute__((packed))
-
-/**
- * @brief Memory alignment enforcement for variables.
- */
-#define ALIGNED_VAR(n) __attribute__((aligned(n)))
-
-/**
- * @brief Size of a pointer.
- * @note To be used where the sizeof operator cannot be used, preprocessor
- * expressions for example.
- */
-#define SIZEOF_PTR 4
-
-/**
- * @brief True if alignment is low-high in current architecture.
- */
-#define REVERSE_ORDER 0
-
-#endif /* CHTYPES_H */
-
-/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/ivor.S b/os/common/ports/e200/compilers/HighTec/ivor.S deleted file mode 100755 index 53f84f96c..000000000 --- a/os/common/ports/e200/compilers/HighTec/ivor.S +++ /dev/null @@ -1,259 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio.
-
- This file is part of ChibiOS.
-
- ChibiOS is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 3 of the License, or
- (at your option) any later version.
-
- ChibiOS is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program. If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file ivor.s
- * @brief Kernel ISRs.
- *
- * @addtogroup PPC_CORE
- * @{
- */
-
-#if !defined(FALSE) || defined(__DOXYGEN__)
-#define FALSE 0
-#endif
-
-#if !defined(TRUE) || defined(__DOXYGEN__)
-#define TRUE 1
-#endif
-
-/*
- * Imports the PPC configuration headers.
- */
-#define _FROM_ASM_
-#include "chlicense.h"
-#include "chconf.h"
-#include "chcore.h"
-
-#if !defined(__DOXYGEN__)
-
- .section .handlers, "ax"
-
-#if PPC_SUPPORTS_DECREMENTER
- /*
- * _IVOR10 handler (Book-E decrementer).
- */
- .align 4
- .globl _IVOR10
- .type _IVOR10, @function
-_IVOR10:
- /* Saving the external context (port_extctx structure).*/
- stwu %sp, -80(%sp)
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
-#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
-
- /* Increasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, 1
- mtspr 272, %r0
-
- /* Reset DIE bit in TSR register.*/
- lis %r3, 0x0800 /* DIS bit mask. */
- mtspr 336, %r3 /* TSR register. */
-
- /* Restoring pre-IRQ MSR register value.*/
- mfSRR1 %r0
-#if !PPC_USE_IRQ_PREEMPTION
- /* No preemption, keeping EE disabled.*/
- se_bclri %r0, 16 /* EE = bit 16. */
-#endif
- mtMSR %r0
-
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_enter_isr
- bl _dbg_check_lock_from_isr
-#endif
- /* System tick handler invocation.*/
- bl chSysTimerHandlerI
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock_from_isr
- bl _dbg_check_leave_isr
-#endif
-
-#if PPC_USE_IRQ_PREEMPTION
- /* Prevents preemption again.*/
- wrteei 0
-#endif
-
- /* Jumps to the common IVOR epilogue code.*/
- b _ivor_exit
-#endif /* PPC_SUPPORTS_DECREMENTER */
-
- /*
- * _IVOR4 handler (Book-E external interrupt).
- */
- .align 4
- .globl _IVOR4
- .type _IVOR4, @function
-_IVOR4:
- /* Saving the external context (port_extctx structure).*/
- stwu %sp, -80(%sp)
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_stmvsrrw 8(%sp) /* Saves PC, MSR. */
- e_stmvsprw 16(%sp) /* Saves CR, LR, CTR, XER. */
- e_stmvgprw 32(%sp) /* Saves GPR0, GPR3...GPR12. */
-#else /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- stw %r0, 32(%sp) /* Saves GPR0. */
- mfSRR0 %r0
- stw %r0, 8(%sp) /* Saves PC. */
- mfSRR1 %r0
- stw %r0, 12(%sp) /* Saves MSR. */
- mfCR %r0
- stw %r0, 16(%sp) /* Saves CR. */
- mfLR %r0
- stw %r0, 20(%sp) /* Saves LR. */
- mfCTR %r0
- stw %r0, 24(%sp) /* Saves CTR. */
- mfXER %r0
- stw %r0, 28(%sp) /* Saves XER. */
- stw %r3, 36(%sp) /* Saves GPR3...GPR12. */
- stw %r4, 40(%sp)
- stw %r5, 44(%sp)
- stw %r6, 48(%sp)
- stw %r7, 52(%sp)
- stw %r8, 56(%sp)
- stw %r9, 60(%sp)
- stw %r10, 64(%sp)
- stw %r11, 68(%sp)
- stw %r12, 72(%sp)
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
-
- /* Increasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, 1
- mtspr 272, %r0
-
- /* Software vector address from the INTC register.*/
- lis %r3, INTC_IACKR_ADDR@h
- ori %r3, %r3, INTC_IACKR_ADDR@l /* IACKR register address. */
- lwz %r3, 0(%r3) /* IACKR register value. */
- lwz %r3, 0(%r3)
- mtCTR %r3 /* Software handler address. */
-
- /* Restoring pre-IRQ MSR register value.*/
- mfSRR1 %r0
-#if !PPC_USE_IRQ_PREEMPTION
- /* No preemption, keeping EE disabled.*/
- se_bclri %r0, 16 /* EE = bit 16. */
-#endif
- mtMSR %r0
-
- /* Exectes the software handler.*/
- bctrl
-
-#if PPC_USE_IRQ_PREEMPTION
- /* Prevents preemption again.*/
- wrteei 0
-#endif
-
- /* Informs the INTC that the interrupt has been served.*/
- mbar 0
- lis %r3, INTC_EOIR_ADDR@h
- ori %r3, %r3, INTC_EOIR_ADDR@l
- stw %r3, 0(%r3) /* Writing any value should do. */
-
- /* Common IVOR epilogue code, context restore.*/
- .globl _ivor_exit
-_ivor_exit:
- /* Decreasing the SPGR0 register.*/
- mfspr %r0, 272
- eaddi %r0, %r0, -1
- mtspr 272, %r0
-
-#if CH_DBG_STATISTICS
- bl _stats_start_measure_crit_thd
-#endif
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_lock
-#endif
- bl chSchIsPreemptionRequired
- cmpli cr0, %r3, 0
- beq cr0, .noresch
- bl chSchDoReschedule
-.noresch:
-#if CH_DBG_SYSTEM_STATE_CHECK
- bl _dbg_check_unlock
-#endif
-#if CH_DBG_STATISTICS
- bl _stats_stop_measure_crit_thd
-#endif
-
- /* Restoring the external context.*/
-#if PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI
- e_lmvgprw 32(%sp) /* Restores GPR0, GPR3...GPR12. */
- e_lmvsprw 16(%sp) /* Restores CR, LR, CTR, XER. */
- e_lmvsrrw 8(%sp) /* Restores PC, MSR. */
-#else /*!(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- lwz %r3, 36(%sp) /* Restores GPR3...GPR12. */
- lwz %r4, 40(%sp)
- lwz %r5, 44(%sp)
- lwz %r6, 48(%sp)
- lwz %r7, 52(%sp)
- lwz %r8, 56(%sp)
- lwz %r9, 60(%sp)
- lwz %r10, 64(%sp)
- lwz %r11, 68(%sp)
- lwz %r12, 72(%sp)
- lwz %r0, 8(%sp)
- mtSRR0 %r0 /* Restores PC. */
- lwz %r0, 12(%sp)
- mtSRR1 %r0 /* Restores MSR. */
- lwz %r0, 16(%sp)
- mtCR %r0 /* Restores CR. */
- lwz %r0, 20(%sp)
- mtLR %r0 /* Restores LR. */
- lwz %r0, 24(%sp)
- mtCTR %r0 /* Restores CTR. */
- lwz %r0, 28(%sp)
- mtXER %r0 /* Restores XER. */
- lwz %r0, 32(%sp) /* Restores GPR0. */
-#endif /* !(PPC_USE_VLE && PPC_SUPPORTS_VLE_MULTI) */
- addi %sp, %sp, 80 /* Back to the previous frame. */
- rfi
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/common/ports/e200/compilers/HighTec/mk/port.mk b/os/common/ports/e200/compilers/HighTec/mk/port.mk deleted file mode 100755 index 51704e91f..000000000 --- a/os/common/ports/e200/compilers/HighTec/mk/port.mk +++ /dev/null @@ -1,8 +0,0 @@ -# List of the ChibiOS/RT e200 generic port files.
-PORTSRC = $(CHIBIOS)/os/common/ports/e200/chcore.c
-
-PORTASM = $(CHIBIOS)/os/common/ports/e200/compilers/HighTec/ivor.S \
- $(CHIBIOS)/os/common/ports/e200/compilers/HighTec/chcoreasm.S
-
-PORTINC = $(CHIBIOS)/os/common/ports/e200 \
- $(CHIBIOS)/os/common/ports/e200/compilers/HighTec
diff --git a/os/common/startup/e200/compilers/HighTec/crt0.S b/os/common/startup/e200/compilers/HighTec/crt0.S deleted file mode 100644 index 007b55d3b..000000000 --- a/os/common/startup/e200/compilers/HighTec/crt0.S +++ /dev/null @@ -1,242 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file GCC/crt0.s
- * @brief Generic PowerPC startup file for GCC.
- *
- * @addtogroup PPC_GCC_CORE
- * @{
- */
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-#if !defined(FALSE) || defined(__DOXYGEN__)
-#define FALSE 0
-#endif
-
-#if !defined(TRUE) || defined(__DOXYGEN__)
-#define TRUE 1
-#endif
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/**
- * @brief Stack segments initialization switch.
- */
-#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
-#define CRT0_STACKS_FILL_PATTERN 0x55555555
-#endif
-
-/**
- * @brief Stack segments initialization switch.
- */
-#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
-#define CRT0_INIT_STACKS TRUE
-#endif
-
-/**
- * @brief DATA segment initialization switch.
- */
-#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
-#define CRT0_INIT_DATA TRUE
-#endif
-
-/**
- * @brief BSS segment initialization switch.
- */
-#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
-#define CRT0_INIT_BSS TRUE
-#endif
-
-/**
- * @brief Constructors invocation switch.
- */
-#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
-#define CRT0_CALL_CONSTRUCTORS TRUE
-#endif
-
-/**
- * @brief Destructors invocation switch.
- */
-#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
-#define CRT0_CALL_DESTRUCTORS TRUE
-#endif
-
-/*===========================================================================*/
-/* Code section. */
-/*===========================================================================*/
-
-#if !defined(__DOXYGEN__)
-
- .section .crt0, "ax"
- .align 2
- .globl _boot_address
- .type _boot_address, @function
-_boot_address:
- /* Stack setup.*/
- lis %r1, __process_stack_end__@h
- ori %r1, %r1, __process_stack_end__@l
- li %r0, 0
- stwu %r0, -8(%r1)
-
- /* Small sections registers initialization.*/
- lis %r2, __sdata2_start__@h
- ori %r2, %r2, __sdata2_start__@l
- lis %r13, __sdata_start__@h
- ori %r13, %r13, __sdata_start__@l
-
- /* Early initialization.*/
- bl __early_init
-
-#if CRT0_INIT_STACKS == TRUE
- /* Stacks fill pattern.*/
- lis %r7, CRT0_STACKS_FILL_PATTERN@h
- ori %r7, %r7, CRT0_STACKS_FILL_PATTERN@l
-
- /* IRQ Stack initialization. Note, the architecture does not use this
- stack, the size is usually zero. An OS can have special SW handling
- and require this. A 4 bytes alignment is assmend and required.*/
- lis %r4, __irq_stack_base__@h
- ori %r4, %r4, __irq_stack_base__@l
- lis %r5, __irq_stack_end__@h
- ori %r5, %r5, __irq_stack_end__@l
-.irqsloop:
- cmpl cr0, %r4, %r5
- bge cr0, .irqsend
- stw %r7, 0(%r4)
- addi %r4, %r4, 4
- b .irqsloop
-.irqsend:
-
- /* Process Stack initialization. Note, does not overwrite the already
- written EABI frame. A 4 bytes alignment is assmend and required.*/
- lis %r4, __process_stack_base__@h
- ori %r4, %r4, __process_stack_base__@l
- lis %r5, (__process_stack_end__ - 8)@h
- ori %r5, %r5, (__process_stack_end__ - 8)@l
-.prcsloop:
- cmpl cr0, %r4, %r5
- bge cr0, .prcsend
- stw %r7, 0(%r4)
- addi %r4, %r4, 4
- b .prcsloop
-.prcsend:
-#endif
-
-#if CRT0_INIT_BSS == TRUE
- /* BSS clearing.*/
- lis %r4, __bss_start__@h
- ori %r4, %r4, __bss_start__@l
- lis %r5, __bss_end__@h
- ori %r5, %r5, __bss_end__@l
- li %r7, 0
-.bssloop:
- cmpl cr0, %r4, %r5
- bge cr0, .bssend
- stw %r7, 0(%r4)
- addi %r4, %r4, 4
- b .bssloop
-.bssend:
-#endif
-
-#if CRT0_INIT_DATA == TRUE
- /* DATA initialization.*/
- lis %r4, __romdata_start__@h
- ori %r4, %r4, __romdata_start__@l
- lis %r5, __data_start__@h
- ori %r5, %r5, __data_start__@l
- lis %r6, __data_end__@h
- ori %r6, %r6, __data_end__@l
-.dataloop:
- cmpl cr0, %r5, %r6
- bge cr0, .dataend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .dataloop
-.dataend:
-#endif
-
- /* Late initialization.*/
- bl __late_init
-
-#if CRT0_CALL_CONSTRUCTORS == TRUE
- /* Constructors invocation.*/
- lis %r4, __init_array_start@h
- ori %r4, %r4, __init_array_start@l
- lis %r5, __init_array_end@h
- ori %r5, %r5, __init_array_end@l
-.iniloop:
- cmplw %cr0, %r4, %r5
- bge %cr0, .iniend
- lwz %r6, 0(%r4)
- mtctr %r6
- addi %r4, %r4, 4
- bctrl
- b .iniloop
-.iniend:
-#endif
-
- /* Main program invocation.*/
- bl main
-
-#if CRT0_CALL_DESTRUCTORS == TRUE
- /* Destructors invocation.*/
- lis %r4, __fini_array_start@h
- ori %r4, %r4, __fini_array_start@l
- lis %r5, __fini_array_end@h
- ori %r5, %r5, __fini_array_end@l
-.finiloop:
- cmplw %cr0, %r4, %r5
- bge %cr0, .finiend
- lwz %r6, 0(%r4)
- mtctr %r6
- addi %r4, %r4, 4
- bctrl
- b .finiloop
-.finiend:
-#endif
-
- /* Branching to the defined exit handler.*/
- b __default_exit
-
- /* Default main exit code, infinite loop.*/
- .weak __default_exit
- .type __default_exit, @function
-__default_exit:
- b __default_exit
-
- /* Default early initialization code, none.*/
- .weak __early_init
- .type __early_init, @function
-__early_init:
- blr
-
- /* Default late initialization code, none.*/
- .weak __late_init
- .type __late_init, @function
-__late_init:
- blr
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC560B50.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC560B50.ld deleted file mode 100755 index a7b6eabe1..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC560B50.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC560B50 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 512k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 32k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC560B60.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC560B60.ld deleted file mode 100755 index b2f85efbb..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC560B60.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC560B60 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 1024k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 80k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC560B64.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC560B64.ld deleted file mode 100755 index 019dd939b..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC560B64.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC560B64 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 1536k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 96k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC560D40.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC560D40.ld deleted file mode 100755 index 2d3459fd4..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC560D40.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC560D40 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 256k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 16k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC560P50.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC560P50.ld deleted file mode 100755 index 2b591d4d8..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC560P50.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC560P50 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 512k
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 40k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC563M64.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC563M64.ld deleted file mode 100755 index eb6e1664d..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC563M64.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC563M64 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 1536k
- ram : org = 0x40000000, len = 94k
-}
-
-INCLUDE rules_z3.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC564A70.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC564A70.ld deleted file mode 100755 index af062aa88..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC564A70.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC563A70 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 2M
- ram : org = 0x40000000, len = 128k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC564A80.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC564A80.ld deleted file mode 100755 index 53341a5dd..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC564A80.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC563A80 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 4M
- ram : org = 0x40000000, len = 192k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC56EC74.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC56EC74.ld deleted file mode 100755 index e1fe154ed..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC56EC74.ld +++ /dev/null @@ -1,27 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC56EC74 memory setup.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 3M
- dataflash : org = 0x00800000, len = 64k
- ram : org = 0x40000000, len = 256k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL54_LSM.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC56EL54_LSM.ld deleted file mode 100755 index 177525eee..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL54_LSM.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC56EL54 memory setup in LSM mode.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 768k
- ram : org = 0x40000000, len = 128k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL60_LSM.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC56EL60_LSM.ld deleted file mode 100755 index d06f8b812..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL60_LSM.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC56EL60 memory setup in LSM mode.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 1M
- ram : org = 0x40000000, len = 128k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL70_LSM.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC56EL70_LSM.ld deleted file mode 100755 index c336acece..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC56EL70_LSM.ld +++ /dev/null @@ -1,26 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC56EL70 memory setup in LSM mode.
- */
-MEMORY
-{
- flash : org = 0x00000000, len = 2M
- ram : org = 0x40000000, len = 192k
-}
-
-INCLUDE rules_z4.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/SPC57EM80_HSM.ld b/os/common/startup/e200/compilers/HighTec/ld/SPC57EM80_HSM.ld deleted file mode 100755 index 8bd3dbbd9..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/SPC57EM80_HSM.ld +++ /dev/null @@ -1,28 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * SPC57EM80-HSM memory setup.
- */
-MEMORY
-{
- flash : org = 0x0060C000, len = 144k
- dflash0 : org = 0x00680000, len = 16k
- dflash1 : org = 0x00684000, len = 16k
- ram : org = 0xA0000000, len = 40k
-}
-
-INCLUDE rules_z0.ld
diff --git a/os/common/startup/e200/compilers/HighTec/ld/rules_z0.ld b/os/common/startup/e200/compilers/HighTec/ld/rules_z0.ld deleted file mode 100755 index 4b421b842..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/rules_z0.ld +++ /dev/null @@ -1,159 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-ENTRY(_reset_address)
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.boot))
- } > flash
-
- .boot1 : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- /* The vectors table requires a 2kB alignment.*/
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- /* The IVPR register requires a 4kB alignment.*/
- . = ALIGN(0x1000);
- __ivpr_base__ = .;
- KEEP(*(.ivors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks : ALIGN(16) SUBALIGN(16)
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/common/startup/e200/compilers/HighTec/ld/rules_z3.ld b/os/common/startup/e200/compilers/HighTec/ld/rules_z3.ld deleted file mode 100755 index f69a01ff4..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/rules_z3.ld +++ /dev/null @@ -1,156 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-ENTRY(_reset_address)
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.boot))
- } > flash
-
- .boot1 : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- /* The vectors table requires a 2kB alignment.*/
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks : ALIGN(16) SUBALIGN(16)
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/common/startup/e200/compilers/HighTec/ld/rules_z4.ld b/os/common/startup/e200/compilers/HighTec/ld/rules_z4.ld deleted file mode 100755 index f69a01ff4..000000000 --- a/os/common/startup/e200/compilers/HighTec/ld/rules_z4.ld +++ /dev/null @@ -1,156 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-__ram_size__ = LENGTH(ram);
-__ram_start__ = ORIGIN(ram);
-__ram_end__ = ORIGIN(ram) + LENGTH(ram);
-
-ENTRY(_reset_address)
-
-SECTIONS
-{
- . = ORIGIN(flash);
- .boot0 : ALIGN(16) SUBALIGN(16)
- {
- __ivpr_base__ = .;
- KEEP(*(.boot))
- } > flash
-
- .boot1 : ALIGN(16) SUBALIGN(16)
- {
- KEEP(*(.handlers))
- KEEP(*(.crt0))
- /* The vectors table requires a 2kB alignment.*/
- . = ALIGN(0x800);
- KEEP(*(.vectors))
- } > flash
-
- constructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__init_array_start = .);
- KEEP(*(SORT(.init_array.*)))
- KEEP(*(.init_array))
- PROVIDE(__init_array_end = .);
- } > flash
-
- destructors : ALIGN(4) SUBALIGN(4)
- {
- PROVIDE(__fini_array_start = .);
- KEEP(*(.fini_array))
- KEEP(*(SORT(.fini_array.*)))
- PROVIDE(__fini_array_end = .);
- } > flash
-
- .text_vle : ALIGN(16) SUBALIGN(16)
- {
- *(.text_vle)
- *(.text_vle.*)
- *(.gnu.linkonce.t_vle.*)
- } > flash
-
- .text : ALIGN(16) SUBALIGN(16)
- {
- *(.text)
- *(.text.*)
- *(.gnu.linkonce.t.*)
- } > flash
-
- .rodata : ALIGN(16) SUBALIGN(16)
- {
- *(.glue_7t)
- *(.glue_7)
- *(.gcc*)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- } > flash
-
- .sdata2 : ALIGN(16) SUBALIGN(16)
- {
- __sdata2_start__ = . + 0x8000;
- *(.sdata2)
- *(.sdata2.*)
- *(.gnu.linkonce.s2.*)
- *(.sbss2)
- *(.sbss2.*)
- *(.gnu.linkonce.sb2.*)
- } > flash
-
- .eh_frame_hdr :
- {
- *(.eh_frame_hdr)
- } > flash
-
- .eh_frame : ONLY_IF_RO
- {
- *(.eh_frame)
- } > flash
-
- .romdata : ALIGN(16) SUBALIGN(16)
- {
- __romdata_start__ = .;
- } > flash
-
- .stacks : ALIGN(16) SUBALIGN(16)
- {
- . = ALIGN(8);
- __irq_stack_base__ = .;
- . += __irq_stack_size__;
- . = ALIGN(8);
- __irq_stack_end__ = .;
- __process_stack_base__ = .;
- __main_thread_stack_base__ = .;
- . += __process_stack_size__;
- . = ALIGN(8);
- __process_stack_end__ = .;
- __main_thread_stack_end__ = .;
- } > ram
-
- .data : AT(__romdata_start__)
- {
- . = ALIGN(4);
- __data_start__ = .;
- *(.data)
- *(.data.*)
- *(.gnu.linkonce.d.*)
- __sdata_start__ = . + 0x8000;
- *(.sdata)
- *(.sdata.*)
- *(.gnu.linkonce.s.*)
- __data_end__ = .;
- } > ram
-
- .sbss :
- {
- __bss_start__ = .;
- *(.sbss)
- *(.sbss.*)
- *(.gnu.linkonce.sb.*)
- *(.scommon)
- } > ram
-
- .bss :
- {
- *(.bss)
- *(.bss.*)
- *(.gnu.linkonce.b.*)
- *(COMMON)
- __bss_end__ = .;
- } > ram
-
- __heap_base__ = __bss_end__;
- __heap_end__ = __ram_end__;
-}
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bcxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bcxx.mk deleted file mode 100755 index 33dcff578..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bcxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z0 SPC560BCxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560BCxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC560BCxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bxx.mk deleted file mode 100755 index a8c9c541e..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560bxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z0 SPC560Bxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Bxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC560Bxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560dxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc560dxx.mk deleted file mode 100755 index c77b3cc9d..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560dxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z0 SPC560Dxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Dxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC560Dxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560pxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc560pxx.mk deleted file mode 100755 index 9840400fe..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc560pxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z0 SPC560Pxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC560Pxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC560Pxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc563mxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc563mxx.mk deleted file mode 100755 index 74b27d4dc..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc563mxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z3 SPC563Mxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC563Mxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC563Mxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc564axx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc564axx.mk deleted file mode 100755 index 4032fa244..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc564axx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z4 SPC564Axx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC564Axx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC564Axx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc56ecxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc56ecxx.mk deleted file mode 100755 index d02310774..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc56ecxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z4 SPC56ECxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ECxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC56ECxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/mk/startup_spc56elxx.mk b/os/common/startup/e200/compilers/HighTec/mk/startup_spc56elxx.mk deleted file mode 100755 index 8ae0af043..000000000 --- a/os/common/startup/e200/compilers/HighTec/mk/startup_spc56elxx.mk +++ /dev/null @@ -1,11 +0,0 @@ -# List of the ChibiOS e200z4 SPC56ELxx startup files.
-STARTUPSRC =
-
-STARTUPASM = $(CHIBIOS)/os/common/startup/e200/devices/SPC56ELxx/boot.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/vectors.S \
- $(CHIBIOS)/os/common/startup/e200/compilers/HighTec/crt0.S
-
-STARTUPINC = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec \
- ${CHIBIOS}/os/common/startup/e200/devices/SPC56ELxx
-
-STARTUPLD = ${CHIBIOS}/os/common/startup/e200/compilers/HighTec/ld
diff --git a/os/common/startup/e200/compilers/HighTec/rules.mk b/os/common/startup/e200/compilers/HighTec/rules.mk deleted file mode 100644 index c84ebc66f..000000000 --- a/os/common/startup/e200/compilers/HighTec/rules.mk +++ /dev/null @@ -1,245 +0,0 @@ -# e200z common makefile scripts and rules.
-
-##############################################################################
-# Processing options coming from the upper Makefile.
-#
-
-# Compiler options
-OPT = $(USE_OPT)
-COPT = $(USE_COPT)
-CPPOPT = $(USE_CPPOPT)
-
-# Garbage collection
-ifeq ($(USE_LINK_GC),yes)
- OPT += -ffunction-sections -fdata-sections -fno-common
- LDOPT := --gc-sections
-else
- LDOPT := --no-gc-sections
-endif
-
-# Linker extra options
-ifneq ($(USE_LDOPT),)
- LDOPT := $(LDOPT),$(USE_LDOPT)
-endif
-
-# Link time optimizations
-ifeq ($(USE_LTO),yes)
- OPT += -flto
-endif
-
-# VLE option handling.
-ifeq ($(USE_VLE),yes)
- DDEFS += -DPPC_USE_VLE=1
- DADEFS += -DPPC_USE_VLE=1
- MCU += -mvle
-else
- DDEFS += -DPPC_USE_VLE=0
- DADEFS += -DPPC_USE_VLE=0
-endif
-
-# Process stack size
-ifeq ($(USE_PROCESS_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400
-else
- LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE)
-endif
-
-# Exceptions stack size
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
- LDOPT := $(LDOPT),--defsym=__irq_stack_size__=0x400
-else
- LDOPT := $(LDOPT),--defsym=__irq_stack_size__=$(USE_EXCEPTIONS_STACKSIZE)
-endif
-
-# Output directory and files
-ifeq ($(BUILDDIR),)
- BUILDDIR = build
-endif
-ifeq ($(BUILDDIR),.)
- BUILDDIR = build
-endif
-OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \
- $(BUILDDIR)/$(PROJECT).mot $(BUILDDIR)/$(PROJECT).bin \
- $(BUILDDIR)/$(PROJECT).dmp $(BUILDDIR)/$(PROJECT).list
-
-
-# Source files groups and paths
-SRC = $(CSRC)$(CPPSRC)
-SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(SRC)))
-
-# Various directories
-OBJDIR = $(BUILDDIR)/obj
-LSTDIR = $(BUILDDIR)/lst
-
-# Object files groups
-COBJS = $(addprefix $(OBJDIR)/, $(notdir $(CSRC:.c=.o)))
-CPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(CPPSRC:.cpp=.o)))
-ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o)))
-ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o)))
-OBJS = $(ASMXOBJS) $(ASMOBJS) $(COBJS) $(CPPOBJS)
-
-# Paths
-IINCDIR = $(patsubst %,-I%,$(INCDIR) $(DINCDIR) $(UINCDIR))
-LLIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-
-# Macros
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-
-# Libs
-LIBS = $(DLIBS) $(ULIBS)
-
-# Various settings
-MCFLAGS = -mcpu=$(MCU)
-ODFLAGS = -x --syms
-ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.s=.lst)) $(ADEFS)
-ASXFLAGS = $(MCFLAGS) -Wa,-amhls=$(LSTDIR)/$(notdir $(<:.S=.lst)) $(ADEFS)
-CFLAGS = $(MCFLAGS) $(OPT) $(COPT) $(CWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.c=.lst)) $(DEFS)
-CPPFLAGS = $(MCFLAGS) $(OPT) $(CPPOPT) $(CPPWARN) -Wa,-alms=$(LSTDIR)/$(notdir $(<:.cpp=.lst)) $(DEFS)
-LDFLAGS = $(MCFLAGS) $(OPT) -nostartfiles $(LLIBDIR) -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--library-path=$(RULESPATH)/ld,$(LDOPT),--script=$(LDSCRIPT)
-
-# Generate dependency information
-ASFLAGS += -MD -MP -MF .dep/$(@F).d
-ASXFLAGS += -MD -MP -MF .dep/$(@F).d
-CFLAGS += -MD -MP -MF .dep/$(@F).d
-CPPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-# Paths where to search for sources
-VPATH = $(SRCPATHS)
-
-#
-# Makefile rules
-#
-
-all: PRE_MAKE_ALL_RULE_HOOK $(OBJS) $(OUTFILES) POST_MAKE_ALL_RULE_HOOK
-
-PRE_MAKE_ALL_RULE_HOOK:
-
-POST_MAKE_ALL_RULE_HOOK:
-
-$(OBJS): | $(BUILDDIR) $(OBJDIR) $(LSTDIR)
-
-$(BUILDDIR):
-ifneq ($(USE_VERBOSE_COMPILE),yes)
- @echo Compiler Options
- @echo $(CC) -c $(CFLAGS) -I. $(IINCDIR) main.c -o main.o
- @echo
-endif
- @mkdir -p $(BUILDDIR)
-
-$(OBJDIR):
- @mkdir -p $(OBJDIR)
-
-$(LSTDIR):
- @mkdir -p $(LSTDIR)
-
-$(CPPOBJS) : $(OBJDIR)/%.o : %.cpp Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CPPC) -c $(CPPFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(COBJS) : $(OBJDIR)/%.o : %.c Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(CFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMOBJS) : $(OBJDIR)/%.o : %.s Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(AS) -c $(ASFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-$(ASMXOBJS) : $(OBJDIR)/%.o : %.S Makefile
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@
-else
- @echo Compiling $(<F)
- @$(CC) -c $(ASXFLAGS) -I. $(IINCDIR) $< -o $@
-endif
-
-%.elf: $(OBJS) $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- @echo
- $(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-else
- @echo Linking $@
- @$(LD) $(OBJS) $(LDFLAGS) $(LIBS) -o $@
-endif
-
-%.hex: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(HEX) $< $@
-else
- @echo Creating $@
- @$(HEX) $< $@
-endif
-
-%.mot: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(MOT) $< $@
-else
- @echo Creating $@
- @$(MOT) $< $@
-endif
-
-%.bin: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(BIN) $< $@
-else
- @echo Creating $@
- @$(BIN) $< $@
-endif
-
-%.dmp: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) $(ODFLAGS) $< > $@
- $(SZ) $<
-else
- @echo Creating $@
- @$(OD) $(ODFLAGS) $< > $@
- @echo
- @$(SZ) $<
-endif
-
-%.list: %.elf $(LDSCRIPT)
-ifeq ($(USE_VERBOSE_COMPILE),yes)
- $(OD) -S $< > $@
-else
- @echo Creating $@
- @$(OD) -S $< > $@
- @echo Done
-endif
-
-lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a
-
-$(BUILDDIR)/lib$(PROJECT).a: $(OBJS)
- @$(AR) -r $@ $^
- @echo
- @echo Done
-
-clean: CLEAN_RULE_HOOK
- @echo Cleaning
- -rm -fR .dep $(BUILDDIR)
- @echo
- @echo Done
-
-CLEAN_RULE_HOOK:
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF ***
diff --git a/os/common/startup/e200/compilers/HighTec/vectors.S b/os/common/startup/e200/compilers/HighTec/vectors.S deleted file mode 100644 index 22e10b170..000000000 --- a/os/common/startup/e200/compilers/HighTec/vectors.S +++ /dev/null @@ -1,2612 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file vectors.s
- * @brief SPC56x vectors table.
- *
- * @addtogroup PPC_GCC_CORE
- * @{
- */
-
-#define _FROM_ASM_
-#include "ppcparams.h"
-
-#if defined(VECTORS_RENAMING)
-#include "isrs.h"
-#endif
-
-#if !defined(__DOXYGEN__)
-
- /* Software vectors table. The vectors are accessed from the IVOR4
- handler only. In order to declare an interrupt handler just create
- a function withe the same name of a vector, the symbol will
- override the weak symbol declared here.*/
- .section .vectors, "ax"
- .align 4
- .globl _vectors
-_vectors:
- .long vector0, vector1, vector2, vector3
-#if PPC_NUM_VECTORS > 4
- .long vector4, vector5, vector6, vector7
-#endif
-#if PPC_NUM_VECTORS > 8
- .long vector8, vector9, vector10, vector11
-#endif
-#if PPC_NUM_VECTORS > 12
- .long vector12, vector13, vector14, vector15
-#endif
-#if PPC_NUM_VECTORS > 16
- .long vector16, vector17, vector18, vector19
-#endif
-#if PPC_NUM_VECTORS > 20
- .long vector20, vector21, vector22, vector23
-#endif
-#if PPC_NUM_VECTORS > 24
- .long vector24, vector25, vector26, vector27
-#endif
-#if PPC_NUM_VECTORS > 28
- .long vector28, vector29, vector30, vector31
-#endif
-#if PPC_NUM_VECTORS > 32
- .long vector32, vector33, vector34, vector35
-#endif
-#if PPC_NUM_VECTORS > 36
- .long vector36, vector37, vector38, vector39
-#endif
-#if PPC_NUM_VECTORS > 40
- .long vector40, vector41, vector42, vector43
-#endif
-#if PPC_NUM_VECTORS > 44
- .long vector44, vector45, vector46, vector47
-#endif
-#if PPC_NUM_VECTORS > 48
- .long vector48, vector49, vector50, vector51
-#endif
-#if PPC_NUM_VECTORS > 52
- .long vector52, vector53, vector54, vector55
-#endif
-#if PPC_NUM_VECTORS > 56
- .long vector56, vector57, vector58, vector59
-#endif
-#if PPC_NUM_VECTORS > 60
- .long vector60, vector61, vector62, vector63
-#endif
-#if PPC_NUM_VECTORS > 64
- .long vector64, vector65, vector66, vector67
-#endif
-#if PPC_NUM_VECTORS > 68
- .long vector68, vector69, vector70, vector71
-#endif
-#if PPC_NUM_VECTORS > 72
- .long vector72, vector73, vector74, vector75
-#endif
-#if PPC_NUM_VECTORS > 76
- .long vector76, vector77, vector78, vector79
-#endif
-#if PPC_NUM_VECTORS > 80
- .long vector80, vector81, vector82, vector83
-#endif
-#if PPC_NUM_VECTORS > 84
- .long vector84, vector85, vector86, vector87
-#endif
-#if PPC_NUM_VECTORS > 88
- .long vector88, vector89, vector90, vector91
-#endif
-#if PPC_NUM_VECTORS > 92
- .long vector92, vector93, vector94, vector95
-#endif
-#if PPC_NUM_VECTORS > 96
- .long vector96, vector97, vector98, vector99
-#endif
-#if PPC_NUM_VECTORS > 100
- .long vector100, vector101, vector102, vector103
-#endif
-#if PPC_NUM_VECTORS > 104
- .long vector104, vector105, vector106, vector107
-#endif
-#if PPC_NUM_VECTORS > 108
- .long vector108, vector109, vector110, vector111
-#endif
-#if PPC_NUM_VECTORS > 112
- .long vector112, vector113, vector114, vector115
-#endif
-#if PPC_NUM_VECTORS > 116
- .long vector116, vector117, vector118, vector119
-#endif
-#if PPC_NUM_VECTORS > 120
- .long vector120, vector121, vector122, vector123
-#endif
-#if PPC_NUM_VECTORS > 124
- .long vector124, vector125, vector126, vector127
-#endif
-#if PPC_NUM_VECTORS > 128
- .long vector128, vector129, vector130, vector131
-#endif
-#if PPC_NUM_VECTORS > 132
- .long vector132, vector133, vector134, vector135
-#endif
-#if PPC_NUM_VECTORS > 136
- .long vector136, vector137, vector138, vector139
-#endif
-#if PPC_NUM_VECTORS > 140
- .long vector140, vector141, vector142, vector143
-#endif
-#if PPC_NUM_VECTORS > 144
- .long vector144, vector145, vector146, vector147
-#endif
-#if PPC_NUM_VECTORS > 148
- .long vector148, vector149, vector150, vector151
-#endif
-#if PPC_NUM_VECTORS > 152
- .long vector152, vector153, vector154, vector155
-#endif
-#if PPC_NUM_VECTORS > 156
- .long vector156, vector157, vector158, vector159
-#endif
-#if PPC_NUM_VECTORS > 160
- .long vector160, vector161, vector162, vector163
-#endif
-#if PPC_NUM_VECTORS > 164
- .long vector164, vector165, vector166, vector167
-#endif
-#if PPC_NUM_VECTORS > 168
- .long vector168, vector169, vector170, vector171
-#endif
-#if PPC_NUM_VECTORS > 172
- .long vector172, vector173, vector174, vector175
-#endif
-#if PPC_NUM_VECTORS > 176
- .long vector176, vector177, vector178, vector179
-#endif
-#if PPC_NUM_VECTORS > 180
- .long vector180, vector181, vector182, vector183
-#endif
-#if PPC_NUM_VECTORS > 184
- .long vector184, vector185, vector186, vector187
-#endif
-#if PPC_NUM_VECTORS > 188
- .long vector188, vector189, vector190, vector191
-#endif
-#if PPC_NUM_VECTORS > 192
- .long vector192, vector193, vector194, vector195
-#endif
-#if PPC_NUM_VECTORS > 196
- .long vector196, vector197, vector198, vector199
-#endif
-#if PPC_NUM_VECTORS > 200
- .long vector200, vector201, vector202, vector203
-#endif
-#if PPC_NUM_VECTORS > 204
- .long vector204, vector205, vector206, vector207
-#endif
-#if PPC_NUM_VECTORS > 208
- .long vector208, vector209, vector210, vector211
-#endif
-#if PPC_NUM_VECTORS > 212
- .long vector212, vector213, vector214, vector215
-#endif
-#if PPC_NUM_VECTORS > 216
- .long vector216, vector217, vector218, vector219
-#endif
-#if PPC_NUM_VECTORS > 220
- .long vector220, vector221, vector222, vector223
-#endif
-#if PPC_NUM_VECTORS > 224
- .long vector224, vector225, vector226, vector227
-#endif
-#if PPC_NUM_VECTORS > 228
- .long vector228, vector229, vector230, vector231
-#endif
-#if PPC_NUM_VECTORS > 232
- .long vector232, vector233, vector234, vector235
-#endif
-#if PPC_NUM_VECTORS > 236
- .long vector236, vector237, vector238, vector239
-#endif
-#if PPC_NUM_VECTORS > 240
- .long vector240, vector241, vector242, vector243
-#endif
-#if PPC_NUM_VECTORS > 244
- .long vector244, vector245, vector246, vector247
-#endif
-#if PPC_NUM_VECTORS > 248
- .long vector248, vector249, vector250, vector251
-#endif
-#if PPC_NUM_VECTORS > 252
- .long vector252, vector253, vector254, vector255
-#endif
-#if PPC_NUM_VECTORS > 256
- .long vector256, vector257, vector258, vector259
-#endif
-#if PPC_NUM_VECTORS > 260
- .long vector260, vector261, vector262, vector263
-#endif
-#if PPC_NUM_VECTORS > 264
- .long vector264, vector265, vector266, vector267
-#endif
-#if PPC_NUM_VECTORS > 268
- .long vector268, vector269, vector270, vector271
-#endif
-#if PPC_NUM_VECTORS > 272
- .long vector272, vector273, vector274, vector275
-#endif
-#if PPC_NUM_VECTORS > 276
- .long vector276, vector277, vector278, vector279
-#endif
-#if PPC_NUM_VECTORS > 280
- .long vector280, vector281, vector282, vector283
-#endif
-#if PPC_NUM_VECTORS > 284
- .long vector284, vector285, vector286, vector287
-#endif
-#if PPC_NUM_VECTORS > 288
- .long vector288, vector289, vector290, vector291
-#endif
-#if PPC_NUM_VECTORS > 292
- .long vector292, vector293, vector294, vector295
-#endif
-#if PPC_NUM_VECTORS > 296
- .long vector296, vector297, vector298, vector299
-#endif
-#if PPC_NUM_VECTORS > 300
- .long vector300, vector301, vector302, vector303
-#endif
-#if PPC_NUM_VECTORS > 304
- .long vector304, vector305, vector306, vector307
-#endif
-#if PPC_NUM_VECTORS > 308
- .long vector308, vector309, vector310, vector311
-#endif
-#if PPC_NUM_VECTORS > 312
- .long vector312, vector313, vector314, vector315
-#endif
-#if PPC_NUM_VECTORS > 316
- .long vector316, vector317, vector318, vector319
-#endif
-#if PPC_NUM_VECTORS > 320
- .long vector320, vector321, vector322, vector323
-#endif
-#if PPC_NUM_VECTORS > 324
- .long vector324, vector325, vector326, vector327
-#endif
-#if PPC_NUM_VECTORS > 328
- .long vector328, vector329, vector330, vector331
-#endif
-#if PPC_NUM_VECTORS > 332
- .long vector332, vector333, vector334, vector335
-#endif
-#if PPC_NUM_VECTORS > 336
- .long vector336, vector337, vector338, vector339
-#endif
-#if PPC_NUM_VECTORS > 340
- .long vector340, vector341, vector342, vector343
-#endif
-#if PPC_NUM_VECTORS > 344
- .long vector344, vector345, vector346, vector347
-#endif
-#if PPC_NUM_VECTORS > 348
- .long vector348, vector349, vector350, vector351
-#endif
-#if PPC_NUM_VECTORS > 352
- .long vector352, vector353, vector354, vector355
-#endif
-#if PPC_NUM_VECTORS > 356
- .long vector356, vector357, vector358, vector359
-#endif
-#if PPC_NUM_VECTORS > 360
- .long vector360, vector361, vector362, vector363
-#endif
-#if PPC_NUM_VECTORS > 364
- .long vector364, vector365, vector366, vector367
-#endif
-#if PPC_NUM_VECTORS > 368
- .long vector368, vector369, vector370, vector371
-#endif
-#if PPC_NUM_VECTORS > 372
- .long vector372, vector373, vector374, vector375
-#endif
-#if PPC_NUM_VECTORS > 376
- .long vector376, vector377, vector378, vector379
-#endif
-#if PPC_NUM_VECTORS > 380
- .long vector380, vector381, vector382, vector383
-#endif
-#if PPC_NUM_VECTORS > 384
- .long vector384, vector385, vector386, vector387
-#endif
-#if PPC_NUM_VECTORS > 388
- .long vector388, vector389, vector390, vector391
-#endif
-#if PPC_NUM_VECTORS > 392
- .long vector392, vector393, vector394, vector395
-#endif
-#if PPC_NUM_VECTORS > 396
- .long vector396, vector397, vector398, vector399
-#endif
-#if PPC_NUM_VECTORS > 400
- .long vector400, vector401, vector402, vector403
-#endif
-#if PPC_NUM_VECTORS > 404
- .long vector404, vector405, vector406, vector407
-#endif
-#if PPC_NUM_VECTORS > 408
- .long vector408, vector409, vector410, vector411
-#endif
-#if PPC_NUM_VECTORS > 412
- .long vector412, vector413, vector414, vector415
-#endif
-#if PPC_NUM_VECTORS > 416
- .long vector416, vector417, vector418, vector419
-#endif
-#if PPC_NUM_VECTORS > 420
- .long vector420, vector421, vector422, vector423
-#endif
-#if PPC_NUM_VECTORS > 424
- .long vector424, vector425, vector426, vector427
-#endif
-#if PPC_NUM_VECTORS > 428
- .long vector428, vector429, vector430, vector431
-#endif
-#if PPC_NUM_VECTORS > 432
- .long vector432, vector433, vector434, vector435
-#endif
-#if PPC_NUM_VECTORS > 436
- .long vector436, vector437, vector438, vector439
-#endif
-#if PPC_NUM_VECTORS > 440
- .long vector440, vector441, vector442, vector443
-#endif
-#if PPC_NUM_VECTORS > 444
- .long vector444, vector445, vector446, vector447
-#endif
-#if PPC_NUM_VECTORS > 448
- .long vector448, vector449, vector450, vector451
-#endif
-#if PPC_NUM_VECTORS > 452
- .long vector452, vector453, vector454, vector455
-#endif
-#if PPC_NUM_VECTORS > 456
- .long vector456, vector457, vector458, vector459
-#endif
-#if PPC_NUM_VECTORS > 460
- .long vector460, vector461, vector462, vector463
-#endif
-#if PPC_NUM_VECTORS > 464
- .long vector464, vector465, vector466, vector467
-#endif
-#if PPC_NUM_VECTORS > 468
- .long vector468, vector469, vector470, vector471
-#endif
-#if PPC_NUM_VECTORS > 472
- .long vector472, vector473, vector474, vector475
-#endif
-#if PPC_NUM_VECTORS > 476
- .long vector476, vector477, vector478, vector479
-#endif
-#if PPC_NUM_VECTORS > 480
- .long vector480, vector481, vector482, vector483
-#endif
-#if PPC_NUM_VECTORS > 484
- .long vector484, vector485, vector486, vector487
-#endif
-#if PPC_NUM_VECTORS > 488
- .long vector488, vector489, vector490, vector491
-#endif
-#if PPC_NUM_VECTORS > 492
- .long vector492, vector493, vector494, vector495
-#endif
-#if PPC_NUM_VECTORS > 496
- .long vector496, vector497, vector498, vector499
-#endif
-#if PPC_NUM_VECTORS > 500
- .long vector500, vector501, vector502, vector503
-#endif
-#if PPC_NUM_VECTORS > 504
- .long vector504, vector505, vector506, vector507
-#endif
-#if PPC_NUM_VECTORS > 508
- .long vector508, vector509, vector510, vector511
-#endif
-#if PPC_NUM_VECTORS > 512
- .long vector512, vector513, vector514, vector515
-#endif
-#if PPC_NUM_VECTORS > 516
- .long vector516, vector517, vector518, vector519
-#endif
-#if PPC_NUM_VECTORS > 520
- .long vector520, vector521, vector522, vector523
-#endif
-#if PPC_NUM_VECTORS > 524
- .long vector524, vector525, vector526, vector527
-#endif
-#if PPC_NUM_VECTORS > 528
- .long vector528, vector529, vector530, vector531
-#endif
-#if PPC_NUM_VECTORS > 532
- .long vector532, vector533, vector534, vector535
-#endif
-#if PPC_NUM_VECTORS > 536
- .long vector536, vector537, vector538, vector539
-#endif
-#if PPC_NUM_VECTORS > 540
- .long vector540, vector541, vector542, vector543
-#endif
-#if PPC_NUM_VECTORS > 544
- .long vector544, vector545, vector546, vector547
-#endif
-#if PPC_NUM_VECTORS > 548
- .long vector548, vector549, vector550, vector551
-#endif
-#if PPC_NUM_VECTORS > 552
- .long vector552, vector553, vector554, vector555
-#endif
-#if PPC_NUM_VECTORS > 556
- .long vector556, vector557, vector558, vector559
-#endif
-#if PPC_NUM_VECTORS > 560
- .long vector560, vector561, vector562, vector563
-#endif
-#if PPC_NUM_VECTORS > 564
- .long vector564, vector565, vector566, vector567
-#endif
-#if PPC_NUM_VECTORS > 568
- .long vector568, vector569, vector570, vector571
-#endif
-#if PPC_NUM_VECTORS > 572
- .long vector572, vector573, vector574, vector575
-#endif
-#if PPC_NUM_VECTORS > 576
- .long vector576, vector577, vector578, vector579
-#endif
-#if PPC_NUM_VECTORS > 580
- .long vector580, vector581, vector582, vector583
-#endif
-#if PPC_NUM_VECTORS > 584
- .long vector584, vector585, vector586, vector587
-#endif
-#if PPC_NUM_VECTORS > 588
- .long vector588, vector589, vector590, vector591
-#endif
-#if PPC_NUM_VECTORS > 592
- .long vector592, vector593, vector594, vector595
-#endif
-#if PPC_NUM_VECTORS > 596
- .long vector596, vector597, vector598, vector599
-#endif
-#if PPC_NUM_VECTORS > 600
- .long vector600, vector601, vector602, vector603
-#endif
-#if PPC_NUM_VECTORS > 604
- .long vector604, vector605, vector606, vector607
-#endif
-#if PPC_NUM_VECTORS > 608
- .long vector608, vector609, vector610, vector611
-#endif
-#if PPC_NUM_VECTORS > 612
- .long vector612, vector613, vector614, vector615
-#endif
-#if PPC_NUM_VECTORS > 616
- .long vector616, vector617, vector618, vector619
-#endif
-#if PPC_NUM_VECTORS > 620
- .long vector620, vector621, vector622, vector623
-#endif
-#if PPC_NUM_VECTORS > 624
- .long vector624, vector625, vector626, vector627
-#endif
-#if PPC_NUM_VECTORS > 628
- .long vector628, vector629, vector630, vector631
-#endif
-#if PPC_NUM_VECTORS > 632
- .long vector632, vector633, vector634, vector635
-#endif
-#if PPC_NUM_VECTORS > 636
- .long vector636, vector637, vector638, vector639
-#endif
-#if PPC_NUM_VECTORS > 640
- .long vector640, vector641, vector642, vector643
-#endif
-#if PPC_NUM_VECTORS > 644
- .long vector644, vector645, vector646, vector647
-#endif
-#if PPC_NUM_VECTORS > 648
- .long vector648, vector649, vector650, vector651
-#endif
-#if PPC_NUM_VECTORS > 652
- .long vector652, vector653, vector654, vector655
-#endif
-#if PPC_NUM_VECTORS > 656
- .long vector656, vector657, vector658, vector659
-#endif
-#if PPC_NUM_VECTORS > 660
- .long vector660, vector661, vector662, vector663
-#endif
-#if PPC_NUM_VECTORS > 664
- .long vector664, vector665, vector666, vector667
-#endif
-#if PPC_NUM_VECTORS > 668
- .long vector668, vector669, vector670, vector671
-#endif
-#if PPC_NUM_VECTORS > 672
- .long vector672, vector673, vector674, vector675
-#endif
-#if PPC_NUM_VECTORS > 676
- .long vector676, vector677, vector678, vector679
-#endif
-#if PPC_NUM_VECTORS > 680
- .long vector680, vector681, vector682, vector683
-#endif
-#if PPC_NUM_VECTORS > 684
- .long vector684, vector685, vector686, vector687
-#endif
-#if PPC_NUM_VECTORS > 688
- .long vector688, vector689, vector690, vector691
-#endif
-#if PPC_NUM_VECTORS > 692
- .long vector692, vector693, vector694, vector695
-#endif
-#if PPC_NUM_VECTORS > 696
- .long vector696, vector697, vector698, vector699
-#endif
-#if PPC_NUM_VECTORS > 700
- .long vector700, vector701, vector702, vector703
-#endif
-#if PPC_NUM_VECTORS > 704
- .long vector704, vector705, vector706, vector707
-#endif
-#if PPC_NUM_VECTORS > 708
- .long vector708, vector709, vector710, vector711
-#endif
-#if PPC_NUM_VECTORS > 712
- .long vector712, vector713, vector714, vector715
-#endif
-#if PPC_NUM_VECTORS > 716
- .long vector716, vector717, vector718, vector719
-#endif
-#if PPC_NUM_VECTORS > 720
- .long vector720, vector721, vector722, vector723
-#endif
-#if PPC_NUM_VECTORS > 724
- .long vector724, vector725, vector726, vector727
-#endif
-#if PPC_NUM_VECTORS > 728
- .long vector728, vector729, vector730, vector731
-#endif
-#if PPC_NUM_VECTORS > 732
- .long vector732, vector733, vector734, vector735
-#endif
-#if PPC_NUM_VECTORS > 736
- .long vector736, vector737, vector738, vector739
-#endif
-#if PPC_NUM_VECTORS > 740
- .long vector740, vector741, vector742, vector743
-#endif
-#if PPC_NUM_VECTORS > 744
- .long vector744, vector745, vector746, vector747
-#endif
-#if PPC_NUM_VECTORS > 748
- .long vector748, vector749, vector750, vector751
-#endif
-#if PPC_NUM_VECTORS > 752
- .long vector752, vector753, vector754, vector755
-#endif
-#if PPC_NUM_VECTORS > 756
- .long vector756, vector757, vector758, vector759
-#endif
-#if PPC_NUM_VECTORS > 760
- .long vector760, vector761, vector762, vector763
-#endif
-#if PPC_NUM_VECTORS > 764
- .long vector764, vector765, vector766, vector767
-#endif
-#if PPC_NUM_VECTORS > 768
- .long vector768, vector769, vector770, vector771
-#endif
-#if PPC_NUM_VECTORS > 772
- .long vector772, vector773, vector774, vector775
-#endif
-#if PPC_NUM_VECTORS > 776
- .long vector776, vector777, vector778, vector779
-#endif
-#if PPC_NUM_VECTORS > 780
- .long vector780, vector781, vector782, vector783
-#endif
-#if PPC_NUM_VECTORS > 784
- .long vector784, vector785, vector786, vector787
-#endif
-#if PPC_NUM_VECTORS > 788
- .long vector788, vector789, vector790, vector791
-#endif
-#if PPC_NUM_VECTORS > 792
- .long vector792, vector793, vector794, vector795
-#endif
-#if PPC_NUM_VECTORS > 796
- .long vector796, vector797, vector798, vector799
-#endif
-#if PPC_NUM_VECTORS > 800
- .long vector800, vector801, vector802, vector803
-#endif
-#if PPC_NUM_VECTORS > 804
- .long vector804, vector805, vector806, vector807
-#endif
-#if PPC_NUM_VECTORS > 808
- .long vector808, vector809, vector810, vector811
-#endif
-#if PPC_NUM_VECTORS > 812
- .long vector812, vector813, vector814, vector815
-#endif
-#if PPC_NUM_VECTORS > 816
- .long vector816, vector817, vector818, vector819
-#endif
-#if PPC_NUM_VECTORS > 820
- .long vector820, vector821, vector822, vector823
-#endif
-#if PPC_NUM_VECTORS > 824
- .long vector824, vector825, vector826, vector827
-#endif
-#if PPC_NUM_VECTORS > 828
- .long vector828, vector829, vector830, vector831
-#endif
-#if PPC_NUM_VECTORS > 832
- .long vector832, vector833, vector834, vector835
-#endif
-#if PPC_NUM_VECTORS > 836
- .long vector836, vector837, vector838, vector839
-#endif
-#if PPC_NUM_VECTORS > 840
- .long vector840, vector841, vector842, vector843
-#endif
-#if PPC_NUM_VECTORS > 844
- .long vector844, vector845, vector846, vector847
-#endif
-#if PPC_NUM_VECTORS > 848
- .long vector848, vector849, vector850, vector851
-#endif
-#if PPC_NUM_VECTORS > 852
- .long vector852, vector853, vector854, vector855
-#endif
-#if PPC_NUM_VECTORS > 856
- .long vector856, vector857, vector858, vector859
-#endif
-#if PPC_NUM_VECTORS > 860
- .long vector860, vector861, vector862, vector863
-#endif
-#if PPC_NUM_VECTORS > 864
- .long vector864, vector865, vector866, vector867
-#endif
-#if PPC_NUM_VECTORS > 868
- .long vector868, vector869, vector870, vector871
-#endif
-#if PPC_NUM_VECTORS > 872
- .long vector872, vector873, vector874, vector875
-#endif
-#if PPC_NUM_VECTORS > 876
- .long vector876, vector877, vector878, vector879
-#endif
-#if PPC_NUM_VECTORS > 880
- .long vector880, vector881, vector882, vector883
-#endif
-#if PPC_NUM_VECTORS > 884
- .long vector884, vector885, vector886, vector887
-#endif
-#if PPC_NUM_VECTORS > 888
- .long vector888, vector889, vector890, vector891
-#endif
-#if PPC_NUM_VECTORS > 892
- .long vector892, vector893, vector894, vector895
-#endif
-#if PPC_NUM_VECTORS > 896
- .long vector896, vector897, vector898, vector899
-#endif
-#if PPC_NUM_VECTORS > 900
- .long vector900, vector901, vector902, vector903
-#endif
-#if PPC_NUM_VECTORS > 904
- .long vector904, vector905, vector906, vector907
-#endif
-#if PPC_NUM_VECTORS > 908
- .long vector908, vector909, vector910, vector911
-#endif
-#if PPC_NUM_VECTORS > 912
- .long vector912, vector913, vector914, vector915
-#endif
-#if PPC_NUM_VECTORS > 916
- .long vector916, vector917, vector918, vector919
-#endif
-#if PPC_NUM_VECTORS > 920
- .long vector920, vector921, vector922, vector923
-#endif
-#if PPC_NUM_VECTORS > 924
- .long vector924, vector925, vector926, vector927
-#endif
-#if PPC_NUM_VECTORS > 928
- .long vector928, vector929, vector930, vector931
-#endif
-#if PPC_NUM_VECTORS > 932
- .long vector932, vector933, vector934, vector935
-#endif
-#if PPC_NUM_VECTORS > 936
- .long vector936, vector937, vector938, vector939
-#endif
-#if PPC_NUM_VECTORS > 940
- .long vector940, vector941, vector942, vector943
-#endif
-#if PPC_NUM_VECTORS > 944
- .long vector944, vector945, vector946, vector947
-#endif
-#if PPC_NUM_VECTORS > 948
- .long vector948, vector949, vector950, vector951
-#endif
-#if PPC_NUM_VECTORS > 952
- .long vector952, vector953, vector954, vector955
-#endif
-#if PPC_NUM_VECTORS > 956
- .long vector956, vector957, vector958, vector959
-#endif
-#if PPC_NUM_VECTORS > 960
- .long vector960, vector961, vector962, vector963
-#endif
-#if PPC_NUM_VECTORS > 964
- .long vector964, vector965, vector966, vector967
-#endif
-#if PPC_NUM_VECTORS > 968
- .long vector968, vector969, vector970, vector971
-#endif
-#if PPC_NUM_VECTORS > 972
- .long vector972, vector973, vector974, vector975
-#endif
-#if PPC_NUM_VECTORS > 976
- .long vector976, vector977, vector978, vector979
-#endif
-#if PPC_NUM_VECTORS > 980
- .long vector980, vector981, vector982, vector983
-#endif
-#if PPC_NUM_VECTORS > 984
- .long vector984, vector985, vector986, vector987
-#endif
-#if PPC_NUM_VECTORS > 988
- .long vector988, vector989, vector990, vector991
-#endif
-#if PPC_NUM_VECTORS > 992
- .long vector992, vector993, vector994, vector995
-#endif
-#if PPC_NUM_VECTORS > 996
- .long vector996, vector997, vector998, vector999
-#endif
-#if PPC_NUM_VECTORS > 1000
- .long vector1000, vector1001, vector1002, vector1003
-#endif
-#if PPC_NUM_VECTORS > 1004
- .long vector1004, vector1005, vector1006, vector1007
-#endif
-#if PPC_NUM_VECTORS > 1008
- .long vector1008, vector1009, vector1010, vector1011
-#endif
-#if PPC_NUM_VECTORS > 1012
- .long vector1012, vector1013, vector1014, vector1015
-#endif
-#if PPC_NUM_VECTORS > 1016
- .long vector1016, vector1017, vector1018, vector1019
-#endif
-#if PPC_NUM_VECTORS > 1020
- .long vector1020, vector1021, vector1022, vector1023
-#endif
-
- .text
- .align 2
-
- .weak vector0, vector1, vector2, vector3
-#if PPC_NUM_VECTORS > 4
- .weak vector4, vector5, vector6, vector7
-#endif
-#if PPC_NUM_VECTORS > 8
- .weak vector8, vector9, vector10, vector11
-#endif
-#if PPC_NUM_VECTORS > 12
- .weak vector12, vector13, vector14, vector15
-#endif
-#if PPC_NUM_VECTORS > 16
- .weak vector16, vector17, vector18, vector19
-#endif
-#if PPC_NUM_VECTORS > 20
- .weak vector20, vector21, vector22, vector23
-#endif
-#if PPC_NUM_VECTORS > 24
- .weak vector24, vector25, vector26, vector27
-#endif
-#if PPC_NUM_VECTORS > 28
- .weak vector28, vector29, vector30, vector31
-#endif
-#if PPC_NUM_VECTORS > 32
- .weak vector32, vector33, vector34, vector35
-#endif
-#if PPC_NUM_VECTORS > 36
- .weak vector36, vector37, vector38, vector39
-#endif
-#if PPC_NUM_VECTORS > 40
- .weak vector40, vector41, vector42, vector43
-#endif
-#if PPC_NUM_VECTORS > 44
- .weak vector44, vector45, vector46, vector47
-#endif
-#if PPC_NUM_VECTORS > 48
- .weak vector48, vector49, vector50, vector51
-#endif
-#if PPC_NUM_VECTORS > 52
- .weak vector52, vector53, vector54, vector55
-#endif
-#if PPC_NUM_VECTORS > 56
- .weak vector56, vector57, vector58, vector59
-#endif
-#if PPC_NUM_VECTORS > 60
- .weak vector60, vector61, vector62, vector63
-#endif
-#if PPC_NUM_VECTORS > 64
- .weak vector64, vector65, vector66, vector67
-#endif
-#if PPC_NUM_VECTORS > 68
- .weak vector68, vector69, vector70, vector71
-#endif
-#if PPC_NUM_VECTORS > 72
- .weak vector72, vector73, vector74, vector75
-#endif
-#if PPC_NUM_VECTORS > 76
- .weak vector76, vector77, vector78, vector79
-#endif
-#if PPC_NUM_VECTORS > 80
- .weak vector80, vector81, vector82, vector83
-#endif
-#if PPC_NUM_VECTORS > 84
- .weak vector84, vector85, vector86, vector87
-#endif
-#if PPC_NUM_VECTORS > 88
- .weak vector88, vector89, vector90, vector91
-#endif
-#if PPC_NUM_VECTORS > 92
- .weak vector92, vector93, vector94, vector95
-#endif
-#if PPC_NUM_VECTORS > 96
- .weak vector96, vector97, vector98, vector99
-#endif
-#if PPC_NUM_VECTORS > 100
- .weak vector100, vector101, vector102, vector103
-#endif
-#if PPC_NUM_VECTORS > 104
- .weak vector104, vector105, vector106, vector107
-#endif
-#if PPC_NUM_VECTORS > 108
- .weak vector108, vector109, vector110, vector111
-#endif
-#if PPC_NUM_VECTORS > 112
- .weak vector112, vector113, vector114, vector115
-#endif
-#if PPC_NUM_VECTORS > 116
- .weak vector116, vector117, vector118, vector119
-#endif
-#if PPC_NUM_VECTORS > 120
- .weak vector120, vector121, vector122, vector123
-#endif
-#if PPC_NUM_VECTORS > 124
- .weak vector124, vector125, vector126, vector127
-#endif
-#if PPC_NUM_VECTORS > 128
- .weak vector128, vector129, vector130, vector131
-#endif
-#if PPC_NUM_VECTORS > 132
- .weak vector132, vector133, vector134, vector135
-#endif
-#if PPC_NUM_VECTORS > 136
- .weak vector136, vector137, vector138, vector139
-#endif
-#if PPC_NUM_VECTORS > 140
- .weak vector140, vector141, vector142, vector143
-#endif
-#if PPC_NUM_VECTORS > 144
- .weak vector144, vector145, vector146, vector147
-#endif
-#if PPC_NUM_VECTORS > 148
- .weak vector148, vector149, vector150, vector151
-#endif
-#if PPC_NUM_VECTORS > 152
- .weak vector152, vector153, vector154, vector155
-#endif
-#if PPC_NUM_VECTORS > 156
- .weak vector156, vector157, vector158, vector159
-#endif
-#if PPC_NUM_VECTORS > 160
- .weak vector160, vector161, vector162, vector163
-#endif
-#if PPC_NUM_VECTORS > 164
- .weak vector164, vector165, vector166, vector167
-#endif
-#if PPC_NUM_VECTORS > 168
- .weak vector168, vector169, vector170, vector171
-#endif
-#if PPC_NUM_VECTORS > 172
- .weak vector172, vector173, vector174, vector175
-#endif
-#if PPC_NUM_VECTORS > 176
- .weak vector176, vector177, vector178, vector179
-#endif
-#if PPC_NUM_VECTORS > 180
- .weak vector180, vector181, vector182, vector183
-#endif
-#if PPC_NUM_VECTORS > 184
- .weak vector184, vector185, vector186, vector187
-#endif
-#if PPC_NUM_VECTORS > 188
- .weak vector188, vector189, vector190, vector191
-#endif
-#if PPC_NUM_VECTORS > 192
- .weak vector192, vector193, vector194, vector195
-#endif
-#if PPC_NUM_VECTORS > 196
- .weak vector196, vector197, vector198, vector199
-#endif
-#if PPC_NUM_VECTORS > 200
- .weak vector200, vector201, vector202, vector203
-#endif
-#if PPC_NUM_VECTORS > 204
- .weak vector204, vector205, vector206, vector207
-#endif
-#if PPC_NUM_VECTORS > 208
- .weak vector208, vector209, vector210, vector211
-#endif
-#if PPC_NUM_VECTORS > 212
- .weak vector212, vector213, vector214, vector215
-#endif
-#if PPC_NUM_VECTORS > 216
- .weak vector216, vector217, vector218, vector219
-#endif
-#if PPC_NUM_VECTORS > 220
- .weak vector220, vector221, vector222, vector223
-#endif
-#if PPC_NUM_VECTORS > 224
- .weak vector224, vector225, vector226, vector227
-#endif
-#if PPC_NUM_VECTORS > 228
- .weak vector228, vector229, vector230, vector231
-#endif
-#if PPC_NUM_VECTORS > 232
- .weak vector232, vector233, vector234, vector235
-#endif
-#if PPC_NUM_VECTORS > 236
- .weak vector236, vector237, vector238, vector239
-#endif
-#if PPC_NUM_VECTORS > 240
- .weak vector240, vector241, vector242, vector243
-#endif
-#if PPC_NUM_VECTORS > 244
- .weak vector244, vector245, vector246, vector247
-#endif
-#if PPC_NUM_VECTORS > 248
- .weak vector248, vector249, vector250, vector251
-#endif
-#if PPC_NUM_VECTORS > 252
- .weak vector252, vector253, vector254, vector255
-#endif
-#if PPC_NUM_VECTORS > 256
- .weak vector256, vector257, vector258, vector259
-#endif
-#if PPC_NUM_VECTORS > 260
- .weak vector260, vector261, vector262, vector263
-#endif
-#if PPC_NUM_VECTORS > 264
- .weak vector264, vector265, vector266, vector267
-#endif
-#if PPC_NUM_VECTORS > 268
- .weak vector268, vector269, vector270, vector271
-#endif
-#if PPC_NUM_VECTORS > 272
- .weak vector272, vector273, vector274, vector275
-#endif
-#if PPC_NUM_VECTORS > 276
- .weak vector276, vector277, vector278, vector279
-#endif
-#if PPC_NUM_VECTORS > 280
- .weak vector280, vector281, vector282, vector283
-#endif
-#if PPC_NUM_VECTORS > 284
- .weak vector284, vector285, vector286, vector287
-#endif
-#if PPC_NUM_VECTORS > 288
- .weak vector288, vector289, vector290, vector291
-#endif
-#if PPC_NUM_VECTORS > 292
- .weak vector292, vector293, vector294, vector295
-#endif
-#if PPC_NUM_VECTORS > 296
- .weak vector296, vector297, vector298, vector299
-#endif
-#if PPC_NUM_VECTORS > 300
- .weak vector300, vector301, vector302, vector303
-#endif
-#if PPC_NUM_VECTORS > 304
- .weak vector304, vector305, vector306, vector307
-#endif
-#if PPC_NUM_VECTORS > 308
- .weak vector308, vector309, vector310, vector311
-#endif
-#if PPC_NUM_VECTORS > 312
- .weak vector312, vector313, vector314, vector315
-#endif
-#if PPC_NUM_VECTORS > 316
- .weak vector316, vector317, vector318, vector319
-#endif
-#if PPC_NUM_VECTORS > 320
- .weak vector320, vector321, vector322, vector323
-#endif
-#if PPC_NUM_VECTORS > 324
- .weak vector324, vector325, vector326, vector327
-#endif
-#if PPC_NUM_VECTORS > 328
- .weak vector328, vector329, vector330, vector331
-#endif
-#if PPC_NUM_VECTORS > 332
- .weak vector332, vector333, vector334, vector335
-#endif
-#if PPC_NUM_VECTORS > 336
- .weak vector336, vector337, vector338, vector339
-#endif
-#if PPC_NUM_VECTORS > 340
- .weak vector340, vector341, vector342, vector343
-#endif
-#if PPC_NUM_VECTORS > 344
- .weak vector344, vector345, vector346, vector347
-#endif
-#if PPC_NUM_VECTORS > 348
- .weak vector348, vector349, vector350, vector351
-#endif
-#if PPC_NUM_VECTORS > 352
- .weak vector352, vector353, vector354, vector355
-#endif
-#if PPC_NUM_VECTORS > 356
- .weak vector356, vector357, vector358, vector359
-#endif
-#if PPC_NUM_VECTORS > 360
- .weak vector360, vector361, vector362, vector363
-#endif
-#if PPC_NUM_VECTORS > 364
- .weak vector364, vector365, vector366, vector367
-#endif
-#if PPC_NUM_VECTORS > 368
- .weak vector368, vector369, vector370, vector371
-#endif
-#if PPC_NUM_VECTORS > 372
- .weak vector372, vector373, vector374, vector375
-#endif
-#if PPC_NUM_VECTORS > 376
- .weak vector376, vector377, vector378, vector379
-#endif
-#if PPC_NUM_VECTORS > 380
- .weak vector380, vector381, vector382, vector383
-#endif
-#if PPC_NUM_VECTORS > 384
- .weak vector384, vector385, vector386, vector387
-#endif
-#if PPC_NUM_VECTORS > 388
- .weak vector388, vector389, vector390, vector391
-#endif
-#if PPC_NUM_VECTORS > 392
- .weak vector392, vector393, vector394, vector395
-#endif
-#if PPC_NUM_VECTORS > 396
- .weak vector396, vector397, vector398, vector399
-#endif
-#if PPC_NUM_VECTORS > 400
- .weak vector400, vector401, vector402, vector403
-#endif
-#if PPC_NUM_VECTORS > 404
- .weak vector404, vector405, vector406, vector407
-#endif
-#if PPC_NUM_VECTORS > 408
- .weak vector408, vector409, vector410, vector411
-#endif
-#if PPC_NUM_VECTORS > 412
- .weak vector412, vector413, vector414, vector415
-#endif
-#if PPC_NUM_VECTORS > 416
- .weak vector416, vector417, vector418, vector419
-#endif
-#if PPC_NUM_VECTORS > 420
- .weak vector420, vector421, vector422, vector423
-#endif
-#if PPC_NUM_VECTORS > 424
- .weak vector424, vector425, vector426, vector427
-#endif
-#if PPC_NUM_VECTORS > 428
- .weak vector428, vector429, vector430, vector431
-#endif
-#if PPC_NUM_VECTORS > 432
- .weak vector432, vector433, vector434, vector435
-#endif
-#if PPC_NUM_VECTORS > 436
- .weak vector436, vector437, vector438, vector439
-#endif
-#if PPC_NUM_VECTORS > 440
- .weak vector440, vector441, vector442, vector443
-#endif
-#if PPC_NUM_VECTORS > 444
- .weak vector444, vector445, vector446, vector447
-#endif
-#if PPC_NUM_VECTORS > 448
- .weak vector448, vector449, vector450, vector451
-#endif
-#if PPC_NUM_VECTORS > 452
- .weak vector452, vector453, vector454, vector455
-#endif
-#if PPC_NUM_VECTORS > 456
- .weak vector456, vector457, vector458, vector459
-#endif
-#if PPC_NUM_VECTORS > 460
- .weak vector460, vector461, vector462, vector463
-#endif
-#if PPC_NUM_VECTORS > 464
- .weak vector464, vector465, vector466, vector467
-#endif
-#if PPC_NUM_VECTORS > 468
- .weak vector468, vector469, vector470, vector471
-#endif
-#if PPC_NUM_VECTORS > 472
- .weak vector472, vector473, vector474, vector475
-#endif
-#if PPC_NUM_VECTORS > 476
- .weak vector476, vector477, vector478, vector479
-#endif
-#if PPC_NUM_VECTORS > 480
- .weak vector480, vector481, vector482, vector483
-#endif
-#if PPC_NUM_VECTORS > 484
- .weak vector484, vector485, vector486, vector487
-#endif
-#if PPC_NUM_VECTORS > 488
- .weak vector488, vector489, vector490, vector491
-#endif
-#if PPC_NUM_VECTORS > 492
- .weak vector492, vector493, vector494, vector495
-#endif
-#if PPC_NUM_VECTORS > 496
- .weak vector496, vector497, vector498, vector499
-#endif
-#if PPC_NUM_VECTORS > 500
- .weak vector500, vector501, vector502, vector503
-#endif
-#if PPC_NUM_VECTORS > 504
- .weak vector504, vector505, vector506, vector507
-#endif
-#if PPC_NUM_VECTORS > 508
- .weak vector508, vector509, vector510, vector511
-#endif
-#if PPC_NUM_VECTORS > 512
- .weak vector512, vector513, vector514, vector515
-#endif
-#if PPC_NUM_VECTORS > 516
- .weak vector516, vector517, vector518, vector519
-#endif
-#if PPC_NUM_VECTORS > 520
- .weak vector520, vector521, vector522, vector523
-#endif
-#if PPC_NUM_VECTORS > 524
- .weak vector524, vector525, vector526, vector527
-#endif
-#if PPC_NUM_VECTORS > 528
- .weak vector528, vector529, vector530, vector531
-#endif
-#if PPC_NUM_VECTORS > 532
- .weak vector532, vector533, vector534, vector535
-#endif
-#if PPC_NUM_VECTORS > 536
- .weak vector536, vector537, vector538, vector539
-#endif
-#if PPC_NUM_VECTORS > 540
- .weak vector540, vector541, vector542, vector543
-#endif
-#if PPC_NUM_VECTORS > 544
- .weak vector544, vector545, vector546, vector547
-#endif
-#if PPC_NUM_VECTORS > 548
- .weak vector548, vector549, vector550, vector551
-#endif
-#if PPC_NUM_VECTORS > 552
- .weak vector552, vector553, vector554, vector555
-#endif
-#if PPC_NUM_VECTORS > 556
- .weak vector556, vector557, vector558, vector559
-#endif
-#if PPC_NUM_VECTORS > 560
- .weak vector560, vector561, vector562, vector563
-#endif
-#if PPC_NUM_VECTORS > 564
- .weak vector564, vector565, vector566, vector567
-#endif
-#if PPC_NUM_VECTORS > 568
- .weak vector568, vector569, vector570, vector571
-#endif
-#if PPC_NUM_VECTORS > 572
- .weak vector572, vector573, vector574, vector575
-#endif
-#if PPC_NUM_VECTORS > 576
- .weak vector576, vector577, vector578, vector579
-#endif
-#if PPC_NUM_VECTORS > 580
- .weak vector580, vector581, vector582, vector583
-#endif
-#if PPC_NUM_VECTORS > 584
- .weak vector584, vector585, vector586, vector587
-#endif
-#if PPC_NUM_VECTORS > 588
- .weak vector588, vector589, vector590, vector591
-#endif
-#if PPC_NUM_VECTORS > 592
- .weak vector592, vector593, vector594, vector595
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-#if PPC_NUM_VECTORS > 608
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-#if PPC_NUM_VECTORS > 612
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-#if PPC_NUM_VECTORS > 636
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-#if PPC_NUM_VECTORS > 640
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-#if PPC_NUM_VECTORS > 644
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-#if PPC_NUM_VECTORS > 648
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-#if PPC_NUM_VECTORS > 652
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-#if PPC_NUM_VECTORS > 656
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-#if PPC_NUM_VECTORS > 660
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-#if PPC_NUM_VECTORS > 664
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-#if PPC_NUM_VECTORS > 668
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-#if PPC_NUM_VECTORS > 672
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-#if PPC_NUM_VECTORS > 676
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-#if PPC_NUM_VECTORS > 680
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-#if PPC_NUM_VECTORS > 684
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-#if PPC_NUM_VECTORS > 688
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-#if PPC_NUM_VECTORS > 692
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-#if PPC_NUM_VECTORS > 696
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-#if PPC_NUM_VECTORS > 700
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-#if PPC_NUM_VECTORS > 704
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-#if PPC_NUM_VECTORS > 708
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-#if PPC_NUM_VECTORS > 712
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-#if PPC_NUM_VECTORS > 716
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-#if PPC_NUM_VECTORS > 720
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-#if PPC_NUM_VECTORS > 724
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-#if PPC_NUM_VECTORS > 728
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-#if PPC_NUM_VECTORS > 732
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-#if PPC_NUM_VECTORS > 736
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-#if PPC_NUM_VECTORS > 740
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-#if PPC_NUM_VECTORS > 748
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-#if PPC_NUM_VECTORS > 756
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-#if PPC_NUM_VECTORS > 760
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-#if PPC_NUM_VECTORS > 924
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-#if PPC_NUM_VECTORS > 932
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-#if PPC_NUM_VECTORS > 936
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-#if PPC_NUM_VECTORS > 948
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-#if PPC_NUM_VECTORS > 996
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-#if PPC_NUM_VECTORS > 1000
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-#if PPC_NUM_VECTORS > 1008
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-#if PPC_NUM_VECTORS > 1012
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-#if PPC_NUM_VECTORS > 1016
- .weak vector1016, vector1017, vector1018, vector1019
-#endif
-#if PPC_NUM_VECTORS > 1020
- .weak vector1020, vector1021, vector1022, vector1023
-#endif
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-vector672:
-vector673:
-vector674:
-vector675:
-vector676:
-vector677:
-vector678:
-vector679:
-vector680:
-vector681:
-vector682:
-vector683:
-vector684:
-vector685:
-vector686:
-vector687:
-vector688:
-vector689:
-vector690:
-vector691:
-vector692:
-vector693:
-vector694:
-vector695:
-vector696:
-vector697:
-vector698:
-vector699:
-vector700:
-vector701:
-vector702:
-vector703:
-vector704:
-vector705:
-vector706:
-vector707:
-vector708:
-vector709:
-vector710:
-vector711:
-vector712:
-vector713:
-vector714:
-vector715:
-vector716:
-vector717:
-vector718:
-vector719:
-vector720:
-vector721:
-vector722:
-vector723:
-vector724:
-vector725:
-vector726:
-vector727:
-vector728:
-vector729:
-vector730:
-vector731:
-vector732:
-vector733:
-vector734:
-vector735:
-vector736:
-vector737:
-vector738:
-vector739:
-vector740:
-vector741:
-vector742:
-vector743:
-vector744:
-vector745:
-vector746:
-vector747:
-vector748:
-vector749:
-vector750:
-vector751:
-vector752:
-vector753:
-vector754:
-vector755:
-vector756:
-vector757:
-vector758:
-vector759:
-vector760:
-vector761:
-vector762:
-vector763:
-vector764:
-vector765:
-vector766:
-vector767:
-vector768:
-vector769:
-vector770:
-vector771:
-vector772:
-vector773:
-vector774:
-vector775:
-vector776:
-vector777:
-vector778:
-vector779:
-vector780:
-vector781:
-vector782:
-vector783:
-vector784:
-vector785:
-vector786:
-vector787:
-vector788:
-vector789:
-vector790:
-vector791:
-vector792:
-vector793:
-vector794:
-vector795:
-vector796:
-vector797:
-vector798:
-vector799:
-vector800:
-vector801:
-vector802:
-vector803:
-vector804:
-vector805:
-vector806:
-vector807:
-vector808:
-vector809:
-vector810:
-vector811:
-vector812:
-vector813:
-vector814:
-vector815:
-vector816:
-vector817:
-vector818:
-vector819:
-vector820:
-vector821:
-vector822:
-vector823:
-vector824:
-vector825:
-vector826:
-vector827:
-vector828:
-vector829:
-vector830:
-vector831:
-vector832:
-vector833:
-vector834:
-vector835:
-vector836:
-vector837:
-vector838:
-vector839:
-vector840:
-vector841:
-vector842:
-vector843:
-vector844:
-vector845:
-vector846:
-vector847:
-vector848:
-vector849:
-vector850:
-vector851:
-vector852:
-vector853:
-vector854:
-vector855:
-vector856:
-vector857:
-vector858:
-vector859:
-vector860:
-vector861:
-vector862:
-vector863:
-vector864:
-vector865:
-vector866:
-vector867:
-vector868:
-vector869:
-vector870:
-vector871:
-vector872:
-vector873:
-vector874:
-vector875:
-vector876:
-vector877:
-vector878:
-vector879:
-vector880:
-vector881:
-vector882:
-vector883:
-vector884:
-vector885:
-vector886:
-vector887:
-vector888:
-vector889:
-vector890:
-vector891:
-vector892:
-vector893:
-vector894:
-vector895:
-vector896:
-vector897:
-vector898:
-vector899:
-vector900:
-vector901:
-vector902:
-vector903:
-vector904:
-vector905:
-vector906:
-vector907:
-vector908:
-vector909:
-vector910:
-vector911:
-vector912:
-vector913:
-vector914:
-vector915:
-vector916:
-vector917:
-vector918:
-vector919:
-vector920:
-vector921:
-vector922:
-vector923:
-vector924:
-vector925:
-vector926:
-vector927:
-vector928:
-vector929:
-vector930:
-vector931:
-vector932:
-vector933:
-vector934:
-vector935:
-vector936:
-vector937:
-vector938:
-vector939:
-vector940:
-vector941:
-vector942:
-vector943:
-vector944:
-vector945:
-vector946:
-vector947:
-vector948:
-vector949:
-vector950:
-vector951:
-vector952:
-vector953:
-vector954:
-vector955:
-vector956:
-vector957:
-vector958:
-vector959:
-vector960:
-vector961:
-vector962:
-vector963:
-vector964:
-vector965:
-vector966:
-vector967:
-vector968:
-vector969:
-vector970:
-vector971:
-vector972:
-vector973:
-vector974:
-vector975:
-vector976:
-vector977:
-vector978:
-vector979:
-vector980:
-vector981:
-vector982:
-vector983:
-vector984:
-vector985:
-vector986:
-vector987:
-vector988:
-vector989:
-vector990:
-vector991:
-vector992:
-vector993:
-vector994:
-vector995:
-vector996:
-vector997:
-vector998:
-vector999:
-vector1000:
-vector1001:
-vector1002:
-vector1003:
-vector1004:
-vector1005:
-vector1006:
-vector1007:
-vector1008:
-vector1009:
-vector1010:
-vector1011:
-vector1012:
-vector1013:
-vector1014:
-vector1015:
-vector1016:
-vector1017:
-vector1018:
-vector1019:
-vector1020:
-vector1021:
-vector1022:
-vector1023:
- b _unhandled_irq
-
- .weak _unhandled_irq
- .type _unhandled_irq, @function
-_unhandled_irq:
- b _unhandled_irq
-
-#endif /* !defined(__DOXYGEN__) */
-
-/** @} */
diff --git a/os/common/startup/e200/compilers/HighTec/vectors.h b/os/common/startup/e200/compilers/HighTec/vectors.h deleted file mode 100755 index 392148fb2..000000000 --- a/os/common/startup/e200/compilers/HighTec/vectors.h +++ /dev/null @@ -1,78 +0,0 @@ -/*
- ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file vectors.h
- * @brief ISR vector module header.
- *
- * @addtogroup PPC_GCC_CORE
- * @{
- */
-
-#ifndef VECTORS_H
-#define VECTORS_H
-
-#include "ppcparams.h"
-
-/*===========================================================================*/
-/* Module constants. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Module macros. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-/* The following code is not processed when the file is included from an
- asm module.*/
-#if !defined(_FROM_ASM_)
-
-#if !defined(__DOXYGEN__)
-extern uint32_t _vectors[PPC_NUM_VECTORS];
-#endif
-
-#ifdef __cplusplus
-extern "C" {
-#endif
- void _unhandled_irq(void);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* !defined(_FROM_ASM_) */
-
-/*===========================================================================*/
-/* Module inline functions. */
-/*===========================================================================*/
-
-#endif /* VECTORS_H */
-
-/** @} */
diff --git a/os/common/startup/e200/devices/SPC560BCxx/boot.S b/os/common/startup/e200/devices/SPC560BCxx/boot.S index f7a99c2d7..73905b9bd 100644 --- a/os/common/startup/e200/devices/SPC560BCxx/boot.S +++ b/os/common/startup/e200/devices/SPC560BCxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -37,35 +41,35 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
@@ -76,57 +80,57 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -135,52 +139,52 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
- blr
+ se_blr
.section .ivors, "ax"
.globl IVORS
IVORS:
- b _IVOR0
+ e_b _IVOR0
.align 4
- b _IVOR1
+ e_b _IVOR1
.align 4
- b _IVOR2
+ e_b _IVOR2
.align 4
- b _IVOR3
+ e_b _IVOR3
.align 4
- b _IVOR4
+ e_b _IVOR4
.align 4
- b _IVOR5
+ e_b _IVOR5
.align 4
- b _IVOR6
+ e_b _IVOR6
.align 4
- b _IVOR7
+ e_b _IVOR7
.align 4
- b _IVOR8
+ e_b _IVOR8
.align 4
- b _IVOR9
+ e_b _IVOR9
.align 4
- b _IVOR10
+ e_b _IVOR10
.align 4
- b _IVOR11
+ e_b _IVOR11
.align 4
- b _IVOR12
+ e_b _IVOR12
.align 4
- b _IVOR13
+ e_b _IVOR13
.align 4
- b _IVOR14
+ e_b _IVOR14
.align 4
- b _IVOR15
+ e_b _IVOR15
.section .handlers, "ax"
@@ -207,7 +211,7 @@ _IVOR14: _IVOR15:
.global _unhandled_exception
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC560Bxx/boot.S b/os/common/startup/e200/devices/SPC560Bxx/boot.S index 46af60294..5ca775a64 100644 --- a/os/common/startup/e200/devices/SPC560Bxx/boot.S +++ b/os/common/startup/e200/devices/SPC560Bxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -37,35 +41,35 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
@@ -76,57 +80,57 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -135,52 +139,52 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
- blr
+ se_blr
.section .ivors, "ax"
.globl IVORS
IVORS:
- b _IVOR0
+ e_b _IVOR0
.align 4
- b _IVOR1
+ e_b _IVOR1
.align 4
- b _IVOR2
+ e_b _IVOR2
.align 4
- b _IVOR3
+ e_b _IVOR3
.align 4
- b _IVOR4
+ e_b _IVOR4
.align 4
- b _IVOR5
+ e_b _IVOR5
.align 4
- b _IVOR6
+ e_b _IVOR6
.align 4
- b _IVOR7
+ e_b _IVOR7
.align 4
- b _IVOR8
+ e_b _IVOR8
.align 4
- b _IVOR9
+ e_b _IVOR9
.align 4
- b _IVOR10
+ e_b _IVOR10
.align 4
- b _IVOR11
+ e_b _IVOR11
.align 4
- b _IVOR12
+ e_b _IVOR12
.align 4
- b _IVOR13
+ e_b _IVOR13
.align 4
- b _IVOR14
+ e_b _IVOR14
.align 4
- b _IVOR15
+ e_b _IVOR15
.section .handlers, "ax"
@@ -207,7 +211,7 @@ _IVOR14: _IVOR15:
.global _unhandled_exception
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC560Pxx/boot.S b/os/common/startup/e200/devices/SPC560Pxx/boot.S index 81b34158c..51535cd68 100644 --- a/os/common/startup/e200/devices/SPC560Pxx/boot.S +++ b/os/common/startup/e200/devices/SPC560Pxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -37,35 +41,35 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
@@ -76,57 +80,57 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -135,52 +139,52 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
- blr
+ se_blr
.section .ivors, "ax"
.globl IVORS
IVORS:
- b _IVOR0
+ e_b _IVOR0
.align 4
- b _IVOR1
+ e_b _IVOR1
.align 4
- b _IVOR2
+ e_b _IVOR2
.align 4
- b _IVOR3
+ e_b _IVOR3
.align 4
- b _IVOR4
+ e_b _IVOR4
.align 4
- b _IVOR5
+ e_b _IVOR5
.align 4
- b _IVOR6
+ e_b _IVOR6
.align 4
- b _IVOR7
+ e_b _IVOR7
.align 4
- b _IVOR8
+ e_b _IVOR8
.align 4
- b _IVOR9
+ e_b _IVOR9
.align 4
- b _IVOR10
+ e_b _IVOR10
.align 4
- b _IVOR11
+ e_b _IVOR11
.align 4
- b _IVOR12
+ e_b _IVOR12
.align 4
- b _IVOR13
+ e_b _IVOR13
.align 4
- b _IVOR14
+ e_b _IVOR14
.align 4
- b _IVOR15
+ e_b _IVOR15
.section .handlers, "ax"
@@ -207,7 +211,7 @@ _IVOR14: _IVOR15:
.global _unhandled_exception
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC563Mxx/boot.S b/os/common/startup/e200/devices/SPC563Mxx/boot.S index 1ba1b728d..c9a0e3b3a 100644 --- a/os/common/startup/e200/devices/SPC563Mxx/boot.S +++ b/os/common/startup/e200/devices/SPC563Mxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -41,35 +45,35 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
@@ -80,57 +84,57 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -138,40 +142,40 @@ _coreinit: */
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
/* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
+ e_lis r3, _unhandled_exception@h
+ e_or2i r3, _unhandled_exception@l
+
+ mtspr 400, r3 /* IVOR0-15 */
+ mtspr 401, r3
+ mtspr 402, r3
+ mtspr 403, r3
+ mtspr 404, r3
+ mtspr 405, r3
+ mtspr 406, r3
+ mtspr 407, r3
+ mtspr 408, r3
+ mtspr 409, r3
+ mtspr 410, r3
+ mtspr 411, r3
+ mtspr 412, r3
+ mtspr 413, r3
+ mtspr 414, r3
+ mtspr 415, r3
+ mtspr 528, r3 /* IVOR32-34 */
+ mtspr 529, r3
+ mtspr 530, r3
+
+ se_blr
.section .handlers, "ax"
@@ -181,7 +185,7 @@ _ivinit: .weak _unhandled_exception
.type _unhandled_exception, @function
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC564Axx/boot.S b/os/common/startup/e200/devices/SPC564Axx/boot.S index 76c2b57ff..b1097e058 100644 --- a/os/common/startup/e200/devices/SPC564Axx/boot.S +++ b/os/common/startup/e200/devices/SPC564Axx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -41,161 +45,161 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
.align 2
_ramcode:
tlbwe
- isync
- blr
+ se_isync
+ se_blr
.align 2
_coreinit:
/*
* Invalidating all TLBs except TLB1.
*/
- lis %r3, 0
- mtspr 625, %r3 /* MAS1 */
- mtspr 626, %r3 /* MAS2 */
- mtspr 627, %r3 /* MAS3 */
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(0))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, 0
+ mtspr 625, r3 /* MAS1 */
+ mtspr 626, r3 /* MAS2 */
+ mtspr 627, r3 /* MAS3 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(0))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
/*
* TLB0 allocated to internal RAM.
*/
- lis %r3, TLB0_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB0_MAS1@h
- ori %r3, %r3, TLB0_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB0_MAS2@h
- ori %r3, %r3, TLB0_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB0_MAS3@h
- ori %r3, %r3, TLB0_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB0_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB0_MAS1@h
+ e_or2i r3, TLB0_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB0_MAS2@h
+ e_or2i r3, TLB0_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB0_MAS3@h
+ e_or2i r3, TLB0_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB2 allocated to internal Peripherals Bridge A.
*/
- lis %r3, TLB2_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB2_MAS1@h
- ori %r3, %r3, TLB2_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB2_MAS2@h
- ori %r3, %r3, TLB2_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB2_MAS3@h
- ori %r3, %r3, TLB2_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB2_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB2_MAS1@h
+ e_or2i r3, TLB2_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB2_MAS2@h
+ e_or2i r3, TLB2_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB2_MAS3@h
+ e_or2i r3, TLB2_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB3 allocated to internal Peripherals Bridge B.
*/
- lis %r3, TLB3_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB3_MAS1@h
- ori %r3, %r3, TLB3_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB3_MAS2@h
- ori %r3, %r3, TLB3_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB3_MAS3@h
- ori %r3, %r3, TLB3_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB3_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB3_MAS1@h
+ e_or2i r3, TLB3_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB3_MAS2@h
+ e_or2i r3, TLB3_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB3_MAS3@h
+ e_or2i r3, TLB3_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB4 allocated to on-platform peripherals.
*/
- lis %r3, TLB4_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB4_MAS1@h
- ori %r3, %r3, TLB4_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB4_MAS2@h
- ori %r3, %r3, TLB4_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB4_MAS3@h
- ori %r3, %r3, TLB4_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB4_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB4_MAS1@h
+ e_or2i r3, TLB4_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB4_MAS2@h
+ e_or2i r3, TLB4_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB4_MAS3@h
+ e_or2i r3, TLB4_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
@@ -203,98 +207,98 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* *Finally* the TLB1 is re-allocated to flash, note, the final phase
* is executed from RAM.
*/
- lis %r3, TLB1_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB1_MAS1@h
- ori %r3, %r3, TLB1_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB1_MAS2@h
- ori %r3, %r3, TLB1_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB1_MAS3@h
- ori %r3, %r3, TLB1_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- mflr %r4
- lis %r6, _ramcode@h
- ori %r6, %r6, _ramcode@l
- lis %r7, 0x40010000@h
- mtctr %r7
- lwz %r3, 0(%r6)
- stw %r3, 0(%r7)
- lwz %r3, 4(%r6)
- stw %r3, 4(%r7)
- lwz %r3, 8(%r6)
- stw %r3, 8(%r7)
- bctrl
- mtlr %r4
+ e_lis r3, TLB1_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB1_MAS1@h
+ e_or2i r3, TLB1_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB1_MAS2@h
+ e_or2i r3, TLB1_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB1_MAS3@h
+ e_or2i r3, TLB1_MAS3@l
+ mtspr 627, r3 /* MAS3 */
+ mflr r4
+ e_lis r6, _ramcode@h
+ e_or2i r6, _ramcode@l
+ e_lis r7, 0x40010000@h
+ mtctr r7
+ se_lwz r3, 0(r6)
+ se_stw r3, 0(r7)
+ se_lwz r3, 4(r6)
+ se_stw r3, 4(r7)
+ se_lwz r3, 8(r6)
+ se_stw r3, 8(r7)
+ se_bctrl
+ mtlr r4
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
/*
* Cache invalidated and then enabled.
*/
- li %r3, LICSR1_ICINV
- mtspr 1011, %r3 /* LICSR1 */
-.inv: mfspr %r3, 1011 /* LICSR1 */
- andi. %r3, %r3, LICSR1_ICINV
- bne .inv
- lis %r3, BOOT_LICSR1_DEFAULT@h
- ori %r3, %r3, BOOT_LICSR1_DEFAULT@l
- mtspr 1011, %r3 /* LICSR1 */
+ e_li r3, LICSR1_ICINV
+ mtspr 1011, r3 /* LICSR1 */
+.inv: mfspr r3, 1011 /* LICSR1 */
+ e_andi. r3, r3, LICSR1_ICINV
+ se_bne .inv
+ e_lis r3, BOOT_LICSR1_DEFAULT@h
+ e_or2i r3, BOOT_LICSR1_DEFAULT@l
+ mtspr 1011, r3 /* LICSR1 */
- blr
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -303,40 +307,40 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
/* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
+ e_lis r3, _unhandled_exception@h
+ e_or2i r3, _unhandled_exception@l
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
+ mtspr 400, r3 /* IVOR0-15 */
+ mtspr 401, r3
+ mtspr 402, r3
+ mtspr 403, r3
+ mtspr 404, r3
+ mtspr 405, r3
+ mtspr 406, r3
+ mtspr 407, r3
+ mtspr 408, r3
+ mtspr 409, r3
+ mtspr 410, r3
+ mtspr 411, r3
+ mtspr 412, r3
+ mtspr 413, r3
+ mtspr 414, r3
+ mtspr 415, r3
+ mtspr 528, r3 /* IVOR32-34 */
+ mtspr 529, r3
+ mtspr 530, r3
- blr
+ se_blr
.section .handlers, "ax"
@@ -346,7 +350,7 @@ _ivinit: .weak _unhandled_exception
.type _unhandled_exception, @function
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC56ECxx/boot.S b/os/common/startup/e200/devices/SPC56ECxx/boot.S index f6ba0b07d..d0ff80107 100644 --- a/os/common/startup/e200/devices/SPC56ECxx/boot.S +++ b/os/common/startup/e200/devices/SPC56ECxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -41,177 +45,177 @@ .type _reset_address, @function
_reset_address:
#if BOOT_PERFORM_CORE_INIT
- bl _coreinit
+ e_bl _coreinit
#endif
- bl _ivinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
.align 2
_ramcode:
tlbwe
- isync
- blr
+ se_isync
+ se_blr
.align 2
_coreinit:
/*
* Invalidating all TLBs except TLB0.
*/
- lis %r3, 0
- mtspr 625, %r3 /* MAS1 */
- mtspr 626, %r3 /* MAS2 */
- mtspr 627, %r3 /* MAS3 */
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, 0
+ mtspr 625, r3 /* MAS1 */
+ mtspr 626, r3 /* MAS2 */
+ mtspr 627, r3 /* MAS3 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
/*
* TLB1 allocated to internal RAM.
*/
- lis %r3, TLB1_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB1_MAS1@h
- ori %r3, %r3, TLB1_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB1_MAS2@h
- ori %r3, %r3, TLB1_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB1_MAS3@h
- ori %r3, %r3, TLB1_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB1_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB1_MAS1@h
+ e_or2i r3, TLB1_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB1_MAS2@h
+ e_or2i r3, TLB1_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB1_MAS3@h
+ e_or2i r3, TLB1_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB2 allocated to internal Peripherals Bridge A.
*/
- lis %r3, TLB2_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB2_MAS1@h
- ori %r3, %r3, TLB2_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB2_MAS2@h
- ori %r3, %r3, TLB2_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB2_MAS3@h
- ori %r3, %r3, TLB2_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB2_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB2_MAS1@h
+ e_or2i r3, TLB2_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB2_MAS2@h
+ e_or2i r3, TLB2_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB2_MAS3@h
+ e_or2i r3, TLB2_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB3 allocated to internal Peripherals Bridge B.
*/
- lis %r3, TLB3_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB3_MAS1@h
- ori %r3, %r3, TLB3_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB3_MAS2@h
- ori %r3, %r3, TLB3_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB3_MAS3@h
- ori %r3, %r3, TLB3_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB3_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB3_MAS1@h
+ e_or2i r3, TLB3_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB3_MAS2@h
+ e_or2i r3, TLB3_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB3_MAS3@h
+ e_or2i r3, TLB3_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB4 allocated to on-platform peripherals.
*/
- lis %r3, TLB4_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB4_MAS1@h
- ori %r3, %r3, TLB4_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB4_MAS2@h
- ori %r3, %r3, TLB4_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB4_MAS3@h
- ori %r3, %r3, TLB4_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB4_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB4_MAS1@h
+ e_or2i r3, TLB4_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB4_MAS2@h
+ e_or2i r3, TLB4_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB4_MAS3@h
+ e_or2i r3, TLB4_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB5 allocated to on-platform peripherals.
*/
- lis %r3, TLB5_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB5_MAS1@h
- ori %r3, %r3, TLB5_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB5_MAS2@h
- ori %r3, %r3, TLB5_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB5_MAS3@h
- ori %r3, %r3, TLB5_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB5_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB5_MAS1@h
+ e_or2i r3, TLB5_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB5_MAS2@h
+ e_or2i r3, TLB5_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB5_MAS3@h
+ e_or2i r3, TLB5_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
@@ -219,132 +223,132 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
/*
* Special function registers clearing, required in order to avoid
* possible problems with lockstep mode.
*/
- mtcrf 0xFF, %r31
- mtspr 9, %r31 /* CTR */
- mtspr 22, %r31 /* DEC */
- mtspr 26, %r31 /* SRR0-1 */
- mtspr 27, %r31
- mtspr 54, %r31 /* DECAR */
- mtspr 58, %r31 /* CSRR0-1 */
- mtspr 59, %r31
- mtspr 61, %r31 /* DEAR */
- mtspr 256, %r31 /* USPRG0 */
- mtspr 272, %r31 /* SPRG1-7 */
- mtspr 273, %r31
- mtspr 274, %r31
- mtspr 275, %r31
- mtspr 276, %r31
- mtspr 277, %r31
- mtspr 278, %r31
- mtspr 279, %r31
- mtspr 285, %r31 /* TBU */
- mtspr 284, %r31 /* TBL */
+ mtcrf 0xFF, r31
+ mtspr 9, r31 /* CTR */
+ mtspr 22, r31 /* DEC */
+ mtspr 26, r31 /* SRR0-1 */
+ mtspr 27, r31
+ mtspr 54, r31 /* DECAR */
+ mtspr 58, r31 /* CSRR0-1 */
+ mtspr 59, r31
+ mtspr 61, r31 /* DEAR */
+ mtspr 256, r31 /* USPRG0 */
+ mtspr 272, r31 /* SPRG1-7 */
+ mtspr 273, r31
+ mtspr 274, r31
+ mtspr 275, r31
+ mtspr 276, r31
+ mtspr 277, r31
+ mtspr 278, r31
+ mtspr 279, r31
+ mtspr 285, r31 /* TBU */
+ mtspr 284, r31 /* TBL */
#if 0
- mtspr 318, %r31 /* DVC1-2 */
- mtspr 319, %r31
+ mtspr 318, r31 /* DVC1-2 */
+ mtspr 319, r31
#endif
- mtspr 562, %r31 /* DBCNT */
- mtspr 570, %r31 /* MCSRR0 */
- mtspr 571, %r31 /* MCSRR1 */
- mtspr 604, %r31 /* SPRG8-9 */
- mtspr 605, %r31
+ mtspr 562, r31 /* DBCNT */
+ mtspr 570, r31 /* MCSRR0 */
+ mtspr 571, r31 /* MCSRR1 */
+ mtspr 604, r31 /* SPRG8-9 */
+ mtspr 605, r31
/*
* *Finally* the TLB0 is re-allocated to flash, note, the final phase
* is executed from RAM.
*/
- lis %r3, TLB0_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB0_MAS1@h
- ori %r3, %r3, TLB0_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB0_MAS2@h
- ori %r3, %r3, TLB0_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB0_MAS3@h
- ori %r3, %r3, TLB0_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- mflr %r4
- lis %r6, _ramcode@h
- ori %r6, %r6, _ramcode@l
- lis %r7, 0x40010000@h
- mtctr %r7
- lwz %r3, 0(%r6)
- stw %r3, 0(%r7)
- lwz %r3, 4(%r6)
- stw %r3, 4(%r7)
- lwz %r3, 8(%r6)
- stw %r3, 8(%r7)
- bctrl
- mtlr %r4
+ e_lis r3, TLB0_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB0_MAS1@h
+ e_or2i r3, TLB0_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB0_MAS2@h
+ e_or2i r3, TLB0_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB0_MAS3@h
+ e_or2i r3, TLB0_MAS3@l
+ mtspr 627, r3 /* MAS3 */
+ mflr r4
+ e_lis r6, _ramcode@h
+ e_or2i r6, _ramcode@l
+ e_lis r7, 0x40010000@h
+ mtctr r7
+ se_lwz r3, 0(r6)
+ se_stw r3, 0(r7)
+ se_lwz r3, 4(r6)
+ se_stw r3, 4(r7)
+ se_lwz r3, 8(r6)
+ se_stw r3, 8(r7)
+ se_bctrl
+ mtlr r4
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
/*
* Cache invalidated and then enabled.
*/
- li %r3, LICSR1_ICINV
- mtspr 1011, %r3 /* LICSR1 */
-.inv: mfspr %r3, 1011 /* LICSR1 */
- andi. %r3, %r3, LICSR1_ICINV
- bne .inv
- lis %r3, BOOT_LICSR1_DEFAULT@h
- ori %r3, %r3, BOOT_LICSR1_DEFAULT@l
- mtspr 1011, %r3 /* LICSR1 */
-
- blr
+ e_li r3, LICSR1_ICINV
+ mtspr 1011, r3 /* LICSR1 */
+.inv: mfspr r3, 1011 /* LICSR1 */
+ e_andi. r3, r3, LICSR1_ICINV
+ se_bne .inv
+ e_lis r3, BOOT_LICSR1_DEFAULT@h
+ e_or2i r3, BOOT_LICSR1_DEFAULT@l
+ mtspr 1011, r3 /* LICSR1 */
+
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
/*
@@ -353,40 +357,40 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
/* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
+ e_lis r3, _unhandled_exception@h
+ e_or2i r3, _unhandled_exception@l
+
+ mtspr 400, r3 /* IVOR0-15 */
+ mtspr 401, r3
+ mtspr 402, r3
+ mtspr 403, r3
+ mtspr 404, r3
+ mtspr 405, r3
+ mtspr 406, r3
+ mtspr 407, r3
+ mtspr 408, r3
+ mtspr 409, r3
+ mtspr 410, r3
+ mtspr 411, r3
+ mtspr 412, r3
+ mtspr 413, r3
+ mtspr 414, r3
+ mtspr 415, r3
+ mtspr 528, r3 /* IVOR32-34 */
+ mtspr 529, r3
+ mtspr 530, r3
+
+ se_blr
.section .handlers, "ax"
@@ -396,7 +400,7 @@ _ivinit: .weak _unhandled_exception
.type _unhandled_exception, @function
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
diff --git a/os/common/startup/e200/devices/SPC56ELxx/boot.S b/os/common/startup/e200/devices/SPC56ELxx/boot.S index 9446823e5..d65714020 100644 --- a/os/common/startup/e200/devices/SPC56ELxx/boot.S +++ b/os/common/startup/e200/devices/SPC56ELxx/boot.S @@ -24,6 +24,10 @@ #include "boot.h"
+#if defined(__HIGHTEC__)
+#define se_bge bge
+#endif
+
#if !defined(__DOXYGEN__)
/* BAM record.*/
@@ -40,42 +44,42 @@ .globl _reset_address
.type _reset_address, @function
_reset_address:
- bl _coreinit
- bl _ivinit
+ e_bl _coreinit
+ e_bl _ivinit
#if BOOT_RELOCATE_IN_RAM
/*
* Image relocation in RAM.
*/
- lis %r4, __ram_reloc_start__@h
- ori %r4, %r4, __ram_reloc_start__@l
- lis %r5, __ram_reloc_dest__@h
- ori %r5, %r5, __ram_reloc_dest__@l
- lis %r6, __ram_reloc_end__@h
- ori %r6, %r6, __ram_reloc_end__@l
+ e_lis r4, __ram_reloc_start__@h
+ e_or2i r4, __ram_reloc_start__@l
+ e_lis r5, __ram_reloc_dest__@h
+ e_or2i r5, __ram_reloc_dest__@l
+ e_lis r6, __ram_reloc_end__@h
+ e_or2i r6, r6, __ram_reloc_end__@l
.relloop:
- cmpl cr0, %r4, %r6
- bge cr0, .relend
- lwz %r7, 0(%r4)
- addi %r4, %r4, 4
- stw %r7, 0(%r5)
- addi %r5, %r5, 4
- b .relloop
+ se_cmpl r4, r6
+ se_bge .relend
+ se_lwz r7, 0(r4)
+ se_addi r4, 4
+ se_stw r7, 0(r5)
+ se_addi r5, 4
+ se_b .relloop
.relend:
- lis %r3, _boot_address@h
- ori %r3, %r3, _boot_address@l
- mtctr %r3
- bctrl
+ e_lis r3, _boot_address@h
+ e_or2i r3, _boot_address@l
+ mtctr r3
+ se_bctrl
#else
- b _boot_address
+ e_b _boot_address
#endif
#if BOOT_PERFORM_CORE_INIT
.align 2
_ramcode:
tlbwe
- isync
- blr
+ se_isync
+ se_blr
#endif /* BOOT_PERFORM_CORE_INIT */
.align 2
@@ -84,134 +88,134 @@ _coreinit: /*
* Invalidating all TLBs except TLB0.
*/
- lis %r3, 0
- mtspr 625, %r3 /* MAS1 */
- mtspr 626, %r3 /* MAS2 */
- mtspr 627, %r3 /* MAS3 */
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, 0
+ mtspr 625, r3 /* MAS1 */
+ mtspr 626, r3 /* MAS2 */
+ mtspr 627, r3 /* MAS3 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(1))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(2))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(3))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(4))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(5))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(6))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(7))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(8))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(9))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(10))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(11))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(12))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(13))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(14))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
- lis %r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
- mtspr 624, %r3 /* MAS0 */
+ e_lis r3, (MAS0_TBLMAS_TBL | MAS0_ESEL(15))@h
+ mtspr 624, r3 /* MAS0 */
tlbwe
/*
* TLB1 allocated to internal RAM.
*/
- lis %r3, TLB1_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB1_MAS1@h
- ori %r3, %r3, TLB1_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB1_MAS2@h
- ori %r3, %r3, TLB1_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB1_MAS3@h
- ori %r3, %r3, TLB1_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB1_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB1_MAS1@h
+ e_or2i r3, TLB1_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB1_MAS2@h
+ e_or2i r3, TLB1_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB1_MAS3@h
+ e_or2i r3, TLB1_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB2 allocated to internal Peripherals Bridge A.
*/
- lis %r3, TLB2_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB2_MAS1@h
- ori %r3, %r3, TLB2_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB2_MAS2@h
- ori %r3, %r3, TLB2_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB2_MAS3@h
- ori %r3, %r3, TLB2_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB2_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB2_MAS1@h
+ e_or2i r3, TLB2_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB2_MAS2@h
+ e_or2i r3, TLB2_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB2_MAS3@h
+ e_or2i r3, TLB2_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB3 allocated to internal Peripherals Bridge B.
*/
- lis %r3, TLB3_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB3_MAS1@h
- ori %r3, %r3, TLB3_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB3_MAS2@h
- ori %r3, %r3, TLB3_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB3_MAS3@h
- ori %r3, %r3, TLB3_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB3_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB3_MAS1@h
+ e_or2i r3, TLB3_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB3_MAS2@h
+ e_or2i r3, TLB3_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB3_MAS3@h
+ e_or2i r3, TLB3_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB4 allocated to on-platform peripherals.
*/
- lis %r3, TLB4_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB4_MAS1@h
- ori %r3, %r3, TLB4_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB4_MAS2@h
- ori %r3, %r3, TLB4_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB4_MAS3@h
- ori %r3, %r3, TLB4_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB4_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB4_MAS1@h
+ e_or2i r3, TLB4_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB4_MAS2@h
+ e_or2i r3, TLB4_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB4_MAS3@h
+ e_or2i r3, TLB4_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
* TLB5 allocated to on-platform peripherals.
*/
- lis %r3, TLB5_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB5_MAS1@h
- ori %r3, %r3, TLB5_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB5_MAS2@h
- ori %r3, %r3, TLB5_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB5_MAS3@h
- ori %r3, %r3, TLB5_MAS3@l
- mtspr 627, %r3 /* MAS3 */
+ e_lis r3, TLB5_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB5_MAS1@h
+ e_or2i r3, TLB5_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB5_MAS2@h
+ e_or2i r3, TLB5_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB5_MAS3@h
+ e_or2i r3, TLB5_MAS3@l
+ mtspr 627, r3 /* MAS3 */
tlbwe
/*
@@ -219,48 +223,48 @@ _coreinit: * order to initialize the ECC detection hardware, this is going to
* slow down the startup but there is no way around.
*/
- xor %r0, %r0, %r0
- xor %r1, %r1, %r1
- xor %r2, %r2, %r2
- xor %r3, %r3, %r3
- xor %r4, %r4, %r4
- xor %r5, %r5, %r5
- xor %r6, %r6, %r6
- xor %r7, %r7, %r7
- xor %r8, %r8, %r8
- xor %r9, %r9, %r9
- xor %r10, %r10, %r10
- xor %r11, %r11, %r11
- xor %r12, %r12, %r12
- xor %r13, %r13, %r13
- xor %r14, %r14, %r14
- xor %r15, %r15, %r15
- xor %r16, %r16, %r16
- xor %r17, %r17, %r17
- xor %r18, %r18, %r18
- xor %r19, %r19, %r19
- xor %r20, %r20, %r20
- xor %r21, %r21, %r21
- xor %r22, %r22, %r22
- xor %r23, %r23, %r23
- xor %r24, %r24, %r24
- xor %r25, %r25, %r25
- xor %r26, %r26, %r26
- xor %r27, %r27, %r27
- xor %r28, %r28, %r28
- xor %r29, %r29, %r29
- xor %r30, %r30, %r30
- xor %r31, %r31, %r31
- lis %r4, __ram_start__@h
- ori %r4, %r4, __ram_start__@l
- lis %r5, __ram_end__@h
- ori %r5, %r5, __ram_end__@l
+ xor r0, r0, r0
+ xor r1, r1, r1
+ xor r2, r2, r2
+ xor r3, r3, r3
+ xor r4, r4, r4
+ xor r5, r5, r5
+ xor r6, r6, r6
+ xor r7, r7, r7
+ xor r8, r8, r8
+ xor r9, r9, r9
+ xor r10, r10, r10
+ xor r11, r11, r11
+ xor r12, r12, r12
+ xor r13, r13, r13
+ xor r14, r14, r14
+ xor r15, r15, r15
+ xor r16, r16, r16
+ xor r17, r17, r17
+ xor r18, r18, r18
+ xor r19, r19, r19
+ xor r20, r20, r20
+ xor r21, r21, r21
+ xor r22, r22, r22
+ xor r23, r23, r23
+ xor r24, r24, r24
+ xor r25, r25, r25
+ xor r26, r26, r26
+ xor r27, r27, r27
+ xor r28, r28, r28
+ xor r29, r29, r29
+ xor r30, r30, r30
+ xor r31, r31, r31
+ e_lis r4, __ram_start__@h
+ e_or2i r4, __ram_start__@l
+ e_lis r5, __ram_end__@h
+ e_or2i r5, __ram_end__@l
.cleareccloop:
- cmpl %cr0, %r4, %r5
- bge %cr0, .cleareccend
- stmw %r16, 0(%r4)
- addi %r4, %r4, 64
- b .cleareccloop
+ se_cmpl r4, r5
+ se_bge .cleareccend
+ e_stmw r16, 0(r4)
+ e_addi r4, r4, 64
+ se_b .cleareccloop
.cleareccend:
#endif /* BOOT_PERFORM_CORE_INIT */
@@ -268,86 +272,86 @@ _coreinit: * Special function registers clearing, required in order to avoid
* possible problems with lockstep mode.
*/
- mtcrf 0xFF, %r31
- mtspr 9, %r31 /* CTR */
- mtspr 22, %r31 /* DEC */
- mtspr 26, %r31 /* SRR0-1 */
- mtspr 27, %r31
- mtspr 54, %r31 /* DECAR */
- mtspr 58, %r31 /* CSRR0-1 */
- mtspr 59, %r31
- mtspr 61, %r31 /* DEAR */
- mtspr 256, %r31 /* USPRG0 */
- mtspr 272, %r31 /* SPRG1-7 */
- mtspr 273, %r31
- mtspr 274, %r31
- mtspr 275, %r31
- mtspr 276, %r31
- mtspr 277, %r31
- mtspr 278, %r31
- mtspr 279, %r31
- mtspr 285, %r31 /* TBU */
- mtspr 284, %r31 /* TBL */
+ mtcrf 0xFF, r31
+ mtspr 9, r31 /* CTR */
+ mtspr 22, r31 /* DEC */
+ mtspr 26, r31 /* SRR0-1 */
+ mtspr 27, r31
+ mtspr 54, r31 /* DECAR */
+ mtspr 58, r31 /* CSRR0-1 */
+ mtspr 59, r31
+ mtspr 61, r31 /* DEAR */
+ mtspr 256, r31 /* USPRG0 */
+ mtspr 272, r31 /* SPRG1-7 */
+ mtspr 273, r31
+ mtspr 274, r31
+ mtspr 275, r31
+ mtspr 276, r31
+ mtspr 277, r31
+ mtspr 278, r31
+ mtspr 279, r31
+ mtspr 285, r31 /* TBU */
+ mtspr 284, r31 /* TBL */
#if 0
- mtspr 318, %r31 /* DVC1-2 */
- mtspr 319, %r31
+ mtspr 318, r31 /* DVC1-2 */
+ mtspr 319, r31
#endif
- mtspr 562, %r31 /* DBCNT */
- mtspr 570, %r31 /* MCSRR0 */
- mtspr 571, %r31 /* MCSRR1 */
- mtspr 604, %r31 /* SPRG8-9 */
- mtspr 605, %r31
+ mtspr 562, r31 /* DBCNT */
+ mtspr 570, r31 /* MCSRR0 */
+ mtspr 571, r31 /* MCSRR1 */
+ mtspr 604, r31 /* SPRG8-9 */
+ mtspr 605, r31
#if BOOT_PERFORM_CORE_INIT
/*
* *Finally* the TLB0 is re-allocated to flash, note, the final phase
* is executed from RAM.
*/
- lis %r3, TLB0_MAS0@h
- mtspr 624, %r3 /* MAS0 */
- lis %r3, TLB0_MAS1@h
- ori %r3, %r3, TLB0_MAS1@l
- mtspr 625, %r3 /* MAS1 */
- lis %r3, TLB0_MAS2@h
- ori %r3, %r3, TLB0_MAS2@l
- mtspr 626, %r3 /* MAS2 */
- lis %r3, TLB0_MAS3@h
- ori %r3, %r3, TLB0_MAS3@l
- mtspr 627, %r3 /* MAS3 */
- mflr %r4
- lis %r6, _ramcode@h
- ori %r6, %r6, _ramcode@l
- lis %r7, 0x40010000@h
- mtctr %r7
- lwz %r3, 0(%r6)
- stw %r3, 0(%r7)
- lwz %r3, 4(%r6)
- stw %r3, 4(%r7)
- lwz %r3, 8(%r6)
- stw %r3, 8(%r7)
- bctrl
- mtlr %r4
+ e_lis r3, TLB0_MAS0@h
+ mtspr 624, r3 /* MAS0 */
+ e_lis r3, TLB0_MAS1@h
+ e_or2i r3, TLB0_MAS1@l
+ mtspr 625, r3 /* MAS1 */
+ e_lis r3, TLB0_MAS2@h
+ e_or2i r3, TLB0_MAS2@l
+ mtspr 626, r3 /* MAS2 */
+ e_lis r3, TLB0_MAS3@h
+ e_or2i r3, TLB0_MAS3@l
+ mtspr 627, r3 /* MAS3 */
+ mflr r4
+ e_lis r6, _ramcode@h
+ e_or2i r6, _ramcode@l
+ e_lis r7, 0x40010000@h
+ mtctr r7
+ se_lwz r3, 0(r6)
+ se_stw r3, 0(r7)
+ se_lwz r3, 4(r6)
+ se_stw r3, 4(r7)
+ se_lwz r3, 8(r6)
+ se_stw r3, 8(r7)
+ se_bctrl
+ mtlr r4
#endif /* BOOT_PERFORM_CORE_INIT */
/*
* Branch prediction enabled.
*/
- li %r3, BOOT_BUCSR_DEFAULT
- mtspr 1013, %r3 /* BUCSR */
+ e_li r3, BOOT_BUCSR_DEFAULT
+ mtspr 1013, r3 /* BUCSR */
/*
* Cache invalidated and then enabled.
*/
- li %r3, LICSR1_ICINV
- mtspr 1011, %r3 /* LICSR1 */
-.inv: mfspr %r3, 1011 /* LICSR1 */
- andi. %r3, %r3, LICSR1_ICINV
- bne .inv
- lis %r3, BOOT_LICSR1_DEFAULT@h
- ori %r3, %r3, BOOT_LICSR1_DEFAULT@l
- mtspr 1011, %r3 /* LICSR1 */
+ e_li r3, LICSR1_ICINV
+ mtspr 1011, r3 /* LICSR1 */
+.inv: mfspr r3, 1011 /* LICSR1 */
+ e_andi. r3, r3, LICSR1_ICINV
+ se_bne .inv
+ e_lis r3, BOOT_LICSR1_DEFAULT@h
+ e_or2i r3, BOOT_LICSR1_DEFAULT@l
+ mtspr 1011, r3 /* LICSR1 */
- blr
+ se_blr
/*
* Exception vectors initialization.
@@ -355,40 +359,40 @@ _coreinit: .align 2
_ivinit:
/* MSR initialization.*/
- lis %r3, BOOT_MSR_DEFAULT@h
- ori %r3, %r3, BOOT_MSR_DEFAULT@l
- mtMSR %r3
+ e_lis r3, BOOT_MSR_DEFAULT@h
+ e_or2i r3, BOOT_MSR_DEFAULT@l
+ mtMSR r3
/* IVPR initialization.*/
- lis %r3, __ivpr_base__@h
- ori %r3, %r3, __ivpr_base__@l
- mtIVPR %r3
+ e_lis r3, __ivpr_base__@h
+ e_or2i r3, __ivpr_base__@l
+ mtIVPR r3
/* IVORs initialization.*/
- lis %r3, _unhandled_exception@h
- ori %r3, %r3, _unhandled_exception@l
-
- mtspr 400, %r3 /* IVOR0-15 */
- mtspr 401, %r3
- mtspr 402, %r3
- mtspr 403, %r3
- mtspr 404, %r3
- mtspr 405, %r3
- mtspr 406, %r3
- mtspr 407, %r3
- mtspr 408, %r3
- mtspr 409, %r3
- mtspr 410, %r3
- mtspr 411, %r3
- mtspr 412, %r3
- mtspr 413, %r3
- mtspr 414, %r3
- mtspr 415, %r3
- mtspr 528, %r3 /* IVOR32-34 */
- mtspr 529, %r3
- mtspr 530, %r3
-
- blr
+ e_lis r3, _unhandled_exception@h
+ e_or2i r3, _unhandled_exception@l
+
+ mtspr 400, r3 /* IVOR0-15 */
+ mtspr 401, r3
+ mtspr 402, r3
+ mtspr 403, r3
+ mtspr 404, r3
+ mtspr 405, r3
+ mtspr 406, r3
+ mtspr 407, r3
+ mtspr 408, r3
+ mtspr 409, r3
+ mtspr 410, r3
+ mtspr 411, r3
+ mtspr 412, r3
+ mtspr 413, r3
+ mtspr 414, r3
+ mtspr 415, r3
+ mtspr 528, r3 /* IVOR32-34 */
+ mtspr 529, r3
+ mtspr 530, r3
+
+ se_blr
.section .handlers, "ax"
@@ -398,7 +402,7 @@ _ivinit: .weak _unhandled_exception
.type _unhandled_exception, @function
_unhandled_exception:
- b _unhandled_exception
+ se_b _unhandled_exception
#endif /* !defined(__DOXYGEN__) */
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