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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-14 09:34:28 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-01-14 09:34:28 +0000 |
| commit | ecd03e17cec7c9d2d928314d59e9d4ed427f74c3 (patch) | |
| tree | 3ad9582def8ebc7914b63f028b0a26f5629cae83 /demos | |
| parent | 3ae66789001a8625881c5e10c96e382626478993 (diff) | |
| download | ChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.tar.gz ChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.tar.bz2 ChibiOS-ecd03e17cec7c9d2d928314d59e9d4ed427f74c3.zip | |
Various fixes after mass test-compile.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@11268 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
3 files changed, 5 insertions, 5 deletions
diff --git a/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c b/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c index f7690df80..9a123819a 100644 --- a/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c +++ b/demos/STM32/RT-STM32-LWIP-FATFS-USB/cfg-stm32f107_goldbull/portab.c @@ -30,10 +30,10 @@ /*===========================================================================*/
/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).*/
-static const SPIConfig hs_spicfg = {NULL, IOPORT3, GPIOC_SPI3_SD_CS, 0, 0};
+static const SPIConfig hs_spicfg = {false, NULL, IOPORT3, GPIOC_SPI3_SD_CS, 0, 0};
/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/
-static const SPIConfig ls_spicfg = {NULL, IOPORT3, GPIOC_SPI3_SD_CS,
+static const SPIConfig ls_spicfg = {false, NULL, IOPORT3, GPIOC_SPI3_SD_CS,
SPI_CR1_BR_2 | SPI_CR1_BR_1,
0};
diff --git a/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c b/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c index b9b7289ba..20c5f5b1d 100755 --- a/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c +++ b/demos/STM32/RT-STM32F103-OLIMEX_STM32_P103-FATFS/main.c @@ -106,10 +106,10 @@ static FATFS SDC_FS; static bool fs_ready = FALSE;
/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).*/
-static SPIConfig hs_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS, 0, 0};
+static SPIConfig hs_spicfg = {false, NULL, IOPORT2, GPIOB_SPI2NSS, 0, 0};
/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/
-static SPIConfig ls_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS,
+static SPIConfig ls_spicfg = {false, NULL, IOPORT2, GPIOB_SPI2NSS,
SPI_CR1_BR_2 | SPI_CR1_BR_1,
0};
diff --git a/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h b/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h index d7793e22c..1a1fdd7d1 100644 --- a/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h +++ b/demos/STM32/RT-STM32H743I-NUCLEO144/halconf.h @@ -41,7 +41,7 @@ * @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC FALSE
+#define HAL_USE_ADC TRUE
#endif
/**
|