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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-10-11 10:29:06 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2008-10-11 10:29:06 +0000 |
| commit | b4143002333b4d1ffdd4caa0f717d3e8485ebd62 (patch) | |
| tree | 1524165d58086d783aa0dfb9603b62cf7ae1ea76 /demos/MSP430-MSP430x1611-GCC | |
| parent | f44bd871c77406f8e28047d9484cbabafa626040 (diff) | |
| download | ChibiOS-b4143002333b4d1ffdd4caa0f717d3e8485ebd62.tar.gz ChibiOS-b4143002333b4d1ffdd4caa0f717d3e8485ebd62.tar.bz2 ChibiOS-b4143002333b4d1ffdd4caa0f717d3e8485ebd62.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@460 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/MSP430-MSP430x1611-GCC')
| -rw-r--r-- | demos/MSP430-MSP430x1611-GCC/board.c | 8 | ||||
| -rw-r--r-- | demos/MSP430-MSP430x1611-GCC/board.h | 18 |
2 files changed, 21 insertions, 5 deletions
diff --git a/demos/MSP430-MSP430x1611-GCC/board.c b/demos/MSP430-MSP430x1611-GCC/board.c index c6cfedce2..caef10720 100644 --- a/demos/MSP430-MSP430x1611-GCC/board.c +++ b/demos/MSP430-MSP430x1611-GCC/board.c @@ -33,6 +33,14 @@ void hwinit(void) { */
DCOCTL = VAL_DCOCTL;
BCSCTL1 = VAL_BCSCTL1;
+#if defined(MSP_USE_XT2CLK)
+ do {
+ int i;
+ IFG1 &= ~OFIFG;
+ for (i = 255; i > 0; i--)
+ asm("nop");
+ } while (IFG1 & OFIFG);
+#endif
BCSCTL2 = VAL_BCSCTL2;
/*
diff --git a/demos/MSP430-MSP430x1611-GCC/board.h b/demos/MSP430-MSP430x1611-GCC/board.h index 8b335f64f..d72da9c2c 100644 --- a/demos/MSP430-MSP430x1611-GCC/board.h +++ b/demos/MSP430-MSP430x1611-GCC/board.h @@ -25,26 +25,34 @@ /*
* Clock settings.
*/
-#define MSP_USE_XT2CLK
+//#define MSP_USE_XT2CLK
+#define MSP_USE_DCOCLK
+
+#if defined(MSP_USE_XT2CLK) && defined(MSP_USE_DCOCLK)
+#error "Define MSP_USE_XT2CLK or MSP_USE_DCOCLK, not both"
+#endif
#define LFXT1CLK 32768
#define XT2CLK 8000000
#define DCOCLK 1000000
#define ACLK LFXT1CLK
-#ifdef MSP_USE_XT2CLK
+#if defined(MSP_USE_XT2CLK)
#define MCLK XT2CLK
#define SMCLK (XT2CLK / 8)
-#else
+#elif defined(MSP_USE_DCOCLK)
#define MCLK DCOCLK
#define SMCLK DCOCLK
+#else
+#error "Default clock source not selected"
#endif
#define VAL_DCOCTL (DCO0 | DCO1)
-#ifdef MSP_USE_XT2CLK
+#if defined(MSP_USE_XT2CLK)
#define VAL_BCSCTL1 (RSEL2)
#define VAL_BCSCTL2 (SELM_2 | DIVM_0 | DIVS_3 | SELS)
-#else
+#endif
+#if defined(MSP_USE_DCOCLK)
#define VAL_BCSCTL1 (XT2OFF | RSEL2)
#define VAL_BCSCTL2 (SELM_0 | DIVM_0 | DIVS_0)
#endif
|