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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-07-01 14:10:13 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2012-07-01 14:10:13 +0000
commit21b907c94677776684b86440ec081a0252cd02e2 (patch)
tree3664934b835409b9b33e83e621ef4adeb796d410 /boards/ARDUINO_MEGA/board.c
parent8fabd4641a6d869901256d8b1b4163a6a99b05f6 (diff)
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Arduino Mega support.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4379 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ARDUINO_MEGA/board.c')
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1 files changed, 106 insertions, 0 deletions
diff --git a/boards/ARDUINO_MEGA/board.c b/boards/ARDUINO_MEGA/board.c
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+/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011,2012 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+#if defined(PORTA)
+ {VAL_PORTA, VAL_DDRA},
+#endif
+#if defined(PORTB)
+ {VAL_PORTB, VAL_DDRB},
+#endif
+#if defined(PORTC)
+ {VAL_PORTC, VAL_DDRC},
+#endif
+#if defined(PORTD)
+ {VAL_PORTD, VAL_DDRD},
+#endif
+#if defined(PORTE)
+ {VAL_PORTE, VAL_DDRE},
+#endif
+#if defined(PORTF)
+ {VAL_PORTF, VAL_DDRF},
+#endif
+#if defined(PORTG)
+ {VAL_PORTG, VAL_DDRG},
+#endif
+#if defined(PORTH)
+ {VAL_PORTH, VAL_DDRH},
+#endif
+#if defined(PORTJ)
+ {VAL_PORTJ, VAL_DDRJ},
+#endif
+#if defined(PORTK)
+ {VAL_PORTK, VAL_DDRK},
+#endif
+#if defined(PORTL)
+ {VAL_PORTL, VAL_DDRL},
+#endif
+};
+#endif /* HAL_USE_PAL */
+
+/**
+ * @brief Timer0 interrupt handler.
+ */
+CH_IRQ_HANDLER(TIMER0_COMPA_vect) {
+
+ CH_IRQ_PROLOGUE();
+
+ chSysLockFromIsr();
+ chSysTimerHandlerI();
+ chSysUnlockFromIsr();
+
+ CH_IRQ_EPILOGUE();
+}
+
+/**
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+ /*
+ * External interrupts setup, all disabled initially.
+ */
+ EICRA = 0x00;
+ EICRB = 0x00;
+ EIMSK = 0x00;
+
+ /*
+ * Timer 0 setup.
+ */
+ TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
+ (0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
+ (0 << COM0B1) | (0 << COM0B0); /* OC0B disabled. */
+ TCCR0B = (0 << WGM02) | /* CTC mode. */
+ (0 << CS02) | (1 << CS01) | (1 << CS00); /* CLK/64 clock. */
+ OCR0A = F_CPU / 64 / CH_FREQUENCY - 1;
+ TCNT0 = 0; /* Reset counter. */
+ TIFR0 = (1 << OCF0A); /* Reset pending. */
+ TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
+}