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authorRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-09-24 12:50:41 +0000
committerRocco Marco Guglielmi <roccomarco.guglielmi@live.com>2016-09-24 12:50:41 +0000
commitf5d1988830352e3c6aa8dc63bcf542683d48c0e7 (patch)
tree8ac0b543a1585803704a834b3dae155533b2283e
parentae31774f3e0ff81078be0029bf837b9d74d8c559 (diff)
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Fixed Bug #778.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9785 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--os/hal/ports/STM32/STM32F7xx/hal_lld.c2
-rw-r--r--readme.txt2
2 files changed, 3 insertions, 1 deletions
diff --git a/os/hal/ports/STM32/STM32F7xx/hal_lld.c b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
index 29472a465..5393e508a 100644
--- a/os/hal/ports/STM32/STM32F7xx/hal_lld.c
+++ b/os/hal/ports/STM32/STM32F7xx/hal_lld.c
@@ -134,7 +134,7 @@ void hal_lld_init(void) {
/* The SRAM2 bank can optionally made a non cache-able area for use by
DMA engines.*/
mpuConfigureRegion(MPU_REGION_7,
- 0x2004C000U,
+ SRAM2_BASE,
MPU_RASR_ATTR_AP_RW_RW |
MPU_RASR_ATTR_NON_CACHEABLE |
MPU_RASR_SIZE_16K |
diff --git a/readme.txt b/readme.txt
index 8806b541c..17c38be81 100644
--- a/readme.txt
+++ b/readme.txt
@@ -126,6 +126,8 @@
- RT: Merged RT4.
- NIL: Merged NIL2.
- NIL: Added STM32F7 demo.
+- HAL: Fixed wrong SRAM2_BASE in STM32F7xx port (bug #778)
+ (backported to 16.1.6).
- HAL: Added DAC configs in RT-STM32F051-DISCOVERY\mcuconf.h (bug #777)
(backported to 16.1.6, 3.0.6).
- HAL: Fixed DAC driver not compiling on STM32F051 and some bitmasks related