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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-01 09:24:31 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2018-07-01 09:24:31 +0000 |
| commit | ca1927e0088226908f382cb6f33edd1b32686e70 (patch) | |
| tree | a6bcda4ff1dd280a17524f4c0323ea6458521743 | |
| parent | 45871e99e9c73c66b39c81c390005572590e2056 (diff) | |
| download | ChibiOS-ca1927e0088226908f382cb6f33edd1b32686e70.tar.gz ChibiOS-ca1927e0088226908f382cb6f33edd1b32686e70.tar.bz2 ChibiOS-ca1927e0088226908f382cb6f33edd1b32686e70.zip | |
Fixed bug #956.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12126 110e8d01-0319-4d1e-a829-52ad28d1bb01
| -rw-r--r-- | os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c | 4 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/hal_lld.h | 10 | ||||
| -rw-r--r-- | os/hal/ports/STM32/STM32F0xx/stm32_rcc.h | 46 | ||||
| -rw-r--r-- | readme.txt | 2 |
4 files changed, 60 insertions, 2 deletions
diff --git a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c index 1c4cafd81..214786cab 100644 --- a/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c +++ b/os/hal/ports/STM32/LLD/USARTv2/hal_uart_lld.c @@ -685,8 +685,8 @@ void uart_lld_init(void) { #endif
#endif
-#if STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \
- STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \
+#if STM32_UART_USE_USART3 || STM32_UART_USE_UART4 || \
+ STM32_UART_USE_UART5 || STM32_UART_USE_USART6 || \
STM32_UART_USE_UART7 || STM32_UART_USE_UART8
#if defined(STM32_USART3_8_HANDLER)
nvicEnableVector(STM32_USART3_8_NUMBER, STM32_UART_USART3_8_IRQ_PRIORITY);
diff --git a/os/hal/ports/STM32/STM32F0xx/hal_lld.h b/os/hal/ports/STM32/STM32F0xx/hal_lld.h index e018cc38e..66d55bd53 100644 --- a/os/hal/ports/STM32/STM32F0xx/hal_lld.h +++ b/os/hal/ports/STM32/STM32F0xx/hal_lld.h @@ -936,6 +936,16 @@ #define STM32_USART6CLK STM32_PCLK
/**
+ * @brief USART7 frequency.
+ */
+#define STM32_UART7CLK STM32_PCLK
+
+/**
+ * @brief USART8 frequency.
+ */
+#define STM32_UART8CLK STM32_PCLK
+
+/**
* @brief Timers clock.
*/
#if (STM32_PPRE == STM32_PPRE_DIV1) || defined(__DOXYGEN__)
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h index 7feb343bf..091f60882 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_rcc.h @@ -805,6 +805,52 @@ * @api
*/
#define rccResetUSART6() rccResetAPB2(RCC_APB2RSTR_USART6RST)
+
+/**
+ * @brief Enables the UART7 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART7(lp) rccEnableAPB2(RCC_APB2ENR_USART7EN, lp)
+
+/**
+ * @brief Disables the UART7 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableUART7() rccDisableAPB2(RCC_APB2ENR_USART7EN)
+
+/**
+ * @brief Resets the UART7 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART7() rccResetAPB2(RCC_APB2RSTR_USART7RST)
+
+/**
+ * @brief Enables the UART8 peripheral clock.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableUART8(lp) rccEnableAPB2(RCC_APB2ENR_USART8EN, lp)
+
+/**
+ * @brief Disables the UART8 peripheral clock.
+ *
+ * @api
+ */
+#define rccDisableUART8() rccDisableAPB2(RCC_APB2ENR_USART8EN)
+
+/**
+ * @brief Resets the UART8 peripheral.
+ *
+ * @api
+ */
+#define rccResetUART8() rccResetAPB2(RCC_APB2RSTR_USART8RST)
/** @} */
/**
diff --git a/readme.txt b/readme.txt index 36b3c34ff..002550eb1 100644 --- a/readme.txt +++ b/readme.txt @@ -138,6 +138,8 @@ - EX: Updated LIS302DL to 1.1.0 (backported to 18.2.1).
- EX: Updated LPS25H to 1.1.0 (backported to 18.2.1).
- EX: Updated LSM303DLHC to 1.1.0 (backported to 18.2.1).
+- HAL: Fixed missing USART7/8 definitions in STM32F0 HAL (bug #956)(backported
+ to 18.2.2).
- LIB: Fixed heap allocation issue (bug #955)(backported to 18.2.2 and 17.6.5).
- HAL: Fixed win32 simulator HAL broken because a typo (bug #954)(backported
to 18.2.2).
|