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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-09-13 09:38:59 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-09-13 09:38:59 +0000 |
commit | c5496788e53c99371c2f4a36c67dcbf556176398 (patch) | |
tree | ead285751d4abfec3b6d1d2ce0ee87cf7cb162a1 | |
parent | e4400a5c7f5c5790cf94d84db5e8ad4c356773d8 (diff) | |
download | ChibiOS-c5496788e53c99371c2f4a36c67dcbf556176398.tar.gz ChibiOS-c5496788e53c99371c2f4a36c67dcbf556176398.tar.bz2 ChibiOS-c5496788e53c99371c2f4a36c67dcbf556176398.zip |
Cortex-M3 related improvements.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1161 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r-- | docs/reports/STM32F103-72.txt | 37 | ||||
-rw-r--r-- | os/kernel/include/scheduler.h | 2 | ||||
-rw-r--r-- | os/kernel/src/chschd.c | 3 | ||||
-rw-r--r-- | os/ports/GCC/ARMCM3/chcore.c | 6 | ||||
-rw-r--r-- | os/ports/GCC/ARMCM3/chcore.h | 7 | ||||
-rw-r--r-- | readme.txt | 2 |
6 files changed, 34 insertions, 23 deletions
diff --git a/docs/reports/STM32F103-72.txt b/docs/reports/STM32F103-72.txt index 09ddc8850..78b3dded3 100644 --- a/docs/reports/STM32F103-72.txt +++ b/docs/reports/STM32F103-72.txt @@ -90,51 +90,64 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states) --- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
---- Score : 221677 msgs/S, 443354 ctxswc/S
+--- Score : 221722 msgs/S, 443444 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
---- Score : 185595 msgs/S, 371190 ctxswc/S
+--- Score : 185630 msgs/S, 371260 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
---- Score : 185595 msgs/S, 371190 ctxswc/S
+--- Score : 185630 msgs/S, 371260 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
---- Score : 696488 ctxswc/S
+--- Score : 696632 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 173486 threads/S
+--- Score : 173525 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 222371 threads/S
+--- Score : 222415 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
---- Score : 56916 reschedulations/S, 341496 ctxswc/S
+--- Score : 56929 reschedulations/S, 341574 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 504956 reschedulations/S, 504956 ctxswc/S
+--- Score : 505056 reschedulations/S, 505056 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 474720 bytes/S
+--- Score : 474812 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 647110 timers/S
+--- Score : 647250 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 832884 wait+signal/S
+--- Score : 833064 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 586424 lock+unlock/S
+--- Score : 586532 lock+unlock/S
+--- Result: SUCCESS
+----------------------------------------------------------------------------
+--- Test Case 11.13 (Benchmark, RAM footprint)
+--- System: 300 bytes
+--- Thread: 60 bytes
+--- Timer : 20 bytes
+--- Semaph: 12 bytes
+--- EventS: 4 bytes
+--- EventL: 12 bytes
+--- Mutex : 16 bytes
+--- CondV.: 8 bytes
+--- Queue : 32 bytes
+--- MailB.: 40 bytes
--- Result: SUCCESS
----------------------------------------------------------------------------
diff --git a/os/kernel/include/scheduler.h b/os/kernel/include/scheduler.h index 8aa692e58..f3216bb7a 100644 --- a/os/kernel/include/scheduler.h +++ b/os/kernel/include/scheduler.h @@ -117,7 +117,7 @@ extern "C" { * @details This function returns @p TRUE if there is a ready thread with * higher priority. */ -#define chSchMustRescheduleS() (firstprio(&rlist.r_queue) >= currp->p_prio) +#define chSchMustRescheduleS() (firstprio(&rlist.r_queue) > currp->p_prio) #endif /* _SCHEDULER_H_ */ diff --git a/os/kernel/src/chschd.c b/os/kernel/src/chschd.c index 1f7e27c93..08ecf46a0 100644 --- a/os/kernel/src/chschd.c +++ b/os/kernel/src/chschd.c @@ -210,8 +210,7 @@ void chSchDoRescheduleI(void) { * the ready list then make the higher priority thread running. */ void chSchRescheduleS(void) { - /* First thread in the runnable queue has higher priority than the running - * thread?.*/ + if (chSchMustRescheduleS()) chSchDoRescheduleI(); } diff --git a/os/ports/GCC/ARMCM3/chcore.c b/os/ports/GCC/ARMCM3/chcore.c index ce76ffa4c..4e9874f82 100644 --- a/os/ports/GCC/ARMCM3/chcore.c +++ b/os/ports/GCC/ARMCM3/chcore.c @@ -151,13 +151,7 @@ void PendSVVector(void) { Thread *otp;
register struct intctx *sp_thd asm("r12");
- asm volatile ("push {lr}");
chSysLockFromIsr();
- if (!chSchRescRequiredI()) {
- chSysUnlockFromIsr();
- asm volatile ("pop {pc}");
- }
- asm volatile ("pop {lr}");
PUSH_CONTEXT(sp_thd);
diff --git a/os/ports/GCC/ARMCM3/chcore.h b/os/ports/GCC/ARMCM3/chcore.h index 4a6ee2695..daff52090 100644 --- a/os/ports/GCC/ARMCM3/chcore.h +++ b/os/ports/GCC/ARMCM3/chcore.h @@ -209,8 +209,11 @@ struct context { * IRQ epilogue code, inserted at the end of all IRQ handlers enabled to
* invoke system APIs.
*/
-#define PORT_IRQ_EPILOGUE() { \
- SCB_ICSR = ICSR_PENDSVSET; \
+#define PORT_IRQ_EPILOGUE() { \
+ chSysLockFromIsr(); \
+ if (chSchRescRequiredI()) \
+ SCB_ICSR = ICSR_PENDSVSET; \
+ chSysUnlockFromIsr(); \
}
/**
diff --git a/readme.txt b/readme.txt index 17faf38f8..ecbf68907 100644 --- a/readme.txt +++ b/readme.txt @@ -12,6 +12,8 @@ - FIX: Fixed GCC 4.4.x related problems in CM3 port (bug 2846162)(backported
in stable branch).
- FIX: Fixed LPC214x UART problem (bug 2841088)(backported in stable branch).
+- NEW: Improved the Cortex-M3 preemption code, now less interrupt-related
+ jitter is generated and all benchmarks scores improved a bit.
- NEW: Added new APIs chSchDoYieldS() and chThdYield().
- MEW: Added new benchmark about RAM footprint.
- MEW: Added new benchmark about round robin rescheduling.
|