aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-10-29 16:12:49 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2013-10-29 16:12:49 +0000
commitb7db852d0bbbcfe52810ab68b6885b2cf6064276 (patch)
tree030704ed2492f03f55c64c19db61e4fdc0ad5619
parent498d5c6125a80190e4732ae36187657df5504a61 (diff)
downloadChibiOS-b7db852d0bbbcfe52810ab68b6885b2cf6064276.tar.gz
ChibiOS-b7db852d0bbbcfe52810ab68b6885b2cf6064276.tar.bz2
ChibiOS-b7db852d0bbbcfe52810ab68b6885b2cf6064276.zip
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6395 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h1
-rw-r--r--demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h1
-rw-r--r--demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h1
-rw-r--r--demos/ARMCM4-STM32F407-LWIP/mcuconf.h1
-rw-r--r--readme.txt1
-rw-r--r--testhal/STM32F4xx/ADC/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/BKPSRAM/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/CAN/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/DMA_STORM/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/EXT/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/GPT/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/I2C/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/IRQ_STORM/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/PWM-ICU/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/RTC/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/RTC_FATTIME/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/SDC/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/SPI/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/UART/mcuconf.h1
-rw-r--r--testhal/STM32F4xx/USB_CDC/mcuconf.h1
21 files changed, 1 insertions, 20 deletions
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h b/demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h
index 0dedf4b72..2a16dc0f0 100644
--- a/demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h
+++ b/demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
index 4bf936685..38a5bd4fd 100644
--- a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
+++ b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h b/demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h
index af08084f0..7ca9c6cf1 100644
--- a/demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h
+++ b/demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/demos/ARMCM4-STM32F407-LWIP/mcuconf.h b/demos/ARMCM4-STM32F407-LWIP/mcuconf.h
index 9f792a04a..84a865719 100644
--- a/demos/ARMCM4-STM32F407-LWIP/mcuconf.h
+++ b/demos/ARMCM4-STM32F407-LWIP/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/readme.txt b/readme.txt
index cef87e972..66d242c99 100644
--- a/readme.txt
+++ b/readme.txt
@@ -116,6 +116,7 @@
(backported to 2.6.0).
- FIX: Fixed MS2ST() and US2ST() macros error (bug #415)(backported to 2.6.0,
2.4.4, 2.2.10, NilRTOS).
+- NEW: Added support for STM32F401/STM32F42x/STM32F43x devices.
- NEW: Added support for STM32F0xx platform in RTCv2 driver.
- NEW: Improvements to the STM32F4xx backup domain initialization.
- NEW: Added initializer for the DIER register to the STM32 GPT, ICU and
diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h
index 3c02eb520..f933ca55f 100644
--- a/testhal/STM32F4xx/ADC/mcuconf.h
+++ b/testhal/STM32F4xx/ADC/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/BKPSRAM/mcuconf.h b/testhal/STM32F4xx/BKPSRAM/mcuconf.h
index 6ebe401c9..fd1c54a3d 100644
--- a/testhal/STM32F4xx/BKPSRAM/mcuconf.h
+++ b/testhal/STM32F4xx/BKPSRAM/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE TRUE
diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h
index 5d4d749ff..8ceac7c10 100644
--- a/testhal/STM32F4xx/CAN/mcuconf.h
+++ b/testhal/STM32F4xx/CAN/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
index b3a95c5c4..5de616c27 100644
--- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h
index f71d9adfd..9e2e53fe3 100644
--- a/testhal/STM32F4xx/EXT/mcuconf.h
+++ b/testhal/STM32F4xx/EXT/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h
index 26e72cf8f..432d85667 100644
--- a/testhal/STM32F4xx/GPT/mcuconf.h
+++ b/testhal/STM32F4xx/GPT/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h
index f9f76085a..d0f9066b8 100644
--- a/testhal/STM32F4xx/I2C/mcuconf.h
+++ b/testhal/STM32F4xx/I2C/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
index a75cce903..f5ba86859 100644
--- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
index a75cce903..f5ba86859 100644
--- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
+++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
index 5b843dfce..a64322f46 100644
--- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h
+++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h
index 5fd843b54..ba6406752 100644
--- a/testhal/STM32F4xx/RTC/mcuconf.h
+++ b/testhal/STM32F4xx/RTC/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h
index 0dedf4b72..2a16dc0f0 100644
--- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h
+++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h
index 0dedf4b72..2a16dc0f0 100644
--- a/testhal/STM32F4xx/SDC/mcuconf.h
+++ b/testhal/STM32F4xx/SDC/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h
index c67121451..acaa05728 100644
--- a/testhal/STM32F4xx/SPI/mcuconf.h
+++ b/testhal/STM32F4xx/SPI/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h
index 3d6d86e5d..341047cda 100644
--- a/testhal/STM32F4xx/UART/mcuconf.h
+++ b/testhal/STM32F4xx/UART/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE
diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h
index 9fb66d46d..5d8b3a470 100644
--- a/testhal/STM32F4xx/USB_CDC/mcuconf.h
+++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h
@@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
-#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE