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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-03-13 11:49:41 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-03-13 11:49:41 +0000 |
| commit | b07fa4162a021c9adb29772ddb5b20a95d6a8e54 (patch) | |
| tree | 20c2421cd673073801bdb23b3d5ce118ac9b092d | |
| parent | e0ed67de6b5d4025aaad9e74080a3a421c1a760b (diff) | |
| download | ChibiOS-b07fa4162a021c9adb29772ddb5b20a95d6a8e54.tar.gz ChibiOS-b07fa4162a021c9adb29772ddb5b20a95d6a8e54.tar.bz2 ChibiOS-b07fa4162a021c9adb29772ddb5b20a95d6a8e54.zip | |
Removed old style initializers from the STM32 DACv1 driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9090 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/STM32/LLD/DACv1/dac_lld.c | 88 |
1 files changed, 44 insertions, 44 deletions
diff --git a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c index 5ab25bae1..2a2f5ffd4 100644 --- a/os/hal/ports/STM32/LLD/DACv1/dac_lld.c +++ b/os/hal/ports/STM32/LLD/DACv1/dac_lld.c @@ -83,65 +83,65 @@ DACDriver DACD4; #if STM32_DAC_USE_DAC1_CH1 == TRUE
static const dacparams_t dma1_ch1_params = {
- dac: DAC1,
- dataoffset: 0U,
- regshift: 0U,
- regmask: 0xFFFF0000U,
- dma: STM32_DMA_STREAM(STM32_DAC_DAC1_CH1_DMA_STREAM),
- dmamode: STM32_DMA_CR_CHSEL(DAC1_CH1_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_DAC_DAC1_CH1_DMA_PRIORITY) |
- STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
- STM32_DMA_CR_TCIE,
- dmairqprio: STM32_DAC_DAC1_CH1_IRQ_PRIORITY
+ .dac = DAC1,
+ .dataoffset = 0U,
+ .regshift = 0U,
+ .regmask = 0xFFFF0000U,
+ .dma = STM32_DMA_STREAM(STM32_DAC_DAC1_CH1_DMA_STREAM),
+ .dmamode = STM32_DMA_CR_CHSEL(DAC1_CH1_DMA_CHANNEL) |
+ STM32_DMA_CR_PL(STM32_DAC_DAC1_CH1_DMA_PRIORITY) |
+ STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
+ STM32_DMA_CR_TCIE,
+ .dmairqprio = STM32_DAC_DAC1_CH1_IRQ_PRIORITY
};
#endif
#if STM32_DAC_USE_DAC1_CH2 == TRUE
static const dacparams_t dma1_ch2_params = {
- dac: DAC1,
- dataoffset: CHANNEL_DATA_OFFSET,
- regshift: 16U,
- regmask: 0x0000FFFFU,
- dma: STM32_DMA_STREAM(STM32_DAC_DAC1_CH2_DMA_STREAM),
- dmamode: STM32_DMA_CR_CHSEL(DAC1_CH2_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_DAC_DAC1_CH2_DMA_PRIORITY) |
- STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
- STM32_DMA_CR_TCIE,
- dmairqprio: STM32_DAC_DAC1_CH2_IRQ_PRIORITY
+ .dac = DAC1,
+ .dataoffset = CHANNEL_DATA_OFFSET,
+ .regshift = 16U,
+ .regmask = 0x0000FFFFU,
+ .dma = STM32_DMA_STREAM(STM32_DAC_DAC1_CH2_DMA_STREAM),
+ .dmamode = STM32_DMA_CR_CHSEL(DAC1_CH2_DMA_CHANNEL) |
+ STM32_DMA_CR_PL(STM32_DAC_DAC1_CH2_DMA_PRIORITY) |
+ STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
+ STM32_DMA_CR_TCIE,
+ .dmairqprio = STM32_DAC_DAC1_CH2_IRQ_PRIORITY
};
#endif
#if STM32_DAC_USE_DAC2_CH1 == TRUE
static const dacparams_t dma2_ch1_params = {
- dac: DAC2,
- dataoffset: 0U,
- regshift: 0U,
- regmask: 0xFFFF0000U,
- dma: STM32_DMA_STREAM(STM32_DAC_DAC2_CH1_DMA_STREAM),
- dmamode: STM32_DMA_CR_CHSEL(DAC2_CH1_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_DAC_DAC2_CH1_DMA_PRIORITY) |
- STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
- STM32_DMA_CR_TCIE,
- dmairqprio: STM32_DAC_DAC2_CH1_IRQ_PRIORITY
+ .dac = DAC2,
+ .dataoffset = 0U,
+ .regshift = 0U,
+ .regmask = 0xFFFF0000U,
+ .dma = STM32_DMA_STREAM(STM32_DAC_DAC2_CH1_DMA_STREAM),
+ .dmamode = STM32_DMA_CR_CHSEL(DAC2_CH1_DMA_CHANNEL) |
+ STM32_DMA_CR_PL(STM32_DAC_DAC2_CH1_DMA_PRIORITY) |
+ STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
+ STM32_DMA_CR_TCIE,
+ .dmairqprio = STM32_DAC_DAC2_CH1_IRQ_PRIORITY
};
#endif
#if STM32_DAC_USE_DAC2_CH2 == TRUE
static const dacparams_t dma1_ch2_params = {
- dac: DAC2,
- dataoffset: CHANNEL_DATA_OFFSET,
- regshift: 16U,
- regmask: 0x0000FFFFU,
- dma: STM32_DMA_STREAM(STM32_DAC_DAC2_CH2_DMA_STREAM),
- dmamode: STM32_DMA_CR_CHSEL(DAC2_CH2_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_DAC_DAC2_CH2_DMA_PRIORITY) |
- STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
- STM32_DMA_CR_TCIE,
- dmairqprio: STM32_DAC_DAC2_CH2_IRQ_PRIORITY
+ .dac = DAC2,
+ .dataoffset = CHANNEL_DATA_OFFSET,
+ .regshift = 16U,
+ .regmask = 0x0000FFFFU,
+ .dma = STM32_DMA_STREAM(STM32_DAC_DAC2_CH2_DMA_STREAM),
+ .dmamode = STM32_DMA_CR_CHSEL(DAC2_CH2_DMA_CHANNEL) |
+ STM32_DMA_CR_PL(STM32_DAC_DAC2_CH2_DMA_PRIORITY) |
+ STM32_DMA_CR_MINC | STM32_DMA_CR_CIRC | STM32_DMA_CR_DIR_M2P |
+ STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE | STM32_DMA_CR_HTIE |
+ STM32_DMA_CR_TCIE,
+ .dmairqprio = STM32_DAC_DAC2_CH2_IRQ_PRIORITY
};
#endif
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