diff options
| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-04 10:32:32 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-02-04 10:32:32 +0000 |
| commit | 6d58b61eca6da57b7305ad5f2fc954d10b9eb3e4 (patch) | |
| tree | 50170dcf311dcf97e2ca2e9e1a058d5e6e327977 | |
| parent | 3950ddaed21130c7fbf5e82d314a92b0d58ec4aa (diff) | |
| download | ChibiOS-6d58b61eca6da57b7305ad5f2fc954d10b9eb3e4.tar.gz ChibiOS-6d58b61eca6da57b7305ad5f2fc954d10b9eb3e4.tar.bz2 ChibiOS-6d58b61eca6da57b7305ad5f2fc954d10b9eb3e4.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5109 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld | 11 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld | 11 | ||||
| -rw-r--r-- | os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld | 11 |
3 files changed, 9 insertions, 24 deletions
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld index b84620ed8..977db64a1 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL54_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
+ __ivpr_base__ = .;
KEEP(*(.bam))
KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 64KB because the IVPR register
- requires an alignment of 64KB and the first 64KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 64KB by using special sections.*/
- . = ALIGN(0x00010000);
- __ivpr_base__ = .;
KEEP(*(.handlers))
+ . = ALIGN(0x800);
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld index 3cf9e44c9..aceed57d8 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL60_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
+ __ivpr_base__ = .;
KEEP(*(.bam))
KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 64KB because the IVPR register
- requires an alignment of 64KB and the first 64KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 64KB by using special sections.*/
- . = ALIGN(0x00010000);
- __ivpr_base__ = .;
KEEP(*(.handlers))
+ . = ALIGN(0x800);
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
diff --git a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld index 8a7674be1..ed9a9761e 100644 --- a/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld +++ b/os/ports/GCC/PPC/SPC56ELxx/ld/SPC56EL70_LSM.ld @@ -46,17 +46,12 @@ SECTIONS . = ORIGIN(flash);
.boot : ALIGN(16) SUBALIGN(16)
{
+ __ivpr_base__ = .;
KEEP(*(.bam))
KEEP(*(.crt0))
- . = ALIGN(0x00000800);
- KEEP(*(.vectors))
- /* Note, have to waste the first 64KB because the IVPR register
- requires an alignment of 64KB and the first 64KB cannot be used,
- IVOR0 would conflict with the BAM word. Applications could
- allocate code or data in the first 64KB by using special sections.*/
- . = ALIGN(0x00010000);
- __ivpr_base__ = .;
KEEP(*(.handlers))
+ . = ALIGN(0x800);
+ KEEP(*(.vectors))
} > flash
constructors : ALIGN(4) SUBALIGN(4)
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