git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1387 35acf78f-673a-0410-8e92-d51de3d6d3f4

10 files changed, 1330 insertions, 0 deletions

diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile
new file mode 100644
index 000000000..446655339
--- /dev/null
+++ b/testhal/STM32/Makefile
@@ -0,0 +1,201 @@
+##############################################################################

+# Build global options

+# NOTE: Can be overridden externally.

+#

+

+# Compiler options here.

+ifeq ($(USE_OPT),)

+  USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16

+endif

+

+# C++ specific options here (added to USE_OPT).

+ifeq ($(USE_CPPOPT),)

+  USE_CPPOPT = -fno-rtti

+endif

+

+# Enable this if you want the linker to remove unused code and data

+ifeq ($(USE_LINK_GC),)

+  USE_LINK_GC = yes

+endif

+

+# If enabled, this option allows to compile the application in THUMB mode.

+ifeq ($(USE_THUMB),)

+  USE_THUMB = yes

+endif

+

+# Enable register caching optimization (read documentation).

+ifeq ($(USE_CURRP_CACHING),)

+  USE_CURRP_CACHING = no

+endif

+

+#

+# Build global options

+##############################################################################

+

+##############################################################################

+# Architecture or project specific options

+#

+

+# Enable this if you really want to use the STM FWLib.

+ifeq ($(USE_FWLIB),)

+  USE_FWLIB = no

+endif

+

+#

+# Architecture or project specific options

+##############################################################################

+

+##############################################################################

+# Project, sources and paths

+#

+

+# Define project name here

+PROJECT = ch

+

+# Define linker script file here

+LDSCRIPT= ch.ld

+

+# Imported source files

+CHIBIOS = ../..

+include ${CHIBIOS}/os/hal/hal.mk

+include ${CHIBIOS}/os/hal/platforms/STM32/platform.mk

+include ${CHIBIOS}/os/ports/GCC/ARMCM3/port.mk

+include ${CHIBIOS}/os/kernel/kernel.mk

+include ${CHIBIOS}/test/test.mk

+

+# C sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CSRC = ${PORTSRC} \

+       ${KERNSRC} \

+       ${TESTSRC} \

+       ${HALSRC} \

+       ${PLATFORMSRC} \

+       ${CHIBIOS}/os/various/evtimer.c \

+       ${CHIBIOS}/os/various/syscalls.c \

+       board.c settings.c main.c
+

+# C++ sources that can be compiled in ARM or THUMB mode depending on the global

+# setting.

+CPPSRC =

+

+# C sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACSRC =

+

+# C++ sources to be compiled in ARM mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+ACPPSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCSRC =

+

+# C sources to be compiled in THUMB mode regardless of the global setting.

+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler

+#       option that results in lower performance and larger code size.

+TCPPSRC =

+

+# List ASM source files here

+ASMSRC = $(PORTASM) \

+         ${CHIBIOS}/os/ports/GCC/ARMCM3/STM32F103/vectors.s

+

+INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) $(HALINC) $(PLATFORMINC) \

+         ${CHIBIOS}/os/various

+

+#

+# Project, sources and paths

+##############################################################################

+

+##############################################################################

+# Compiler settings

+#

+

+MCU  = cortex-m3

+

+TRGT = arm-elf-

+CC   = $(TRGT)gcc

+CPPC = $(TRGT)g++

+# Enable loading with g++ only if you need C++ runtime support.

+# NOTE: You can use C++ even without C++ support if you are careful. C++

+#       runtime support makes code size explode.

+LD   = $(TRGT)gcc

+#LD   = $(TRGT)g++

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+OD   = $(TRGT)objdump

+HEX  = $(CP) -O ihex

+BIN  = $(CP) -O binary

+

+# ARM-specific options here

+AOPT =

+

+# THUMB-specific options here

+TOPT = -mthumb -DTHUMB

+

+# Define C warning options here

+CWARN = -Wall -Wextra -Wstrict-prototypes

+

+# Define C++ warning options here

+CPPWARN = -Wall -Wextra

+

+#

+# Compiler settings

+##############################################################################

+

+##############################################################################

+# Start of default section

+#

+

+# List all default C defines here, like -D_DEBUG=1

+DDEFS =

+

+# List all default ASM defines here, like -D_DEBUG=1

+DADEFS =

+

+# List all default directories to look for include files here

+DINCDIR =

+

+# List the default directory to look for the libraries here

+DLIBDIR =

+

+# List all default libraries here

+DLIBS =

+

+#

+# End of default section

+##############################################################################

+

+##############################################################################

+# Start of user section

+#

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS =

+

+# Define ASM defines here

+UADEFS =

+

+# List all user directories here

+UINCDIR =

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS =

+

+#

+# End of user defines

+##############################################################################

+

+ifeq ($(USE_FWLIB),yes)

+  include ${CHIBIOS}/ext/stm32lib/stm32lib.mk

+  CSRC += ${STM32SRC}

+  INCDIR += ${STM32INC}

+  USE_OPT += -DUSE_STDPERIPH_DRIVER

+endif

+

+include ${CHIBIOS}/os/ports/GCC/ARM/rules.mk

diff --git a/testhal/STM32/board.c b/testhal/STM32/board.c
new file mode 100644
index 000000000..8c33354ae
--- /dev/null
+++ b/testhal/STM32/board.c
@@ -0,0 +1,49 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#include "ch.h"

+#include "hal.h"

+

+/*

+ * Early initialization code.

+ * This initialization is performed just after reset before BSS and DATA

+ * segments initialization.

+ */

+void hwinit0(void) {

+

+  stm32_clock_init();

+}

+

+/*

+ * Late initialization code.

+ * This initialization is performed after BSS and DATA segments initialization

+ * and before invoking the main() function.

+ */

+void hwinit1(void) {

+

+  /*

+   * HAL initialization.

+   */

+  halInit();

+

+  /*

+   * ChibiOS/RT initialization.

+   */

+  chSysInit();

+}

diff --git a/testhal/STM32/board.h b/testhal/STM32/board.h
new file mode 100644
index 000000000..588ea3c5d
--- /dev/null
+++ b/testhal/STM32/board.h
@@ -0,0 +1,67 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#ifndef _BOARD_H_

+#define _BOARD_H_

+

+/*

+ * Board frequencies.

+ */

+#define LSECLK          32768

+#define HSECLK          8000000

+#define HSICLK          8000000

+

+/*

+ * IO pins assignments.

+ */

+#define GPIOA_BUTTON            0

+#define GPIOA_SPI1NSS           4

+

+#define GPIOB_SPI2NSS           12

+

+#define GPIOC_MMCWP             6

+#define GPIOC_MMCCP             7

+#define GPIOC_CANCNTL           10

+#define GPIOC_DISC              11

+#define GPIOC_LED               12

+

+/*

+ * All inputs with pullups unless otherwise specified.

+ */

+#define VAL_GPIOACRL            0x88888884      // PA0:FI

+#define VAL_GPIOACRH            0x88888888

+#define VAL_GPIOAODR            0xFFFFFFFF

+

+#define VAL_GPIOBCRL            0x88883888      // PB3:PP

+#define VAL_GPIOBCRH            0x88888888

+#define VAL_GPIOBODR            0xFFFFFFFF

+

+#define VAL_GPIOCCRL            0x44888888      // PC6,PC7:FI

+#define VAL_GPIOCCRH            0x88833888      // PC11,PC12:PP

+#define VAL_GPIOCODR            0xFFFFFFFF

+

+#define VAL_GPIODCRL            0x88888844      // PD0,PD1:FI

+#define VAL_GPIODCRH            0x88888888

+#define VAL_GPIODODR            0xFFFFFFFF

+

+#define VAL_GPIOECRL            0x88888888

+#define VAL_GPIOECRH            0x88888888

+#define VAL_GPIOEODR            0xFFFFFFFF

+

+#endif /* _BOARD_H_ */

diff --git a/testhal/STM32/ch.ld b/testhal/STM32/ch.ld
new file mode 100644
index 000000000..22d5546a1
--- /dev/null
+++ b/testhal/STM32/ch.ld
@@ -0,0 +1,94 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/*

+ * ST32F103 memory setup.

+ */

+__main_stack_size__     = 0x0200;

+__process_stack_size__  = 0x0400;

+__stacks_total_size__   = __main_stack_size__ + __process_stack_size__;

+

+MEMORY

+{

+    flash : org = 0x08000000, len = 128k

+    ram : org = 0x20000000, len = 20k

+}

+

+__ram_start__           = ORIGIN(ram);

+__ram_size__            = LENGTH(ram);

+__ram_end__             = __ram_start__ + __ram_size__;

+

+SECTIONS

+{

+    . = 0;

+

+    .text : ALIGN(16) SUBALIGN(16)

+    {

+        _text = .;

+        KEEP(*(vectors));

+        *(.text)

+        *(.text.*);

+        *(.rodata);

+        *(.rodata.*);

+        *(.glue_7t);

+        *(.glue_7);

+        *(.gcc*);

+        *(.ctors);

+        *(.dtors);

+        . = ALIGN(4);

+        _etext = .;

+    } > flash

+

+    _textdata = _etext;

+

+    .data :

+    {

+        _data = .;

+        *(.data)

+        . = ALIGN(4);

+        *(.data.*)

+        . = ALIGN(4);

+        *(.ramtext)

+        . = ALIGN(4);

+        _edata = .;

+    } > ram AT > flash

+

+    .bss :

+    {

+        _bss_start = .;

+        *(.bss)

+        . = ALIGN(4);

+        *(.bss.*)

+        . = ALIGN(4);

+        *(COMMON)

+        . = ALIGN(4);

+        _bss_end = .;

+    } > ram    

+    

+    /DISCARD/ :

+    {

+        *(.eh_*)

+    }

+}

+

+PROVIDE(end = .);

+_end            = .;

+

+__heap_base__   = _end;

+__heap_end__    = __ram_end__ - __stacks_total_size__;

diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h
new file mode 100644
index 000000000..31c3c7a50
--- /dev/null
+++ b/testhal/STM32/chconf.h
@@ -0,0 +1,464 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file templates/chconf.h

+ * @brief Configuration file template.

+ * @addtogroup config

+ * @{

+ */

+

+#ifndef _CHCONF_H_

+#define _CHCONF_H_

+

+/*===========================================================================*/

+/* Kernel parameters.                                                        */

+/*===========================================================================*/

+

+/**

+ * @brief System tick frequency.

+ * @details Frequency of the system timer that drives the system ticks. This

+ *          setting also defines the system tick time unit.

+ */

+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)

+#define CH_FREQUENCY                    1000

+#endif

+

+/**

+ * @brief Round robin interval.

+ * @details This constant is the number of system ticks allowed for the

+ *          threads before preemption occurs. Setting this value to zero

+ *          disables the round robin mechanism.

+ *

+ * @note Disabling round robin makes the kernel more compact and generally

+ *       faster but forbids multiple threads at the same priority level.

+ */

+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)

+#define CH_TIME_QUANTUM                 20

+#endif

+

+/**

+ * @brief Nested locks.

+ * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock()

+ *          operations is allowed.<br>

+ *          For performance and code size reasons the recommended setting

+ *          is to leave this option disabled.<br>

+ *          You may use this option if you need to merge ChibiOS/RT with

+ *          external libraries that require nested lock/unlock operations.

+ *

+ * @note The default is @p FALSE.

+ */

+#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__)

+#define CH_USE_NESTED_LOCKS             FALSE

+#endif

+

+/**

+ * @brief Managed RAM size.

+ * @details Size of the RAM area to be managed by the OS. If set to zero

+ *          then the whole available RAM is used. The core memory is made

+ *          available to the heap allocator and/or can be used directly through

+ *          the simplified core memory allocator.

+ *

+ * @note In order to let the OS manage the whole RAM the linker script must

+ *       provide the @p __heap_base__ and @p __heap_end__ symbols.

+ * @note Requires @p CH_USE_COREMEM.

+ */

+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)

+#define CH_MEMCORE_SIZE                 0

+#endif

+

+/*===========================================================================*/

+/* Performance options.                                                      */

+/*===========================================================================*/

+

+/**

+ * @brief OS optimization.

+ * @details If enabled then time efficient rather than space efficient code

+ *          is used when two possible implementations exist.

+ *

+ * @note This is not related to the compiler optimization options.

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)

+#define CH_OPTIMIZE_SPEED               TRUE

+#endif

+

+/**

+ * @brief Exotic optimization.

+ * @details If defined then a CPU register is used as storage for the global

+ *          @p currp variable. Caching this variable in a register greatly

+ *          improves both space and time OS efficiency. A side effect is that

+ *          one less register has to be saved during the context switch

+ *          resulting in lower RAM usage and faster context switch.

+ *

+ * @note This option is only usable with the GCC compiler and is only useful

+ *       on processors with many registers like ARM cores.

+ * @note If this option is enabled then ALL the libraries linked to the

+ *       ChibiOS/RT code <b>must</b> be recompiled with the GCC option @p

+ *       -ffixed-@<reg@>.

+ * @note This option must be enabled in the Makefile, it is listed here for

+ *       documentation only.

+ */

+#if defined(__DOXYGEN__)

+#define CH_CURRP_REGISTER_CACHE         "reg"

+#endif

+

+/*===========================================================================*/

+/* Subsystem options.                                                        */

+/*===========================================================================*/

+

+/**

+ * @brief Threads synchronization APIs.

+ * @details If enabled then the @p chThdWait() function is included in

+ *          the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)

+#define CH_USE_WAITEXIT                 TRUE

+#endif

+

+/**

+ * @brief Semaphores APIs.

+ * @details If enabled then the Semaphores APIs are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)

+#define CH_USE_SEMAPHORES               TRUE

+#endif

+

+/**

+ * @brief Semaphores queuing mode.

+ * @details If enabled then the threads are enqueued on semaphores by

+ *          priority rather than in FIFO order.

+ *

+ * @note The default is @p FALSE. Enable this if you have special requirements.

+ * @note Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_USE_SEMAPHORES_PRIORITY      FALSE

+#endif

+

+/**

+ * @brief Atomic semaphore API.

+ * @details If enabled then the semaphores the @p chSemWaitSignal() API

+ *          is included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)

+#define CH_USE_SEMSW                    TRUE

+#endif

+

+/**

+ * @brief Mutexes APIs.

+ * @details If enabled then the mutexes APIs are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)

+#define CH_USE_MUTEXES                  TRUE

+#endif

+

+/**

+ * @brief Conditional Variables APIs.

+ * @details If enabled then the conditional variables APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_MUTEXES.

+ */

+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)

+#define CH_USE_CONDVARS                 TRUE

+#endif

+

+/**

+ * @brief Conditional Variables APIs with timeout.

+ * @details If enabled then the conditional variables APIs with timeout

+ *          specification are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_CONDVARS.

+ */

+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_USE_CONDVARS_TIMEOUT         TRUE

+#endif

+

+/**

+ * @brief Events Flags APIs.

+ * @details If enabled then the event flags APIs are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)

+#define CH_USE_EVENTS                   TRUE

+#endif

+

+/**

+ * @brief Events Flags APIs with timeout.

+ * @details If enabled then the events APIs with timeout specification

+ *          are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_EVENTS.

+ */

+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)

+#define CH_USE_EVENTS_TIMEOUT           TRUE

+#endif

+

+/**

+ * @brief Synchronous Messages APIs.

+ * @details If enabled then the synchronous messages APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)

+#define CH_USE_MESSAGES                 TRUE

+#endif

+

+/**

+ * @brief Synchronous Messages queuing mode.

+ * @details If enabled then messages are served by priority rather than in

+ *          FIFO order.

+ *

+ * @note The default is @p FALSE. Enable this if you have special requirements.

+ * @note Requires @p CH_USE_MESSAGES.

+ */

+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)

+#define CH_USE_MESSAGES_PRIORITY        FALSE

+#endif

+

+/**

+ * @brief Mailboxes APIs.

+ * @details If enabled then the asynchronous messages (mailboxes) APIs are

+ *          included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)

+#define CH_USE_MAILBOXES                TRUE

+#endif

+

+/**

+ * @brief I/O Queues APIs.

+ * @details If enabled then the I/O queues APIs are included in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_SEMAPHORES.

+ */

+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)

+#define CH_USE_QUEUES                   TRUE

+#endif

+

+/**

+ * @brief Core Memory Manager APIs.

+ * @details If enabled then the core memory manager APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)

+#define CH_USE_MEMCORE                  TRUE

+#endif

+

+/**

+ * @brief Heap Allocator APIs.

+ * @details If enabled then the memory heap allocator APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or

+ *       @p CH_USE_SEMAPHORES.

+ * @note Mutexes are recommended.

+ */

+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)

+#define CH_USE_HEAP                     TRUE

+#endif

+

+/**

+ * @brief C-runtime allocator.

+ * @details If enabled the the heap allocator APIs just wrap the C-runtime

+ *          @p malloc() and @p free() functions.

+ *

+ * @note The default is @p FALSE.

+ * @note Requires @p CH_USE_HEAP.

+ * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the

+ *       appropriate documentation.

+ */

+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)

+#define CH_USE_MALLOC_HEAP              FALSE

+#endif

+

+/**

+ * @brief Memory Pools Allocator APIs.

+ * @details If enabled then the memory pools allocator APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ */

+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)

+#define CH_USE_MEMPOOLS                 TRUE

+#endif

+

+/**

+ * @brief Dynamic Threads APIs.

+ * @details If enabled then the dynamic threads creation APIs are included

+ *          in the kernel.

+ *

+ * @note The default is @p TRUE.

+ * @note Requires @p CH_USE_WAITEXIT.

+ */

+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)

+#define CH_USE_DYNAMIC                  TRUE

+#endif

+

+/*===========================================================================*/

+/* Debug options.                                                            */

+/*===========================================================================*/

+

+/**

+ * @brief Debug option, parameters checks.

+ * @details If enabled then the checks on the API functions input

+ *          parameters are activated.

+ *

+ * @note The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_CHECKS            FALSE

+#endif

+

+/**

+ * @brief Debug option, consistency checks.

+ * @details If enabled then all the assertions in the kernel code are

+ *          activated. This includes consistency checks inside the kernel,

+ *          runtime anomalies and port-defined checks.

+ *

+ * @note The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_ASSERTS           FALSE

+#endif

+

+/**

+ * @brief Debug option, trace buffer.

+ * @details If enabled then the context switch circular trace buffer is

+ *          activated.

+ *

+ * @note The default is @p FALSE.

+ */

+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_TRACE             FALSE

+#endif

+

+/**

+ * @brief Debug option, stack checks.

+ * @details If enabled then a runtime stack check is performed.

+ *

+ * @note The default is @p FALSE.

+ * @note The stack check is performed in a architecture/port dependent way. It

+ *       may not be implemented or some ports.

+ */

+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)

+#define CH_DBG_ENABLE_STACK_CHECK       FALSE

+#endif

+

+/**

+ * @brief Debug option, stacks initialization.

+ * @details If enabled then the threads working area is filled with a byte

+ *          value when a thread is created. This can be useful for the

+ *          runtime measurement of the used stack.
+ *

+ * @note The default is @p FALSE.

+ */

+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)

+#define CH_DBG_FILL_THREADS             FALSE

+#endif

+

+/**

+ * @brief Debug option, threads profiling.

+ * @details If enabled then a field is added to the @p Thread structure that

+ *          counts the system ticks occurred while executing the thread.

+ *

+ * @note The default is @p TRUE.

+ * @note This debug option is defaulted to TRUE because it is required by

+ *       some test cases into the test suite.

+ */

+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)

+#define CH_DBG_THREADS_PROFILING        TRUE

+#endif

+

+/*===========================================================================*/

+/* Kernel hooks.                                                             */

+/*===========================================================================*/

+

+/**

+ * @brief Threads descriptor structure hook.

+ * @details User fields added to the end of the @p Thread structure.

+ */

+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)

+#define THREAD_EXT_FIELDS                                               \

+struct {                                                                \

+  /* Add threads custom fields here.*/                                  \

+};

+#endif

+

+/**

+ * @brief Threads initialization hook.

+ * @details User initialization code added to the @p chThdInit() API.

+ *

+ * @note It is invoked from within @p chThdInit() and implicitily from all

+ *       the threads creation APIs.

+ */

+#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__)

+#define THREAD_EXT_INIT(tp) {                                           \

+  /* Add threads initialization code here.*/                            \

+}

+#endif

+

+/**

+ * @brief Threads finalization hook.

+ * @details User finalization code added to the @p chThdExit() API.

+ *

+ * @note It is inserted into lock zone.

+ * @note It is also invoked when the threads simply return in order to

+ *       terminate.

+ */

+#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__)

+#define THREAD_EXT_EXIT(tp) {                                           \

+  /* Add threads finalization code here.*/                              \

+}

+#endif

+

+/**

+ * @brief Idle Loop hook.

+ * @details This hook is continuously invoked by the idle thread loop.

+ */

+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)

+#define IDLE_LOOP_HOOK() {                                              \

+  /* Idle loop code here.*/                                             \

+}

+#endif

+

+#endif  /* _CHCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h
new file mode 100644
index 000000000..b04ce9baf
--- /dev/null
+++ b/testhal/STM32/halconf.h
@@ -0,0 +1,96 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+/**

+ * @file templates/halconf.h

+ * @brief HAL configuration header.

+ * @addtogroup HAL_CONF

+ * @{

+ */

+

+/*

+ * HAL configuration file, this file allows to enable or disable the various

+ * device drivers from your application. You may also use this file in order

+ * to change the device drivers settings found in the low level drivers

+ * headers, just define here the new settings and those will override the

+ * defaults defined in the LLD headers.

+ */

+

+#ifndef _HALCONF_H_

+#define _HALCONF_H_

+

+/**

+ * @brief Enables the PAL subsystem.

+ */

+#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__)

+#define CH_HAL_USE_PAL                  TRUE

+#endif

+

+/**

+ * @brief Enables the ADC subsystem.

+ */

+#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__)

+#define CH_HAL_USE_ADC                  TRUE

+#endif

+

+/**

+ * @brief Enables the CAN subsystem.

+ */

+#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__)

+#define CH_HAL_USE_CAN                  TRUE

+#endif

+

+/**

+ * @brief Enables the MAC subsystem.

+ */

+#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__)

+#define CH_HAL_USE_MAC                  FALSE

+#endif

+

+/**

+ * @brief Enables the PWM subsystem.

+ */

+#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__)

+#define CH_HAL_USE_PWM                  TRUE

+#endif

+

+/**

+ * @brief Enables the SERIAL subsystem.

+ */

+#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__)

+#define CH_HAL_USE_SERIAL               TRUE

+#endif

+

+/**

+ * @brief Enables the SPI subsystem.

+ */

+#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__)

+#define CH_HAL_USE_SPI                  TRUE

+#endif

+

+/**

+ * @brief Enables the MMC_SPI subsystem.

+ */

+#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

+#define CH_HAL_USE_MMC_SPI              TRUE

+#endif

+

+#endif /* _HALCONF_H_ */

+

+/** @} */

diff --git a/testhal/STM32/main.c b/testhal/STM32/main.c
new file mode 100644
index 000000000..d566c7546
--- /dev/null
+++ b/testhal/STM32/main.c
@@ -0,0 +1,220 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+#include <stdio.h>

+

+#include "ch.h"

+#include "hal.h"

+#include "test.h"

+#include "settings.h"

+

+/*

+ * LED blinker thread, times are in milliseconds.

+ */

+static WORKING_AREA(blinker_wa, 128);

+static msg_t blinker_thread(void *p) {

+

+  (void)p;

+  while (TRUE) {

+    palClearPad(IOPORT3, GPIOC_LED);

+    chThdSleepMilliseconds(500);

+    palSetPad(IOPORT3, GPIOC_LED);

+    chThdSleepMilliseconds(500);

+  }

+  return 0;

+}

+

+#if CH_HAL_USE_ADC

+static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];

+static Thread *adctp;

+

+/*

+ * ADC continuous conversion thread.

+ */

+size_t nx = 0, ny = 0;

+static void adccallback(adcsample_t *buffer, size_t n) {

+

+  if (samples == buffer) {

+    nx += n;

+  }

+  else {

+    ny += n;

+  }

+}

+

+static WORKING_AREA(adc_continuous_wa, 256);

+static msg_t adc_continuous_thread(void *p){

+

+  (void)p;

+  palSetGroupMode(IOPORT3,

+                  PAL_PORT_BIT(0) | PAL_PORT_BIT(1),

+                  PAL_MODE_INPUT_ANALOG);

+  adcStart(&ADCD1, &adccfg);

+  adcStartConversion(&ADCD1, &adcgrpcfg, samples,

+                     ADC_GRP1_BUF_DEPTH, adccallback);

+  adcWaitConversion(&ADCD1, TIME_INFINITE);

+  adcStop(&ADCD1);

+  return 0;

+}

+#endif /* CH_HAL_USE_ADC */

+

+#if CH_HAL_USE_CAN

+static Thread *canrtp;

+static Thread *canttp;

+

+static WORKING_AREA(can_rx_wa, 256);

+static msg_t can_rx(void *p) {

+  EventListener el;

+  CANRxFrame rxmsg;

+

+  (void)p;

+  chEvtRegister(&CAND1.cd_rxfull_event, &el, 0);

+  while(!chThdShouldTerminate()) {

+    if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0)

+      continue;

+    while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) {

+      /* Process message.*/

+      palTogglePad(IOPORT3, GPIOC_LED);

+    }

+  }

+  chEvtUnregister(&CAND1.cd_rxfull_event, &el);

+  return 0;

+}

+

+static WORKING_AREA(can_tx_wa, 256);

+static msg_t can_tx(void * p) {

+  CANTxFrame txmsg;

+

+  (void)p;

+  txmsg.cf_IDE = CAN_IDE_EXT;

+  txmsg.cf_EID = 0x01234567;

+  txmsg.cf_RTR = CAN_RTR_DATA;

+  txmsg.cf_DLC = 8;

+  txmsg.cf_data32[0] = 0x55AA55AA;

+  txmsg.cf_data32[1] = 0x00FF00FF;

+

+  while (!chThdShouldTerminate()) {

+    canTransmit(&CAND1, &txmsg, MS2ST(100));

+/*    chThdSleepMilliseconds(5);*/

+  }

+  return 0;

+}

+#endif /* CH_HAL_USE_CAN */

+

+#if CH_HAL_USE_SPI

+static uint8_t txbuf[512];

+static uint8_t rxbuf[512];

+static Thread *spitp;

+

+/*

+ * Maximum speed SPI continuous loopback thread.
+ */

+static WORKING_AREA(spi_loopback_wa, 256);

+static msg_t spi_loopback_thread(void *p){

+

+  (void)p;

+  palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL);

+  palSetPad(IOPORT1, GPIOA_SPI1NSS);

+  spiStart(&SPID1, &spicfg);

+  while (!chThdShouldTerminate()) {

+    spiSelect(&SPID1);

+    spiExchange(&SPID1, 512, txbuf, rxbuf);

+    spiUnselect(&SPID1);

+  }

+  spiStop(&SPID1);

+  return 0;

+}

+#endif /* CH_HAL_USE_SPI */

+

+/*

+ * Entry point, note, the main() function is already a thread in the system

+ * on entry.

+ */

+int main(int argc, char **argv) {

+   unsigned i;

+

+  (void)argc;

+  (void)argv;

+  (void)i;

+

+  /*

+   * Activates the serial driver 2 using the driver default configuration.

+   */

+  sdStart(&SD2, NULL);

+

+  /*

+   * Creates the blinker thread.

+   */

+  chThdCreateStatic(blinker_wa, sizeof(blinker_wa),

+                    NORMALPRIO + 10, blinker_thread, NULL);

+

+#if CH_HAL_USE_ADC

+  /*

+   * Creates the ADC continuous conversion test thread.

+   */

+  adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa),

+                            NORMALPRIO + 9, adc_continuous_thread, NULL);

+#endif

+

+#if CH_HAL_USE_CAN

+  canStart(&CAND1, &cancfg);

+  canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa),

+                             NORMALPRIO + 7, can_rx, NULL);

+  canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa),

+                             NORMALPRIO + 7, can_tx, NULL);

+#endif

+

+#if CH_HAL_USE_SPI

+  /*

+   * Creates the SPI loopback test thread.

+   */

+  for (i = 0; i < sizeof(txbuf); i++)

+    txbuf[i] = (uint8_t)i;

+  spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa),

+                            NORMALPRIO + 8, spi_loopback_thread, NULL);

+#endif

+

+  /*

+   * Normal main() thread activity, in this demo it does nothing except

+   * sleeping in a loop and check the button state.

+   */

+  while (TRUE) {

+    if (palReadPad(IOPORT1, GPIOA_BUTTON)) {

+      TestThread(&SD2);

+#if CH_HAL_USE_ADC

+      adcStopConversion(&ADCD1);

+      chThdWait(adctp);

+#endif

+#if CH_HAL_USE_CAN

+      chThdTerminate(canttp);

+      chThdWait(canttp);

+      chThdTerminate(canrtp);

+      chThdWait(canrtp);

+#endif

+#if CH_HAL_USE_SPI

+      chThdTerminate(spitp);

+      chThdWait(spitp);

+#endif

+      TestThread(&SD2);

+      chThdSleepMilliseconds(500);

+      chSysHalt();

+    }

+    chThdSleepMilliseconds(500);

+  }

+  return 0;

+}

diff --git a/testhal/STM32/readme.txt b/testhal/STM32/readme.txt
new file mode 100644
index 000000000..5a31ecc17
--- /dev/null
+++ b/testhal/STM32/readme.txt
@@ -0,0 +1,30 @@
+*****************************************************************************

+** ChibiOS/RT port for ARM-Cortex-M3 STM32F103.                            **

+*****************************************************************************

+

+** TARGET **

+

+The demo will on an Olimex STM32-P103 board.

+

+** The Demo **

+

+The demo is a stress test for the STM32 I/O subsystem, simultaneous activity

+is performed on a SPI, an ADC, the CAN and a serial port all while executing

+the complex test suite.

+The demo is DMA and IRQ intensive so the debugging can be difficoult, so be

+warned if you see anomalies in your debugger.

+

+** Build Procedure **

+

+The demo has been tested by using the free Codesourcery GCC-based toolchain,

+YAGARTO and an experimental WinARM build including GCC 4.3.0.

+Just modify the TRGT line in the makefile in order to use different GCC ports.

+

+** Notes **

+

+Some files used by the demo are not part of ChibiOS/RT but are copyright of

+ST Microelectronics and are licensed under a different license.

+Also note that not all the files present in the ST library are distribited

+with ChibiOS/RT, you can find the whole library on the ST web site:

+

+                             http://www.st.com

diff --git a/testhal/STM32/settings.c b/testhal/STM32/settings.c
new file mode 100644
index 000000000..41bfda191
--- /dev/null
+++ b/testhal/STM32/settings.c
@@ -0,0 +1,75 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#include "ch.h"

+#include "hal.h"

+#include "settings.h"

+

+#if CH_HAL_USE_ADC

+/*

+ * ADC configuration.

+ */

+const ADCConfig adccfg = {};

+const ADCConversionGroup adcgrpcfg = {

+  TRUE,

+  ADC_GRP1_NUM_CHANNELS,

+  0,

+  ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT,

+  0,

+  0,

+  ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS),

+  ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT),

+  ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) |

+  ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) |

+  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11)   | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10)

+};

+#endif

+

+#if CH_HAL_USE_CAN

+

+#define CAN_BTR_PRESCALER(n)        (n)

+#undef CAN_BTR_TS1

+#define  CAN_BTR_TS1(n)             ((n) << 16)

+#undef CAN_BTR_TS2

+#define  CAN_BTR_TS2(n)             ((n) << 20)

+#undef CAN_BTR_SJW

+#define CAN_BTR_SJW(n)              ((n) << 24)

+

+/*

+ * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover

+ * from abort mode.

+ * See section 22.7.7 on the STM32 reference manual.
+ */

+const CANConfig cancfg = {

+  CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,

+  CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) |

+  CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6),

+  0,

+  NULL

+};

+#endif /* CH_HAL_USE_CAN */

+

+#if CH_HAL_USE_SPI

+/*

+ * SPI configuration, maximum speed.

+ */

+const SPIConfig spicfg = {

+  IOPORT1, GPIOA_SPI1NSS, 0

+};

+#endif

diff --git a/testhal/STM32/settings.h b/testhal/STM32/settings.h
new file mode 100644
index 000000000..14981eae4
--- /dev/null
+++ b/testhal/STM32/settings.h
@@ -0,0 +1,34 @@
+/*

+    ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+

+#if CH_HAL_USE_ADC

+#define ADC_GRP1_NUM_CHANNELS   8

+#define ADC_GRP1_BUF_DEPTH      16

+

+extern const ADCConfig adccfg;

+extern const ADCConversionGroup adcgrpcfg;

+#endif

+

+#if CH_HAL_USE_CAN

+extern const CANConfig cancfg;

+#endif /* CH_HAL_USE_CAN */

+

+#if CH_HAL_USE_SPI

+extern const SPIConfig spicfg;

+#endif