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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-01 14:53:01 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-08-01 14:53:01 +0000 |
| commit | 3bae1b202a8c631b1f04fe4e997ab1ea66a2e4a0 (patch) | |
| tree | 6d4b203804fe976bbb869709992534b6e013fb43 | |
| parent | 6acc48bc50785ef5d8eaf2fdf11ac229489edad9 (diff) | |
| download | ChibiOS-3bae1b202a8c631b1f04fe4e997ab1ea66a2e4a0.tar.gz ChibiOS-3bae1b202a8c631b1f04fe4e997ab1ea66a2e4a0.tar.bz2 ChibiOS-3bae1b202a8c631b1f04fe4e997ab1ea66a2e4a0.zip | |
Fixed bug #422.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6061 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/platforms/STM32L1xx/hal_lld.h | 8 | ||||
| -rw-r--r-- | os/hal/platforms/STM32L1xx/stm32_rcc.h | 59 | ||||
| -rw-r--r-- | readme.txt | 2 |
3 files changed, 63 insertions, 6 deletions
diff --git a/os/hal/platforms/STM32L1xx/hal_lld.h b/os/hal/platforms/STM32L1xx/hal_lld.h index d4e6daa8b..3e8692e93 100644 --- a/os/hal/platforms/STM32L1xx/hal_lld.h +++ b/os/hal/platforms/STM32L1xx/hal_lld.h @@ -956,13 +956,13 @@ * @brief RTC/LCD clock.
*/
#if (STM32_RTCSEL == STM32_RTCSEL_NOCLOCK) || defined(__DOXYGEN__)
-#define STM_RTCCLK 0
+#define STM32_RTCCLK 0
#elif STM32_RTCSEL == STM32_RTCSEL_LSE
-#define STM_RTCCLK STM32_LSECLK
+#define STM32_RTCCLK STM32_LSECLK
#elif STM32_RTCSEL == STM32_RTCSEL_LSI
-#define STM_RTCCLK STM32_LSICLK
+#define STM32_RTCCLK STM32_LSICLK
#elif STM32_RTCSEL == STM32_RTCSEL_HSEDIV
-#define STM_RTCCLK STM32_HSEDIVCLK
+#define STM32_RTCCLK STM32_HSEDIVCLK
#else
#error "invalid STM32_RTCSEL value specified"
#endif
diff --git a/os/hal/platforms/STM32L1xx/stm32_rcc.h b/os/hal/platforms/STM32L1xx/stm32_rcc.h index 5340b9e15..90cbd8fbe 100644 --- a/os/hal/platforms/STM32L1xx/stm32_rcc.h +++ b/os/hal/platforms/STM32L1xx/stm32_rcc.h @@ -454,7 +454,7 @@ #define rccResetTIM4() rccResetAPB1(RCC_APB1RSTR_TIM4RST)
/**
- * @brief Enables the TIM89peripheral clock.
+ * @brief Enables the TIM9 peripheral clock.
* @note The @p lp parameter is ignored in this family.
*
* @param[in] lp low power enable flag
@@ -474,11 +474,66 @@ #define rccDisableTIM9(lp) rccDisableAPB2(RCC_APB2ENR_TIM9EN, lp)
/**
- * @brief Resets the TIM8 peripheral.
+ * @brief Resets the TIM9 peripheral.
*
* @api
*/
#define rccResetTIM9() rccResetAPB2(RCC_APB2RSTR_TIM9RST)
+
+/**
+ * @brief Enables the TIM10 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableTIM10(lp) rccEnableAPB2(RCC_APB2ENR_TIM10EN, lp)
+
+/**
+ * @brief Disables the TIM10 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableTIM10(lp) rccDisableAPB2(RCC_APB2ENR_TIM10EN, lp)
+
+/**
+ * @brief Resets the TIM10 peripheral.
+ *
+ * @api
+ */
+#define rccResetTIM10() rccResetAPB2(RCC_APB2RSTR_TIM10RST)
+
+/**
+ * @brief Enables the TIM10 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccEnableTIM11(lp) rccEnableAPB2(RCC_APB2ENR_TIM11EN, lp)
+
+/**
+ * @brief Disables the TIM11 peripheral clock.
+ * @note The @p lp parameter is ignored in this family.
+ *
+ * @param[in] lp low power enable flag
+ *
+ * @api
+ */
+#define rccDisableTIM11(lp) rccDisableAPB2(RCC_APB2ENR_TIM11EN, lp)
+
+/**
+ * @brief Resets the TIM11 peripheral.
+ *
+ * @api
+ */
+#define rccResetTIM11() rccResetAPB2(RCC_APB2RSTR_TIM11RST)
+
/** @} */
/**
diff --git a/readme.txt b/readme.txt index 84bad8ccb..3f4f88620 100644 --- a/readme.txt +++ b/readme.txt @@ -89,6 +89,8 @@ *****************************************************************************
*** 2.7.0 ***
+- FIX: Fixed wrong RTC macro names in STM32L1xx HAL (bug #422)(backported to
+ 2.6.1 and 2.4.5).
- FIX: Fixed FSMC reset on STM32F4xx (bug #420)(backported to 2.6.1
and 2.4.4).
- FIX: Fixed invalid directory links in the demo files (bug #419)(backported
|