aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-01-02 14:43:15 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2014-01-02 14:43:15 +0000
commit013c01cc71fa2f669b537d86a1c657d0ac86b698 (patch)
tree3e916f03ecd0ecce8272232031a41d3e3ed9a47c
parent66be672e0799a08cfc26784fd3f503e05d699b41 (diff)
downloadChibiOS-013c01cc71fa2f669b537d86a1c657d0ac86b698.tar.gz
ChibiOS-013c01cc71fa2f669b537d86a1c657d0ac86b698.tar.bz2
ChibiOS-013c01cc71fa2f669b537d86a1c657d0ac86b698.zip
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6600 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r--boards/ST_STM32F0_DISCOVERY/board.c1
-rw-r--r--boards/ST_STM32F0_DISCOVERY/board.h2
-rw-r--r--boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg1
3 files changed, 2 insertions, 2 deletions
diff --git a/boards/ST_STM32F0_DISCOVERY/board.c b/boards/ST_STM32F0_DISCOVERY/board.c
index 0393835ad..7f28873cd 100644
--- a/boards/ST_STM32F0_DISCOVERY/board.c
+++ b/boards/ST_STM32F0_DISCOVERY/board.c
@@ -14,7 +14,6 @@
limitations under the License.
*/
-#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
diff --git a/boards/ST_STM32F0_DISCOVERY/board.h b/boards/ST_STM32F0_DISCOVERY/board.h
index be690cc6a..578aa49b7 100644
--- a/boards/ST_STM32F0_DISCOVERY/board.h
+++ b/boards/ST_STM32F0_DISCOVERY/board.h
@@ -45,7 +45,7 @@
#define STM32_HSE_BYPASS
/*
- * MCU type as defined in the ST header file stm32f0xx.h.
+ * MCU type as defined in the ST header.
*/
#define STM32F0XX_MD
diff --git a/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg b/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg
index 3773f03d1..ec85130c7 100644
--- a/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg
+++ b/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg
@@ -10,6 +10,7 @@
<board_name>ST STM32F0-Discovery</board_name>
<board_id>ST_STM32F0_DISCOVERY</board_id>
<board_functions></board_functions>
+ <subtype>STM32F0XX_MD</subtype>
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>