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author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-02 12:06:56 +0000 |
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committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-10-02 12:06:56 +0000 |
commit | 00735a2a0132f9981279d5c46855280f0314c6db (patch) | |
tree | bd067dbdfad64059c8485c7cb4e7fb584a26b563 | |
parent | 130db5dfc52d776df1a43a592fca2ef81d08e70a (diff) | |
download | ChibiOS-00735a2a0132f9981279d5c46855280f0314c6db.tar.gz ChibiOS-00735a2a0132f9981279d5c46855280f0314c6db.tar.bz2 ChibiOS-00735a2a0132f9981279d5c46855280f0314c6db.zip |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7348 35acf78f-673a-0410-8e92-d51de3d6d3f4
-rw-r--r-- | os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c | 10 | ||||
-rw-r--r-- | os/hal/ports/STM32/STM32F0xx/stm32_registry.h | 14 |
2 files changed, 16 insertions, 8 deletions
diff --git a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c index 3e83cc2b3..49f9a7d3d 100644 --- a/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c +++ b/os/hal/ports/STM32/LLD/GPIOv2/pal_lld.c @@ -36,14 +36,8 @@ RCC_AHBENR_GPIOEEN | RCC_AHBENR_GPIOHEN)
#define AHB_LPEN_MASK AHB_EN_MASK
-#elif defined(STM32F030) || defined(STM32F0XX_MD)
-#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
- RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIODEN | \
- RCC_AHBENR_GPIOFEN)
-
-#elif defined(STM32F0XX_LD)
-#define AHB_EN_MASK (RCC_AHBENR_GPIOAEN | RCC_AHBENR_GPIOBEN | \
- RCC_AHBENR_GPIOCEN | RCC_AHBENR_GPIOFEN)
+#elif defined(STM32F0XX)
+#define AHB_EN_MASK STM32_GPIO_EN_MASK
#elif defined(STM32F3XX) || defined(STM32F37X)
#define AHB_EN_MASK STM32_GPIO_EN_MASK
diff --git a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h index 138745f16..590ed02b4 100644 --- a/os/hal/ports/STM32/STM32F0xx/stm32_registry.h +++ b/os/hal/ports/STM32/STM32F0xx/stm32_registry.h @@ -89,6 +89,11 @@ #define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
+ RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | \
+ RCC_AHBENR_GPIODEN | \
+ RCC_AHBENR_GPIOFEN)
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -227,6 +232,10 @@ #define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
+ RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | \
+ RCC_AHBENR_GPIOFEN)
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
@@ -350,6 +359,11 @@ #define STM32_HAS_GPIOG FALSE
#define STM32_HAS_GPIOH FALSE
#define STM32_HAS_GPIOI FALSE
+#define STM32_GPIO_EN_MASK (RCC_AHBENR_GPIOAEN | \
+ RCC_AHBENR_GPIOBEN | \
+ RCC_AHBENR_GPIOCEN | \
+ RCC_AHBENR_GPIODEN | \
+ RCC_AHBENR_GPIOFEN)
/* I2C attributes.*/
#define STM32_HAS_I2C1 TRUE
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