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-rw-r--r--os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c37
-rw-r--r--os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h71
2 files changed, 85 insertions, 23 deletions
diff --git a/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c b/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c
index a54290e..a768897 100644
--- a/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c
+++ b/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c
@@ -35,11 +35,15 @@
/*===========================================================================*/
#ifndef COMP_CSR_EN
-#define COMP_CSR_EN COMP_CSR_COMPxEN
+ #define COMP_CSR_EN COMP_CSR_COMPxEN
#endif
#ifndef COMP_CSR_POLARITY
-#define COMP_CSR_POLARITY COMP_CSR_COMPxPOL
+ #ifdef COMP_CSR_COMPxPOL
+ #define COMP_CSR_POLARITY COMP_CSR_COMPxPOL
+ #else
+ #define COMP_CSR_POLARITY COMP_CSR_COMPxPOLARITY // L0
+ #endif
#endif
/*===========================================================================*/
@@ -133,7 +137,7 @@ void comp_lld_init(void) {
COMPD1.reg = COMP1;
COMPD1.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP1_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
#endif
#endif
@@ -143,7 +147,7 @@ void comp_lld_init(void) {
COMPD2.reg = COMP2;
COMPD2.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP2_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
#endif
#endif
@@ -153,7 +157,7 @@ void comp_lld_init(void) {
COMPD3.reg = COMP3;
COMPD3.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
#endif
#endif
@@ -163,7 +167,7 @@ void comp_lld_init(void) {
COMPD4.reg = COMP4;
COMPD4.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP4_IRQn, STM32_COMP_4_5_6_IRQ_PRIORITY);
#endif
#endif
@@ -173,7 +177,7 @@ void comp_lld_init(void) {
COMPD5.reg = COMP5;
COMPD5.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP5_IRQn, STM32_COMP_4_5_6_IRQ_PRIORITY);
#endif
#endif
@@ -183,7 +187,7 @@ void comp_lld_init(void) {
COMPD6.reg = COMP6;
COMPD6.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP6_IRQn, STM32_COMP_4_5_6_IRQ_PRIORITY);
#endif
#endif
@@ -193,7 +197,7 @@ void comp_lld_init(void) {
COMPD7.reg = COMP7;
COMPD7.reg->CSR = 0;
#if STM32_COMP_USE_INTERRUPTS
- nvicEnableVector(COMP7_IRQn, STM32_COMP_7_IRQ_PRIORITY);
+ nvicEnableVector(STM32_COMP7_IRQn, STM32_COMP_7_IRQ_PRIORITY);
#endif
#endif
@@ -201,12 +205,13 @@ void comp_lld_init(void) {
#if STM32_COMP_USE_INTERRUPTS
+#if STM32_COMP_USE_COMP1 || STM32_COMP_USE_COMP2 || STM32_COMP_USE_COMP3
/**
* @brief COMP1, COMP2, COMP3 interrupt handler.
*
* @isr
*/
-OSAL_IRQ_HANDLER(Vector140) {
+OSAL_IRQ_HANDLER(COMP1_2_3_IRQHandler) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
@@ -229,13 +234,15 @@ OSAL_IRQ_HANDLER(Vector140) {
OSAL_IRQ_EPILOGUE();
}
+#endif
+#if STM32_COMP_USE_COMP4 || STM32_COMP_USE_COMP5 || STM32_COMP_USE_COMP6
/**
* @brief COMP4, COMP5, COMP6 interrupt handler.
*
* @isr
*/
-OSAL_IRQ_HANDLER(Vector144) {
+OSAL_IRQ_HANDLER(COMP4_5_6_IRQHandler) {
uint32_t pr;
OSAL_IRQ_PROLOGUE();
@@ -261,13 +268,15 @@ OSAL_IRQ_HANDLER(Vector144) {
OSAL_IRQ_EPILOGUE();
}
+#endif
+#if STM32_COMP_USE_COMP7
/**
* @brief COMP7 interrupt handler.
*
* @isr
*/
-OSAL_IRQ_HANDLER(Vector148) {
+OSAL_IRQ_HANDLER(COMP7_IRQHandler) {
uint32_t pr2;
OSAL_IRQ_PROLOGUE();
@@ -275,13 +284,13 @@ OSAL_IRQ_HANDLER(Vector148) {
pr2 = EXTI->PR2;
pr2 = EXTI->IMR & (1U << 1);
EXTI->PR2 = pr2;
-#if STM32_COMP_USE_COMP7
+
if (pr2 & (1U << 1) && COMPD7.config->cb != NULL)
COMPD7.config->cb(&COMPD7);
-#endif
OSAL_IRQ_EPILOGUE();
}
+#endif
/**
* @brief Configures and activates an EXT channel (used by comp)
diff --git a/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h b/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h
index e3cae4e..6a241bd 100644
--- a/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h
+++ b/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.h
@@ -57,12 +57,14 @@
PB0 for COMP4, PD12 for COMP5, PD11 for COMP6,
PA0 for COMP7) connected to comparator non inverting input */
+#ifdef COMP_CSR_COMPxNONINSEL
#define STM32_COMP_NonInvertingInput_IO2 COMP_CSR_COMPxNONINSEL /*!< I/O2 (PA3 for COMP2, PD14 for COMP3, PE7 for COMP4, PB13 for COMP5,
PB11 for COMP6, PC1 for COMP7) connected to comparator non inverting input */
-
+#endif
#define STM32_COMP_Output_None ((uint32_t)0x00000000) /*!< COMP output isn't connected to other peripherals */
+
/* Output Redirection common for all comparators COMP1...COMP7 */
#define STM32_COMP_Output_TIM1BKIN COMP_CSR_COMPxOUTSEL_0 /*!< COMP output connected to TIM1 Break Input (BKIN) */
#define STM32_COMP_Output_TIM1BKIN2 ((uint32_t)0x00000800) /*!< COMP output connected to TIM1 Break Input 2 (BKIN2) */
@@ -155,10 +157,12 @@
#define STM32_COMP_OutputPol_NonInverted ((uint32_t)0x00000000) /*!< COMP output on GPIO isn't inverted */
#define STM32_COMP_OutputPol_Inverted COMP_CSR_COMPxPOL /*!< COMP output on GPIO is inverted */
+#ifdef COMP_CSR_COMPxHYST
#define STM32_COMP_Hysteresis_No 0x00000000 /*!< No hysteresis */
#define STM32_COMP_Hysteresis_Low COMP_CSR_COMPxHYST_0 /*!< Hysteresis level low */
#define STM32_COMP_Hysteresis_Medium COMP_CSR_COMPxHYST_1 /*!< Hysteresis level medium */
#define STM32_COMP_Hysteresis_High COMP_CSR_COMPxHYST /*!< Hysteresis level high */
+#endif
#define STM32_COMP_Mode_HighSpeed 0x00000000 /*!< High Speed */
#define STM32_COMP_Mode_MediumSpeed COMP_CSR_COMPxMODE_0 /*!< Medium Speed */
@@ -172,9 +176,8 @@
the non-inverting input is at a lower voltage than the inverting input*/
#define STM32_COMP_OutputLevel_Low ((uint32_t)0x00000000)
-
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F303x8) \
-|| defined(STM32F318xx) || defined(STM32F328xx) || defined(STM32F334x8)
+ || defined(STM32F318xx) || defined(STM32F328xx) || defined(STM32F334x8)
#define STM32_HAS_COMP1 FALSE
#define STM32_HAS_COMP2 TRUE
#define STM32_HAS_COMP3 FALSE
@@ -183,6 +186,13 @@
#define STM32_HAS_COMP6 TRUE
#define STM32_HAS_COMP7 FALSE
+#define STM32_COMP2_IRQn COMP1_2_3_IRQn
+#define STM32_COMP4_IRQn COMP4_5_6_IRQn
+#define STM32_COMP6_IRQn COMP4_5_6_IRQn
+#define STM32_COMP2_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP4_HANDLER COMP4_5_6_IRQHandler
+#define STM32_COMP6_HANDLER COMP4_5_6_IRQHandler
+
#elif defined(STM32F302xc) || defined(STM32F302xe)
#define STM32_HAS_COMP1 TRUE
#define STM32_HAS_COMP2 TRUE
@@ -192,6 +202,15 @@
#define STM32_HAS_COMP6 TRUE
#define STM32_HAS_COMP7 FALSE
+#define STM32_COMP1_IRQn COMP1_2_3_IRQn
+#define STM32_COMP2_IRQn COMP1_2_3_IRQn
+#define STM32_COMP4_IRQn COMP4_5_6_IRQn
+#define STM32_COMP6_IRQn COMP4_5_6_IRQn
+#define STM32_COMP1_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP2_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP4_HANDLER COMP4_5_6_IRQHandler
+#define STM32_COMP6_HANDLER COMP4_5_6_IRQHandler
+
#elif defined(STM32F303xC) || defined(STM32F303xE) || defined(STM32F358xx) || defined(STM32F398xx)
#define STM32_HAS_COMP1 TRUE
#define STM32_HAS_COMP2 TRUE
@@ -201,9 +220,42 @@
#define STM32_HAS_COMP6 TRUE
#define STM32_HAS_COMP7 TRUE
-#elif defined(STM32F373xx) || defined(STM32F378xx) || defined(STM32L0XX) || defined(STM32L1XX) \
+#define STM32_COMP1_IRQn COMP1_2_3_IRQn
+#define STM32_COMP2_IRQn COMP1_2_3_IRQn
+#define STM32_COMP3_IRQn COMP1_2_3_IRQn
+#define STM32_COMP4_IRQn COMP4_5_6_IRQn
+#define STM32_COMP5_IRQn COMP4_5_6_IRQn
+#define STM32_COMP6_IRQn COMP4_5_6_IRQn
+#define STM32_COMP7_IRQn COMP7_IRQn
+#define STM32_COMP1_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP2_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP3_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP4_HANDLER COMP4_5_6_IRQHandler
+#define STM32_COMP5_HANDLER COMP4_5_6_IRQHandler
+#define STM32_COMP6_HANDLER COMP4_5_6_IRQHandler
+#define STM32_COMP7_HANDLER COMP7_IRQHandler
+
+#elif defined(STM32F373xx) || defined(STM32F378xx) || defined(STM32L1XX) || defined(STM32L4XX)
+#define STM32_HAS_COMP1 TRUE
+#define STM32_HAS_COMP2 TRUE
+#define STM32_HAS_COMP3 FALSE
+#define STM32_HAS_COMP4 FALSE
+#define STM32_HAS_COMP5 FALSE
+#define STM32_HAS_COMP6 FALSE
+#define STM32_HAS_COMP7 FALSE
+
+#define STM32_COMP1_IRQn COMP_IRQn
+#define STM32_COMP2_IRQn COMP_IRQn
+#define STM32_COMP1_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP2_HANDLER COMP1_2_3_IRQHandler
+
+#elif defined(STM32L011xx) || defined(STM32L021xx) || defined(STM32L031xx) \
+ || defined(STM32L041xx) || defined(STM32L051xx) || defined(STM32L052xx) || defined(STM32L053xx) \
+ || defined(STM32L062xx) || defined(STM32L063xx) || defined(STM32L071xx) || defined(STM32L072xx) \
+ || defined(STM32L073xx) || defined(STM32L081xx) || defined(STM32L082xx) || defined(STM32L083xx) \
|| defined(STM32F051x8) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F078xx) \
- || defined(STM32F072xb) || defined(STM32F071xb) || defined(STM32L4XX)
+ || defined(STM32F072xb) || defined(STM32F071xb)
+
#define STM32_HAS_COMP1 TRUE
#define STM32_HAS_COMP2 TRUE
#define STM32_HAS_COMP3 FALSE
@@ -212,6 +264,11 @@
#define STM32_HAS_COMP6 FALSE
#define STM32_HAS_COMP7 FALSE
+#define STM32_COMP1_IRQn ADC1_COMP_IRQn
+#define STM32_COMP2_IRQn ADC1_COMP_IRQn
+#define STM32_COMP1_HANDLER COMP1_2_3_IRQHandler
+#define STM32_COMP2_HANDLER COMP1_2_3_IRQHandler
+
#else
#define STM32_HAS_COMP1 FALSE
#define STM32_HAS_COMP2 FALSE
@@ -310,10 +367,6 @@
/* Derived constants and error checks. */
/*===========================================================================*/
-#if STM32_COMP_USE_INTERRUPTS && defined(STM32F0XX)
-#error "Interrupts are shared with EXTI on F0s (lines 21-22)"
-#endif
-
#if STM32_COMP_USE_INTERRUPTS
#if !defined(STM32_DISABLE_EXTI21_22_29_HANDLER) || !defined(STM32_DISABLE_EXTI30_32_HANDLER) || !defined(STM32_DISABLE_EXTI33_HANDLER)
#error "COMP needs these defines in mcuconf to use interrupts: STM32_DISABLE_EXTI21_22_29_HANDLER STM32_DISABLE_EXTI30_32_HANDLER STM32_DISABLE_EXTI33_HANDLER"
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 09:40:50 +0000