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authorflabbergast <s3+flabbergast@sdfeu.org>2016-03-22 18:44:41 +0000
committerflabbergast <s3+flabbergast@sdfeu.org>2016-03-22 18:44:41 +0000
commit82ada2bb218fe2481050e7021d0c17dbbb154a6b (patch)
tree1bdbe513eb54928e493617a292ffba1185e2522a /testhal/KINETIS
parent9f5d7fd40b63d3d55bff540a5d5e03ecd8257276 (diff)
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[KINETIS] Move I2C and ADC demo to proper subdir.
Diffstat (limited to 'testhal/KINETIS')
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/Makefile (renamed from testhal/KINETIS/I2C/Makefile)18
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h (renamed from testhal/KINETIS/I2C/chconf.h)33
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/halconf.h (renamed from testhal/KINETIS/I2C/halconf.h)0
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/main.c (renamed from testhal/KINETIS/I2C/main.c)0
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/mcuconf.h (renamed from testhal/KINETIS/ADC/mcuconf.h)56
-rw-r--r--testhal/KINETIS/FRDM-K20D50M/I2C/readme.txt (renamed from testhal/KINETIS/I2C/readme.txt)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/.cproject (renamed from testhal/KINETIS/ADC/.cproject)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/.project (renamed from testhal/KINETIS/ADC/.project)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/Makefile (renamed from testhal/KINETIS/ADC/Makefile)12
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h (renamed from testhal/KINETIS/ADC/chconf.h)33
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch (renamed from testhal/KINETIS/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/halconf.h (renamed from testhal/KINETIS/ADC/halconf.h)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/main.c (renamed from testhal/KINETIS/ADC/main.c)0
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/mcuconf.h (renamed from testhal/KINETIS/I2C/mcuconf.h)30
-rw-r--r--testhal/KINETIS/FRDM-KL25Z/ADC/readme.txt (renamed from testhal/KINETIS/ADC/readme.txt)0
15 files changed, 116 insertions, 66 deletions
diff --git a/testhal/KINETIS/I2C/Makefile b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile
index 9935923..3ee409d 100644
--- a/testhal/KINETIS/I2C/Makefile
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/Makefile
@@ -70,6 +70,11 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
USE_EXCEPTIONS_STACKSIZE = 0x400
endif
+# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+ifeq ($(USE_FPU),)
+ USE_FPU = no
+endif
+
#
# Architecture or project specific options
##############################################################################
@@ -82,14 +87,19 @@ endif
PROJECT = ch
# Imported source files and paths
-CHIBIOS = ../../..
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x.mk
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+# Startup files.
+include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_k20x5.mk
+# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/KINETIS/K20x/platform.mk
-include $(CHIBIOS)/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/K20x/platform.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/FREESCALE_FREEDOM_K20D50M/board.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
# Define linker script file here
LDSCRIPT= $(STARTUPLD)/MK20DX128.ld
diff --git a/testhal/KINETIS/I2C/chconf.h b/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h
index b7a340d..eecc0a6 100644
--- a/testhal/KINETIS/I2C/chconf.h
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/chconf.h
@@ -27,6 +27,8 @@
#ifndef _CHCONF_H_
#define _CHCONF_H_
+
+#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
@@ -263,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
@@ -443,6 +437,20 @@
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* Context switch code here.*/ \
}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
/**
* @brief Idle thread enter hook.
@@ -487,6 +495,15 @@
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
/** @} */
diff --git a/testhal/KINETIS/I2C/halconf.h b/testhal/KINETIS/FRDM-K20D50M/I2C/halconf.h
index 6430fb2..6430fb2 100644
--- a/testhal/KINETIS/I2C/halconf.h
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/halconf.h
diff --git a/testhal/KINETIS/I2C/main.c b/testhal/KINETIS/FRDM-K20D50M/I2C/main.c
index 8c0df50..8c0df50 100644
--- a/testhal/KINETIS/I2C/main.c
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/main.c
diff --git a/testhal/KINETIS/ADC/mcuconf.h b/testhal/KINETIS/FRDM-K20D50M/I2C/mcuconf.h
index 03a7de5..0b7c312 100644
--- a/testhal/KINETIS/ADC/mcuconf.h
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/mcuconf.h
@@ -17,21 +17,7 @@
#ifndef _MCUCONF_H_
#define _MCUCONF_H_
-/*
- * STM32F0xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 3...0 Lowest...Highest.
- *
- * DMA priorities:
- * 0...3 Lowest...Highest.
- */
-
-#define KL2x_MCUCONF
+#define K20x_MCUCONF
/*
* HAL driver system settings.
@@ -39,32 +25,51 @@
/* Select the MCU clocking mode below by enabling the appropriate block. */
-/* FEI mode */
+/* Enable clock initialization by HAL */
+#define KINETIS_NO_INIT FALSE
+
+/* PEE mode - external (8 MHz) crystal with PLL for 48 MHz core/system clock. */
+#if 1
+#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
+#define KINETIS_PLLCLK_FREQUENCY 96000000UL
+#define KINETIS_SYSCLK_FREQUENCY 48000000UL
+#endif
+
+/* FEI mode - 48 MHz with internal 32.768 kHz oscillator */
#if 0
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
-#define KINETIS_SYSCLK_FREQUENCY 21000000UL
+#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
+#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
+#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide MCGCLKOUT (~48MHz) by 1 to SYSCLK */
+#define KINETIS_CLKDIV1_OUTDIV2 1 /* Divide by 1 for (~48MHz) peripheral clock */
+#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide by 2 for (~24MHz) flash clock */
+#define KINETIS_BUSCLK_FREQUENCY KINETIS_SYSCLK_FREQUENCY
+#define KINETIS_FLASHCLK_FREQUENCY KINETIS_SYSCLK_FREQUENCY/2
#endif /* 0 */
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
+/* not implemented */
#if 0
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
-#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
-#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
+#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
-#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
+#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_CLKDIV1_OUTDIV4)
#endif /* 0 */
/* FEE mode - 48 MHz */
+/* not implemented */
#if 0
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
-#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
-#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
+#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
#endif /* 0 */
@@ -72,10 +77,7 @@
* SERIAL driver system settings.
*/
#define KINETIS_SERIAL_USE_UART0 FALSE
-
-/*
- * ADC driver system settings.
- */
-#define KINETIS_ADC_USE_ADC0 TRUE
+#define KINETIS_I2C_USE_I2C0 TRUE
+#define KINETIS_I2C_I2C0_PRIORITY 8
#endif /* _MCUCONF_H_ */
diff --git a/testhal/KINETIS/I2C/readme.txt b/testhal/KINETIS/FRDM-K20D50M/I2C/readme.txt
index 0a9a5fc..0a9a5fc 100644
--- a/testhal/KINETIS/I2C/readme.txt
+++ b/testhal/KINETIS/FRDM-K20D50M/I2C/readme.txt
diff --git a/testhal/KINETIS/ADC/.cproject b/testhal/KINETIS/FRDM-KL25Z/ADC/.cproject
index 4e28c4a..4e28c4a 100644
--- a/testhal/KINETIS/ADC/.cproject
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/.cproject
diff --git a/testhal/KINETIS/ADC/.project b/testhal/KINETIS/FRDM-KL25Z/ADC/.project
index 0bd79df..0bd79df 100644
--- a/testhal/KINETIS/ADC/.project
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/.project
diff --git a/testhal/KINETIS/ADC/Makefile b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile
index d438436..59476de 100644
--- a/testhal/KINETIS/ADC/Makefile
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/Makefile
@@ -81,17 +81,19 @@ endif
PROJECT = ch
# Imported source files and paths
-CHIBIOS = ../../..
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
+CHIBIOS = ../../../../../ChibiOS-RT
+CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
+
+include $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_kl2x.mk
include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/KINETIS/KL2x/platform.mk
-include $(CHIBIOS)/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk
+include $(CHIBIOS_CONTRIB)/os/hal/ports/KINETIS/KL2x/platform.mk
+include $(CHIBIOS_CONTRIB)/os/hal/boards/FREESCALE_FREEDOM_KL25Z/board.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
include $(CHIBIOS)/os/rt/rt.mk
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
# Define linker script file here
-LDSCRIPT= $(STARTUPLD)/KL25Z128.ld
+LDSCRIPT= $(STARTUPLD)/MKL2xZ128.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global
# setting.
diff --git a/testhal/KINETIS/ADC/chconf.h b/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h
index b7a340d..eecc0a6 100644
--- a/testhal/KINETIS/ADC/chconf.h
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/chconf.h
@@ -27,6 +27,8 @@
#ifndef _CHCONF_H_
#define _CHCONF_H_
+
+#define _CHIBIOS_RT_CONF_
/*===========================================================================*/
/**
@@ -263,14 +265,6 @@
#define CH_CFG_USE_MAILBOXES TRUE
/**
- * @brief I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES TRUE
-
-/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
@@ -443,6 +437,20 @@
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* Context switch code here.*/ \
}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
/**
* @brief Idle thread enter hook.
@@ -487,6 +495,15 @@
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \
}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
/** @} */
diff --git a/testhal/KINETIS/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch b/testhal/KINETIS/FRDM-KL25Z/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch
index 67d3e82..67d3e82 100644
--- a/testhal/KINETIS/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/debug/RT-FREEDOM-KL25Z-ADC.launch
diff --git a/testhal/KINETIS/ADC/halconf.h b/testhal/KINETIS/FRDM-KL25Z/ADC/halconf.h
index f8b4e8c..f8b4e8c 100644
--- a/testhal/KINETIS/ADC/halconf.h
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/halconf.h
diff --git a/testhal/KINETIS/ADC/main.c b/testhal/KINETIS/FRDM-KL25Z/ADC/main.c
index f01051b..f01051b 100644
--- a/testhal/KINETIS/ADC/main.c
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/main.c
diff --git a/testhal/KINETIS/I2C/mcuconf.h b/testhal/KINETIS/FRDM-KL25Z/ADC/mcuconf.h
index c5d56f2..b657ccf 100644
--- a/testhal/KINETIS/I2C/mcuconf.h
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/mcuconf.h
@@ -17,30 +17,29 @@
#ifndef _MCUCONF_H_
#define _MCUCONF_H_
-#define K20x_MCUCONF
+#define KL2x_MCUCONF
/*
* HAL driver system settings.
*/
/* Select the MCU clocking mode below by enabling the appropriate block. */
+/* The defaults are MCG_MODE_PEE, SYSCLK 48MHz, PLLCLK 96MHz, BUSCLK 24MHz */
-/* Enable clock initialization by HAL */
-#define KINETIS_NO_INIT FALSE
-
-/* PEE mode - external 8 MHz crystal with PLL for 48 MHz core/system clock. */
+/* PEE mode - 48MHz system clock driven by external crystal. */
#if 1
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_PEE
-#define KINETIS_XTAL_FREQUENCY 8000000UL
+#define KINETIS_PLLCLK_FREQUENCY 96000000UL
#define KINETIS_SYSCLK_FREQUENCY 48000000UL
#endif
-/* FEI mode - 48 MHz with internal 32.768 kHz oscillator */
+/* crystal-less FEI mode - 48 MHz with internal 32.768 kHz crystal */
#if 0
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEI
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* do not divide system clock */
#endif /* 0 */
/* FEE mode - 24 MHz with external 32.768 kHz crystal */
@@ -48,12 +47,12 @@
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
#define KINETIS_MCG_FLL_DRS 0 /* 732x FLL factor */
-#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
-#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 24 MHz */
+#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 12 MHz */
#define KINETIS_SYSCLK_FREQUENCY 23986176UL /* 32.768 kHz*732 (~24 MHz) */
#define KINETIS_UART0_CLOCK_FREQ (32768 * 732) /* FLL output */
#define KINETIS_UART0_CLOCK_SRC 1 /* Select FLL clock */
-#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_MCG_FLL_OUTDIV4)
+#define KINETIS_BUSCLK_FREQUENCY (KINETIS_SYSCLK_FREQUENCY / KINETIS_CLKDIV1_OUTDIV4)
#endif /* 0 */
/* FEE mode - 48 MHz */
@@ -61,8 +60,8 @@
#define KINETIS_MCG_MODE KINETIS_MCG_MODE_FEE
#define KINETIS_MCG_FLL_DMX32 1 /* Fine-tune for 32.768 kHz */
#define KINETIS_MCG_FLL_DRS 1 /* 1464x FLL factor */
-#define KINETIS_MCG_FLL_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
-#define KINETIS_MCG_FLL_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
+#define KINETIS_CLKDIV1_OUTDIV1 1 /* Divide 48 MHz FLL by 1 => 48 MHz */
+#define KINETIS_CLKDIV1_OUTDIV4 2 /* Divide OUTDIV1 output by 2 => 24 MHz */
#define KINETIS_SYSCLK_FREQUENCY 47972352UL /* 32.768 kHz * 1464 (~48 MHz) */
#endif /* 0 */
@@ -70,7 +69,10 @@
* SERIAL driver system settings.
*/
#define KINETIS_SERIAL_USE_UART0 FALSE
-#define KINETIS_I2C_USE_I2C0 TRUE
-#define KINETIS_I2C_I2C0_PRIORITY 8
+
+/*
+ * ADC driver system settings.
+ */
+#define KINETIS_ADC_USE_ADC0 TRUE
#endif /* _MCUCONF_H_ */
diff --git a/testhal/KINETIS/ADC/readme.txt b/testhal/KINETIS/FRDM-KL25Z/ADC/readme.txt
index 4077343..4077343 100644
--- a/testhal/KINETIS/ADC/readme.txt
+++ b/testhal/KINETIS/FRDM-KL25Z/ADC/readme.txt