Merge pull request #147 from romainreignier/update_tests

Update to latest ChibiOS API

8 files changed, 198 insertions, 44 deletions

diff --git a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c
index e6c6080..09b44f7 100644
--- a/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c
+++ b/os/hal/boards/NONSTANDARD_STM32F4_BARTHESS2/board.c
@@ -14,45 +14,197 @@
     limitations under the License.
 */
 
-#include "ch.h"
 #include "hal.h"
+#include "stm32_gpio.h"
+
+/*===========================================================================*/
+/* Driver local definitions.                                                 */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported variables.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver local variables and types.                                         */
+/*===========================================================================*/
+
+/**
+ * @brief   Type of STM32 GPIO port setup.
+ */
+typedef struct {
+  uint32_t              moder;
+  uint32_t              otyper;
+  uint32_t              ospeedr;
+  uint32_t              pupdr;
+  uint32_t              odr;
+  uint32_t              afrl;
+  uint32_t              afrh;
+} gpio_setup_t;
+
+/**
+ * @brief   Type of STM32 GPIO initialization data.
+ */
+typedef struct {
+#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
+  gpio_setup_t          PAData;
+#endif
+#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
+  gpio_setup_t          PBData;
+#endif
+#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
+  gpio_setup_t          PCData;
+#endif
+#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
+  gpio_setup_t          PDData;
+#endif
+#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
+  gpio_setup_t          PEData;
+#endif
+#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
+  gpio_setup_t          PFData;
+#endif
+#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
+  gpio_setup_t          PGData;
+#endif
+#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
+  gpio_setup_t          PHData;
+#endif
+#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
+  gpio_setup_t          PIData;
+#endif
+#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
+  gpio_setup_t          PJData;
+#endif
+#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
+  gpio_setup_t          PKData;
+#endif
+} gpio_config_t;
 
-#if HAL_USE_PAL || defined(__DOXYGEN__)
 /**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
+ * @brief   STM32 GPIO static initialization data.
  */
-const PALConfig pal_default_config =
-{
+static const gpio_config_t gpio_default_config = {
+#if STM32_HAS_GPIOA
   {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
    VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
   {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
    VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
   {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
    VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
   {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
    VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
   {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
    VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
   {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
    VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
   {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
    VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
   {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
    VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
   {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH},
+#endif
+#if STM32_HAS_GPIOJ
+  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
+   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH},
+#endif
+#if STM32_HAS_GPIOK
+  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
+   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH}
+#endif
 };
+
+/*===========================================================================*/
+/* Driver local functions.                                                   */
+/*===========================================================================*/
+
+static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
+
+  gpiop->OTYPER  = config->otyper;
+  gpiop->OSPEEDR = config->ospeedr;
+  gpiop->PUPDR   = config->pupdr;
+  gpiop->ODR     = config->odr;
+  gpiop->AFRL    = config->afrl;
+  gpiop->AFRH    = config->afrh;
+  gpiop->MODER   = config->moder;
+}
+
+static void stm32_gpio_init(void) {
+
+  /* Enabling GPIO-related clocks, the mask comes from the
+     registry header file.*/
+  rccResetAHB1(STM32_GPIO_EN_MASK);
+  rccEnableAHB1(STM32_GPIO_EN_MASK, true);
+
+  /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+  gpio_init(GPIOA, &gpio_default_config.PAData);
+#endif
+#if STM32_HAS_GPIOB
+  gpio_init(GPIOB, &gpio_default_config.PBData);
 #endif
+#if STM32_HAS_GPIOC
+  gpio_init(GPIOC, &gpio_default_config.PCData);
+#endif
+#if STM32_HAS_GPIOD
+  gpio_init(GPIOD, &gpio_default_config.PDData);
+#endif
+#if STM32_HAS_GPIOE
+  gpio_init(GPIOE, &gpio_default_config.PEData);
+#endif
+#if STM32_HAS_GPIOF
+  gpio_init(GPIOF, &gpio_default_config.PFData);
+#endif
+#if STM32_HAS_GPIOG
+  gpio_init(GPIOG, &gpio_default_config.PGData);
+#endif
+#if STM32_HAS_GPIOH
+  gpio_init(GPIOH, &gpio_default_config.PHData);
+#endif
+#if STM32_HAS_GPIOI
+  gpio_init(GPIOI, &gpio_default_config.PIData);
+#endif
+#if STM32_HAS_GPIOJ
+  gpio_init(GPIOJ, &gpio_default_config.PJData);
+#endif
+#if STM32_HAS_GPIOK
+  gpio_init(GPIOK, &gpio_default_config.PKData);
+#endif
+}
+
+/*===========================================================================*/
+/* Driver interrupt handlers.                                                */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver exported functions.                                                */
+/*===========================================================================*/
 
 /**
  * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
+ * @details GPIO ports and system clocks are initialized before everything
+ *          else.
  */
 void __early_init(void) {
 
+  stm32_gpio_init();
   stm32_clock_init();
 }
 
@@ -60,21 +212,21 @@ void __early_init(void) {
 /**
  * @brief   SDC card detection.
  */
-bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
 
   (void)sdcp;
   /* TODO: Fill the implementation.*/
-  return TRUE;
+  return true;
 }
 
 /**
  * @brief   SDC card write protection detection.
  */
-bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
 
   (void)sdcp;
   /* TODO: Fill the implementation.*/
-  return FALSE;
+  return false;
 }
 #endif /* HAL_USE_SDC */
 
@@ -82,21 +234,21 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
 /**
  * @brief   MMC_SPI card detection.
  */
-bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
 
   (void)mmcp;
   /* TODO: Fill the implementation.*/
-  return TRUE;
+  return true;
 }
 
 /**
  * @brief   MMC_SPI card write protection detection.
  */
-bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
 
   (void)mmcp;
   /* TODO: Fill the implementation.*/
-  return FALSE;
+  return false;
 }
 #endif
 
@@ -105,4 +257,5 @@ bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
  * @todo    Add your board-specific code, if any.
  */
 void boardInit(void) {
+
 }
diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c
index 15d8853..2894907 100644
--- a/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c
+++ b/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c
@@ -1665,9 +1665,9 @@ usbh_urbstatus_t usbh_lld_root_hub_request(USBHDriver *usbh, uint8_t bmRequestTy
 				 * despite reporting a successful por enable. */
 				uerr("Detected enabled port; resetting OTG core");
 				otg->GAHBCFG = 0;
-				osalThreadSleepS(TIME_MS2I(20));
+				osalThreadSleepS(OSAL_MS2I(20));
 				_usbh_start(usbh);				/* this effectively resets the core */
-				osalThreadSleepS(TIME_MS2I(100));	/* during this delay, the core generates connect ISR */
+				osalThreadSleepS(OSAL_MS2I(100));	/* during this delay, the core generates connect ISR */
 				uinfo("OTG reset ended");
 				if (otg->HPRT & HPRT_PCSTS) {
 					/* if the device is still connected, don't report a C_CONNECTION flag, which would cause
@@ -1680,9 +1680,9 @@ usbh_urbstatus_t usbh_lld_root_hub_request(USBHDriver *usbh, uint8_t bmRequestTy
 			hprt &= ~(HPRT_PSUSP | HPRT_PENA | HPRT_PCDET | HPRT_PENCHNG | HPRT_POCCHNG);
 			while ((otg->GRSTCTL & GRSTCTL_AHBIDL) == 0);
 			otg->HPRT = hprt | HPRT_PRST;
-			osalThreadSleepS(TIME_MS2I(15));
+			osalThreadSleepS(OSAL_MS2I(15));
 			otg->HPRT = hprt;
-			osalThreadSleepS(TIME_MS2I(10));
+			osalThreadSleepS(OSAL_MS2I(10));
 			usbh->rootport.lld_c_status |= USBH_PORTSTATUS_C_RESET;
 			osalSysUnlock();
 		} 	break;
diff --git a/os/hal/src/usbh/hal_usbh_aoa.c b/os/hal/src/usbh/hal_usbh_aoa.c
index 5e0fc48..d565595 100644
--- a/os/hal/src/usbh/hal_usbh_aoa.c
+++ b/os/hal/src/usbh/hal_usbh_aoa.c
@@ -533,7 +533,7 @@ static void _vt(void *p) {
 	if ((aoacp->iq_counter == 0) && !usbhURBIsBusy(&aoacp->iq_urb)) {
 		_submitInI(aoacp);
 	}
-	chVTSetI(&aoacp->vt, TIME_MS2I(16), _vt, aoacp);
+	chVTSetI(&aoacp->vt, OSAL_MS2I(16), _vt, aoacp);
 	osalSysUnlockFromISR();
 }
 
@@ -565,7 +565,7 @@ void usbhaoaChannelStart(USBHAOADriver *aoap) {
 	usbhURBSubmit(&aoacp->iq_urb);
 
 	chVTObjectInit(&aoacp->vt);
-	chVTSet(&aoacp->vt, TIME_MS2I(16), _vt, aoacp);
+	chVTSet(&aoacp->vt, OSAL_MS2I(16), _vt, aoacp);
 
 	aoacp->state = USBHAOA_CHANNEL_STATE_READY;
 
diff --git a/os/hal/src/usbh/hal_usbh_ftdi.c b/os/hal/src/usbh/hal_usbh_ftdi.c
index 4def19a..6966028 100644
--- a/os/hal/src/usbh/hal_usbh_ftdi.c
+++ b/os/hal/src/usbh/hal_usbh_ftdi.c
@@ -332,7 +332,7 @@ static usbh_urbstatus_t _ftdi_port_control(USBHFTDIPortDriver *ftdipp,
 			wLength
 	};
 
-	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, buff, NULL, TIME_MS2I(1000));
+	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, buff, NULL, OSAL_MS2I(1000));
 }
 
 static uint32_t _get_divisor(uint32_t baud, usbhftdi_type_t type) {
@@ -394,7 +394,7 @@ static usbh_urbstatus_t _set_baudrate(USBHFTDIPortDriver *ftdipp, uint32_t baudr
 		wIndex,
 		0
 	};
-	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, NULL, NULL, TIME_MS2I(1000));
+	return usbhControlRequestExtended(ftdipp->ftdip->dev, &req, NULL, NULL, OSAL_MS2I(1000));
 }
 
 
@@ -610,7 +610,7 @@ static void _vt(void *p) {
 	if ((ftdipp->iq_counter == 0) && !usbhURBIsBusy(&ftdipp->iq_urb)) {
 		_submitInI(ftdipp);
 	}
-	chVTSetI(&ftdipp->vt, TIME_MS2I(16), _vt, ftdipp);
+	chVTSetI(&ftdipp->vt, OSAL_MS2I(16), _vt, ftdipp);
 	osalSysUnlockFromISR();
 }
 
@@ -690,7 +690,7 @@ void usbhftdipStart(USBHFTDIPortDriver *ftdipp, const USBHFTDIPortConfig *config
 	usbhURBSubmit(&ftdipp->iq_urb);
 
 	chVTObjectInit(&ftdipp->vt);
-	chVTSet(&ftdipp->vt, TIME_MS2I(16), _vt, ftdipp);
+	chVTSet(&ftdipp->vt, OSAL_MS2I(16), _vt, ftdipp);
 
 	ftdipp->state = USBHFTDIP_STATE_READY;
 	osalMutexUnlock(&ftdipp->ftdip->mtx);
diff --git a/os/hal/src/usbh/hal_usbh_msd.c b/os/hal/src/usbh/hal_usbh_msd.c
index d5bbdeb..7233a0b 100644
--- a/os/hal/src/usbh/hal_usbh_msd.c
+++ b/os/hal/src/usbh/hal_usbh_msd.c
@@ -304,7 +304,7 @@ static msd_bot_result_t _msd_bot_transaction(msd_transaction_t *tran, USBHMassSt
 
 	/* control phase */
 	status = usbhBulkTransfer(&lunp->msdp->epout, tran->cbw,
-					sizeof(*tran->cbw), &actual_len, TIME_MS2I(1000));
+					sizeof(*tran->cbw), &actual_len, OSAL_MS2I(1000));
 
 	if (status == USBH_URBSTATUS_CANCELLED) {
 		uerr("\tMSD: Control phase: USBH_URBSTATUS_CANCELLED");
@@ -327,7 +327,7 @@ static msd_bot_result_t _msd_bot_transaction(msd_transaction_t *tran, USBHMassSt
 				ep,
 				data,
 				tran->cbw->dCBWDataTransferLength,
-				&data_actual_len, TIME_MS2I(20000));
+				&data_actual_len, OSAL_MS2I(20000));
 
 		if (status == USBH_URBSTATUS_CANCELLED) {
 			uerr("\tMSD: Data phase: USBH_URBSTATUS_CANCELLED");
@@ -349,7 +349,7 @@ static msd_bot_result_t _msd_bot_transaction(msd_transaction_t *tran, USBHMassSt
 
 	/* status phase */
 	status = usbhBulkTransfer(&lunp->msdp->epin, &csw,
-				sizeof(csw), &actual_len, TIME_MS2I(1000));
+				sizeof(csw), &actual_len, OSAL_MS2I(1000));
 
 	if (status == USBH_URBSTATUS_STALL) {
 		uwarn("\tMSD: Status phase: USBH_URBSTATUS_STALL, clear halt and retry");
@@ -358,7 +358,7 @@ static msd_bot_result_t _msd_bot_transaction(msd_transaction_t *tran, USBHMassSt
 
 		if (status == USBH_URBSTATUS_OK) {
 			status = usbhBulkTransfer(&lunp->msdp->epin, &csw,
-						sizeof(csw), &actual_len, TIME_MS2I(1000));
+						sizeof(csw), &actual_len, OSAL_MS2I(1000));
 		}
 	}
 
diff --git a/os/various/fatfs_bindings/fatfs.mk b/os/various/fatfs_bindings/fatfs.mk
index 35954b8..f2feeb5 100644
--- a/os/various/fatfs_bindings/fatfs.mk
+++ b/os/various/fatfs_bindings/fatfs.mk
@@ -2,6 +2,6 @@
 FATFSSRC = ${CHIBIOS_CONTRIB}/os/various/fatfs_bindings/fatfs_diskio.c \
            ${CHIBIOS}/os/various/fatfs_bindings/fatfs_syscall.c \
            ${CHIBIOS}/ext/fatfs/src/ff.c \
-           ${CHIBIOS}/ext/fatfs/src/option/ffunicode.c
+           $(CHIBIOS)/ext/fatfs/src/ffunicode.c
 
 FATFSINC = ${CHIBIOS}/ext/fatfs/src
diff --git a/os/various/fatfs_bindings/fatfs_diskio.c b/os/various/fatfs_bindings/fatfs_diskio.c
index 9fa41e2..80d1502 100644
--- a/os/various/fatfs_bindings/fatfs_diskio.c
+++ b/os/various/fatfs_bindings/fatfs_diskio.c
@@ -89,7 +89,7 @@ DSTATUS disk_initialize (
 /* Return Disk Status                                                    */
 
 DSTATUS disk_status (
-    BYTE pdrv        /* Physical drive nmuber (0..) */
+    BYTE pdrv         /* Physical drive number (0..) */
 )
 {
   DSTATUS stat;
@@ -132,9 +132,9 @@ DSTATUS disk_status (
 /* Read Sector(s)                                                        */
 
 DRESULT disk_read (
-    BYTE pdrv,        /* Physical drive nmuber (0..) */
-    BYTE *buff,        /* Data buffer to store read data */
-    DWORD sector,    /* Sector address (LBA) */
+    BYTE pdrv,        /* Physical drive number (0..) */
+    BYTE *buff,       /* Data buffer to store read data */
+    DWORD sector,     /* Sector address (LBA) */
     UINT count        /* Number of sectors to read (1..255) */
 )
 {
@@ -181,10 +181,10 @@ DRESULT disk_read (
 /* Write Sector(s)                                                       */
 
 DRESULT disk_write (
-    BYTE pdrv,            /* Physical drive nmuber (0..) */
-    const BYTE *buff,    /* Data to be written */
-    DWORD sector,        /* Sector address (LBA) */
-    UINT count            /* Number of sectors to write (1..255) */
+    BYTE pdrv,        /* Physical drive number (0..) */
+    const BYTE *buff, /* Data to be written */
+    DWORD sector,     /* Sector address (LBA) */
+    UINT count        /* Number of sectors to write (1..255) */
 )
 {
   switch (pdrv) {
@@ -232,8 +232,8 @@ DRESULT disk_write (
 /* Miscellaneous Functions                                               */
 
 DRESULT disk_ioctl (
-    BYTE pdrv,        /* Physical drive nmuber (0..) */
-    BYTE cmd,        /* Control code */
+    BYTE pdrv,        /* Physical drive number (0..) */
+    BYTE cmd,         /* Control code */
     void *buff        /* Buffer to send/receive control data */
 )
 {
diff --git a/os/various/lib_scsi.c b/os/various/lib_scsi.c
index ea2adda..720a90f 100644
--- a/os/various/lib_scsi.c
+++ b/os/various/lib_scsi.c
@@ -364,7 +364,8 @@ static bool data_read_write10(SCSITarget *scsip, const uint8_t *cmd) {
     size_t bs = bdi.blk_size;
     uint8_t *buf = scsip->config->blkbuf;
 
-    for (size_t i=0; i<req.blk_cnt; i++) {
+    size_t i = 0;
+    for (i=0; i<req.blk_cnt; i++) {
       if (cmd[0] == SCSI_CMD_READ_10) {
         // TODO: block error handling
         blkRead(blkdev, req.first_lba + i, buf, 1);