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| author | Michael Walker <walkerstop@gmail.com> | 2018-05-03 18:41:14 -0700 |
|---|---|---|
| committer | Michael Walker <walkerstop@gmail.com> | 2018-05-07 07:45:08 -0700 |
| commit | 619d45c0ffc02ca122f5ec7c34a1d6f82060fb7d (patch) | |
| tree | 675aee7e3fb3446313cef31dbec44202de9bbbc3 /os/hal/ports/KINETIS/LLD | |
| parent | f4b640014d7b042e80dfaec520d3a02fb7220dfe (diff) | |
| download | ChibiOS-Contrib-619d45c0ffc02ca122f5ec7c34a1d6f82060fb7d.tar.gz ChibiOS-Contrib-619d45c0ffc02ca122f5ec7c34a1d6f82060fb7d.tar.bz2 ChibiOS-Contrib-619d45c0ffc02ca122f5ec7c34a1d6f82060fb7d.zip | |
Fix MK66F18 compilation for the following HALs: Serial, I2C, EXT, ADC, GPT, PWM, SPI
Diffstat (limited to 'os/hal/ports/KINETIS/LLD')
| -rw-r--r-- | os/hal/ports/KINETIS/LLD/hal_i2c_lld.c | 6 | ||||
| -rw-r--r-- | os/hal/ports/KINETIS/LLD/hal_sdc_lld.c | 18 | ||||
| -rw-r--r-- | os/hal/ports/KINETIS/LLD/hal_serial_lld.c | 2 |
3 files changed, 24 insertions, 2 deletions
diff --git a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c b/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c index a005c32..f615dd5 100644 --- a/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c +++ b/os/hal/ports/KINETIS/LLD/hal_i2c_lld.c @@ -442,7 +442,13 @@ static inline msg_t _i2c_txrx_timeout(I2CDriver *i2cp, i2caddr_t addr, /* wait until the bus is released */
/* Calculating the time window for the timeout on the busy bus condition.*/
start = osalOsGetSystemTimeX();
+#if defined(OSAL_TIME_MS2I)
end = start + OSAL_TIME_MS2I(KINETIS_I2C_BUSY_TIMEOUT);
+#elif defined(OSAL_TIME_MS2ST)
+ end = start + OSAL_TIME_MS2ST(KINETIS_I2C_BUSY_TIMEOUT);
+#else
+ end = start + OSAL_MS2ST(KINETIS_I2C_BUSY_TIMEOUT);
+#endif
while(true) {
osalSysLock();
diff --git a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c b/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c index 1b19a90..6ba932e 100644 --- a/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c +++ b/os/hal/ports/KINETIS/LLD/hal_sdc_lld.c @@ -29,7 +29,7 @@ * or write).
*
* The SDHC signals must be routed to the desired pins, and pullups/pulldowns
- * configured. + * configured.
*
* @addtogroup SDC
* @{
@@ -45,8 +45,13 @@ /* Driver local definitions. */
/*===========================================================================*/
+#if defined(MK66F18)
+/* Configure SDHC block to use the IRC48M clock */
+#define KINETIS_SDHC_PERIPHERAL_FREQUENCY 48000000UL
+#else
/* We configure the SDHC block to use the system clock */
#define KINETIS_SDHC_PERIPHERAL_FREQUENCY KINETIS_SYSCLK_FREQUENCY
+#endif
#ifndef KINETIS_SDHC_PRIORITY
#define KINETIS_SDHC_PRIORITY 12 /* TODO? Default IRQ priority for SDHC */
@@ -189,6 +194,11 @@ static void enable_clock_when_stable(uint32_t new_sysctl) /* Restart the clock */
SDHC->SYSCTL = new_sysctl | SDHC_SYSCTL_SDCLKEN;
+
+ /* Wait for clock to stabilize again */
+ while(!(SDHC->PRSSTAT & SDHC_PRSSTAT_SDSTB)) {
+ osalThreadSleepMilliseconds(1);
+ }
}
/**
@@ -589,9 +599,15 @@ void sdc_lld_init(void) { void sdc_lld_start(SDCDriver *sdcp) {
if (sdcp->state == BLK_STOP) {
+#if defined(MK66F18)
+ /* Use IRC48M clock for SDHC */
+ SIM->SOPT2 |= SIM_SOPT2_SDHCSRC(1);
+ SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_SET(3);
+#else
SIM->SOPT2 =
(SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) |
SIM_SOPT2_SDHCSRC(0); /* SDHC clock source 0: Core/system clock. */
+#endif
SIM->SCGC3 |= SIM_SCGC3_SDHC; /* Enable clock to SDHC peripheral */
/* Reset the SDHC block */
diff --git a/os/hal/ports/KINETIS/LLD/hal_serial_lld.c b/os/hal/ports/KINETIS/LLD/hal_serial_lld.c index c92fa5c..a1b6632 100644 --- a/os/hal/ports/KINETIS/LLD/hal_serial_lld.c +++ b/os/hal/ports/KINETIS/LLD/hal_serial_lld.c @@ -262,7 +262,7 @@ static void configure_uart(SerialDriver *sdp, const SerialConfig *config) { }
#endif /* KINETIS_SERIAL_USE_UART0 */
-#elif defined(K20x) || defined(K60x) /* KL2x */
+#elif defined(K20x) || defined(K60x) || defined(MK66F18) /* KL2x */
/* UARTs 0 and 1 are clocked from SYSCLK, others from BUSCLK on K20x and K60x. */
#if KINETIS_SERIAL_USE_UART0
|