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authorStephane D'Alu <sdalu@sdalu.com>2016-07-09 23:57:48 +0200
committerStephane D'Alu <sdalu@sdalu.com>2016-07-09 23:57:48 +0200
commit5805e10f74104e3de60470c38d6643d2bdb00fe0 (patch)
tree18339d5cb2a1903d5c03793b18388e14c1740832 /os/common
parentddebbfc5d2ddcde8337ff5f88359770220df9f58 (diff)
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NRF52832 implementation
Diffstat (limited to 'os/common')
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/ld/NRF52832.ld84
-rw-r--r--os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk10
-rw-r--r--os/common/startup/ARMCMx/devices/NRF52832/cmparams.h82
3 files changed, 176 insertions, 0 deletions
diff --git a/os/common/startup/ARMCMx/compilers/GCC/ld/NRF52832.ld b/os/common/startup/ARMCMx/compilers/GCC/ld/NRF52832.ld
new file mode 100644
index 0000000..402995a
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/ld/NRF52832.ld
@@ -0,0 +1,84 @@
+/*
+ Copyright (C) 2016 Stephane D'Alu
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * NRF52832 memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x00000000, len = 512k
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
+ ram0 : org = 0x20000000, len = 64k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for HEAP segment.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+INCLUDE rules.ld
diff --git a/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk
new file mode 100644
index 0000000..693ae67
--- /dev/null
+++ b/os/common/startup/ARMCMx/compilers/GCC/mk/startup_nrf52.mk
@@ -0,0 +1,10 @@
+# List of the ChibiOS generic NRF51 startup and CMSIS files.
+STARTUPSRC = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt1.c \
+ $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/vectors.c
+
+STARTUPASM = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
+
+STARTUPINC = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/devices/NRF52832 \
+ $(CHIBIOS)/os/common/ext/CMSIS/include
+
+STARTUPLD = $(CHIBIOS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/ld
diff --git a/os/common/startup/ARMCMx/devices/NRF52832/cmparams.h b/os/common/startup/ARMCMx/devices/NRF52832/cmparams.h
new file mode 100644
index 0000000..b349291
--- /dev/null
+++ b/os/common/startup/ARMCMx/devices/NRF52832/cmparams.h
@@ -0,0 +1,82 @@
+/*
+ Copyright (C) 2016 Stephane D'Alu
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file NRF51822/cmparams.h
+ * @brief ARM Cortex-M4 parameters for the Nordic Semi NRF52832 family.
+ *
+ * @defgroup ARMCMx_NRF52x Nordic semiconductor NRF52x.
+ * @ingroup ARMCMx_SPECIFIC
+ * @details This file contains the Cortex-M4 specific parameters for the
+ * NRF52x platform.
+ * @{
+ */
+
+#ifndef _CMPARAMS_H_
+#define _CMPARAMS_H_
+
+/**
+ * @brief Cortex core model.
+ */
+#define CORTEX_MODEL 4
+
+/**
+ * @brief Memory Protection unit presence.
+ */
+#define CORTEX_HAS_MPU 1
+
+/**
+ * @brief Floating Point unit presence.
+ */
+#define CORTEX_HAS_FPU 1
+
+/**
+ * @brief Number of bits in priority masks.
+ */
+#define CORTEX_PRIORITY_BITS 3
+
+/**
+ * @brief Number of interrupt vectors.
+ * @note This number does not include the 16 system vectors and must be
+ * rounded to a multiple of 8.
+ */
+#define CORTEX_NUM_VECTORS 40
+
+/* The following code is not processed when the file is included from an
+ asm module.*/
+#if !defined(_FROM_ASM_)
+
+/* Including the device CMSIS header. Note, we are not using the definitions
+ from this header because we need this file to be usable also from
+ assembler source files. We verify that the info matches instead.*/
+#include "nrf52.h"
+
+#if CORTEX_MODEL != __CORTEX_M
+#error "CMSIS __CORTEX_M mismatch"
+#endif
+
+#if CORTEX_PRIORITY_BITS != __NVIC_PRIO_BITS
+#error "CMSIS __NVIC_PRIO_BITS mismatch"
+#endif
+
+#endif /* !defined(_FROM_ASM_) */
+
+#endif /* _CMPARAMS_H_ */
+
+/** @} */