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author | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-29 20:16:08 +0100 |
---|---|---|
committer | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-29 20:16:08 +0100 |
commit | 90f32c35466c9edbd59716de66903b3f537f5abb (patch) | |
tree | 8e1a1006a00d48c6196d0b053f3bf6d6781aae70 | |
parent | 97b7064031ed2be5980a59cdab8174a9074febb4 (diff) | |
download | ChibiOS-Contrib-90f32c35466c9edbd59716de66903b3f537f5abb.tar.gz ChibiOS-Contrib-90f32c35466c9edbd59716de66903b3f537f5abb.tar.bz2 ChibiOS-Contrib-90f32c35466c9edbd59716de66903b3f537f5abb.zip |
Updating FSMC driver (SRAM part)
-rw-r--r-- | os/hal/include/fsmc/sram.h | 32 | ||||
-rw-r--r-- | os/hal/include/hal_fsmc.h | 12 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c | 2 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h | 2 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c | 61 | ||||
-rw-r--r-- | os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h | 97 | ||||
-rw-r--r-- | os/hal/src/hal_fsmc.c | 79 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h | 7 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h | 17 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_SRAM/main.c | 1 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h | 26 |
11 files changed, 143 insertions, 193 deletions
diff --git a/os/hal/include/fsmc/sram.h b/os/hal/include/fsmc/sram.h index 6eed97a..4a19246 100644 --- a/os/hal/include/fsmc/sram.h +++ b/os/hal/include/fsmc/sram.h @@ -43,32 +43,32 @@ * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM1 is included. */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM1) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM1 FALSE +#if !defined(STM32_FSMC_USE_SRAM1) || defined(__DOXYGEN__) +#define STM32_FSMC_USE_SRAM1 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM2 is included. */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM2) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM2 FALSE +#if !defined(STM32_FSMC_USE_SRAM2) || defined(__DOXYGEN__) +#define STM32_FSMC_USE_SRAM2 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM3 is included. */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM3) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM3 FALSE +#if !defined(STM32_FSMC_USE_SRAM3) || defined(__DOXYGEN__) +#define STM32_FSMC_USE_SRAM3 FALSE #endif /** * @brief SRAM driver enable switch. * @details If set to @p TRUE the support for SRAM4 is included. */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM4) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM4 FALSE +#if !defined(STM32_FSMC_USE_SRAM4) || defined(__DOXYGEN__) +#define STM32_FSMC_USE_SRAM4 FALSE #endif /** @} */ @@ -77,13 +77,13 @@ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_SRAM_USE_FSMC_SRAM1 && !STM32_SRAM_USE_FSMC_SRAM2 && \ - !STM32_SRAM_USE_FSMC_SRAM3 && !STM32_SRAM_USE_FSMC_SRAM4 +#if !STM32_FSMC_USE_SRAM1 && !STM32_FSMC_USE_SRAM2 && \ + !STM32_FSMC_USE_SRAM3 && !STM32_FSMC_USE_SRAM4 #error "SRAM driver activated but no SRAM peripheral assigned" #endif -#if (STM32_SRAM_USE_FSMC_SRAM1 || STM32_SRAM_USE_FSMC_SRAM2 || \ - STM32_SRAM_USE_FSMC_SRAM3 || STM32_SRAM_USE_FSMC_SRAM4) && !STM32_HAS_FSMC +#if (STM32_FSMC_USE_SRAM1 || STM32_FSMC_USE_SRAM2 || \ + STM32_FSMC_USE_SRAM3 || STM32_FSMC_USE_SRAM4) && !STM32_HAS_FSMC #error "FSMC not present in the selected device" #endif @@ -137,19 +137,19 @@ struct SRAMDriver { /* External declarations. */ /*===========================================================================*/ -#if STM32_SRAM_USE_FSMC_SRAM1 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD1; #endif -#if STM32_SRAM_USE_FSMC_SRAM2 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD2; #endif -#if STM32_SRAM_USE_FSMC_SRAM3 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD3; #endif -#if STM32_SRAM_USE_FSMC_SRAM4 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD4; #endif diff --git a/os/hal/include/hal_fsmc.h b/os/hal/include/hal_fsmc.h index f85079a..834fa8d 100644 --- a/os/hal/include/hal_fsmc.h +++ b/os/hal/include/hal_fsmc.h @@ -327,25 +327,25 @@ struct FSMCDriver { /* End of the mandatory fields.*/ #if HAL_USE_FSMC_SRAM - #if STM32_SRAM_USE_FSMC_SRAM1 + #if STM32_FSMC_USE_SRAM1 FSMC_SRAM_NOR_TypeDef *sram1; #endif - #if STM32_SRAM_USE_FSMC_SRAM2 + #if STM32_FSMC_USE_SRAM2 FSMC_SRAM_NOR_TypeDef *sram2; #endif - #if STM32_SRAM_USE_FSMC_SRAM3 + #if STM32_FSMC_USE_SRAM3 FSMC_SRAM_NOR_TypeDef *sram3; #endif - #if STM32_SRAM_USE_FSMC_SRAM4 + #if STM32_FSMC_USE_SRAM4 FSMC_SRAM_NOR_TypeDef *sram4; #endif #endif #if HAL_USE_FSMC_NAND - #if STM32_NAND_USE_FSMC_NAND1 + #if STM32_FSMC_USE_NAND1 FSMC_NAND_TypeDef *nand1; #endif - #if STM32_NAND_USE_FSMC_NAND2 + #if STM32_FSMC_USE_NAND1 FSMC_NAND_TypeDef *nand2; #endif #endif diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c index 5934f88..1b0c0db 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c @@ -34,7 +34,7 @@ defined(STM32F769xx) || defined(STM32F777xx) || \ defined(STM32F779xx)) -#if (STM32_FSMC_USE_SDRAM1 == TRUE) || (STM32_FSMC_USE_SDRAM2 == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) #include "hal_fsmc_sdram_lld.h" diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h index 0e533b6..1fc7993 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h @@ -37,7 +37,7 @@ #include "hal_fsmc.h" -#if (STM32_FSMC_USE_SDRAM1 == TRUE) || (STM32_FSMC_USE_SDRAM2 == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c index da13ca5..49b7826 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c @@ -22,9 +22,10 @@ * @{ */ #include "hal.h" -#include "hal_fsmc_sram.h" -#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) + +#include "hal_fsmc_sram_lld.h" /*===========================================================================*/ /* Driver local definitions. */ @@ -36,28 +37,28 @@ /** * @brief SRAM1 driver identifier. */ -#if STM32_SRAM_USE_FSMC_SRAM1 || defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM1 || defined(__DOXYGEN__) SRAMDriver SRAMD1; #endif /** * @brief SRAM2 driver identifier. */ -#if STM32_SRAM_USE_FSMC_SRAM2 || defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM2 || defined(__DOXYGEN__) SRAMDriver SRAMD2; #endif /** * @brief SRAM3 driver identifier. */ -#if STM32_SRAM_USE_FSMC_SRAM3 || defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM3 || defined(__DOXYGEN__) SRAMDriver SRAMD3; #endif /** * @brief SRAM4 driver identifier. */ -#if STM32_SRAM_USE_FSMC_SRAM4 || defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM4 || defined(__DOXYGEN__) SRAMDriver SRAMD4; #endif @@ -82,36 +83,6 @@ SRAMDriver SRAMD4; /*===========================================================================*/ /** - * @brief Low level SRAM driver initialization. - * - * @notapi - */ -void fsmcSramInit(void) { - - fsmc_init(); - -#if STM32_SRAM_USE_FSMC_SRAM1 - SRAMD1.sram = FSMCD1.sram1; - SRAMD1.state = SRAM_STOP; -#endif /* STM32_SRAM_USE_FSMC_SRAM1 */ - -#if STM32_SRAM_USE_FSMC_SRAM2 - SRAMD2.sram = FSMCD1.sram2; - SRAMD2.state = SRAM_STOP; -#endif /* STM32_SRAM_USE_FSMC_SRAM2 */ - -#if STM32_SRAM_USE_FSMC_SRAM3 - SRAMD3.sram = FSMCD1.sram3; - SRAMD3.state = SRAM_STOP; -#endif /* STM32_SRAM_USE_FSMC_SRAM3 */ - -#if STM32_SRAM_USE_FSMC_SRAM4 - SRAMD4.sram = FSMCD1.sram4; - SRAMD4.state = SRAM_STOP; -#endif /* STM32_SRAM_USE_FSMC_SRAM4 */ -} - -/** * @brief Configures and activates the SRAM peripheral. * * @param[in] sramp pointer to the @p SRAMDriver object @@ -119,20 +90,11 @@ void fsmcSramInit(void) { * * @notapi */ -void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) { - - if (FSMCD1.state == FSMC_STOP) - fsmc_start(&FSMCD1); - - osalDbgAssert((sramp->state == SRAM_STOP) || (sramp->state == SRAM_READY), - "invalid state"); +void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp) { - if (sramp->state == SRAM_STOP) { sramp->sram->BTR = cfgp->btr; sramp->sram->BWTR = cfgp->bwtr; sramp->sram->BCR = cfgp->bcr | FSMC_BCR_MBKEN; - sramp->state = SRAM_READY; - } } /** @@ -142,9 +104,8 @@ void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) { * * @notapi */ -void fsmcSramStop(SRAMDriver *sramp) { +void lld_sram_stop(SRAMDriver *sramp) { - if (sramp->state == SRAM_READY) { uint32_t mask = FSMC_BCR_MBKEN; #if (defined(STM32F427xx) || defined(STM32F437xx) || \ defined(STM32F429xx) || defined(STM32F439xx) || \ @@ -155,11 +116,9 @@ void fsmcSramStop(SRAMDriver *sramp) { mask |= FSMC_BCR_CCLKEN; #endif sramp->sram->BCR &= ~mask; - sramp->state = SRAM_STOP; - } } -#endif /* STM32_USE_FSMC_SRAM */ +#endif /* STM32_FSMC_USE_SRAM */ /** @} */ diff --git a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h index 5e749a8..bfd878f 100644 --- a/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h +++ b/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h @@ -27,7 +27,7 @@ #include "hal_fsmc.h" -#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) +#if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) /*===========================================================================*/ /* Driver constants. */ @@ -41,95 +41,15 @@ * @{ */ -/** - * @brief SRAM driver enable switch. - * @details If set to @p TRUE the support for SRAM1 is included. - */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM1) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM1 FALSE -#endif - -/** - * @brief SRAM driver enable switch. - * @details If set to @p TRUE the support for SRAM2 is included. - */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM2) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM2 FALSE -#endif - -/** - * @brief SRAM driver enable switch. - * @details If set to @p TRUE the support for SRAM3 is included. - */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM3) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM3 FALSE -#endif - -/** - * @brief SRAM driver enable switch. - * @details If set to @p TRUE the support for SRAM4 is included. - */ -#if !defined(STM32_SRAM_USE_FSMC_SRAM4) || defined(__DOXYGEN__) -#define STM32_SRAM_USE_FSMC_SRAM4 FALSE -#endif - /** @} */ /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ -#if !STM32_SRAM_USE_FSMC_SRAM1 && !STM32_SRAM_USE_FSMC_SRAM2 && \ - !STM32_SRAM_USE_FSMC_SRAM3 && !STM32_SRAM_USE_FSMC_SRAM4 -#error "SRAM driver activated but no SRAM peripheral assigned" -#endif - -#if (STM32_SRAM_USE_FSMC_SRAM1 || STM32_SRAM_USE_FSMC_SRAM2 || \ - STM32_SRAM_USE_FSMC_SRAM3 || STM32_SRAM_USE_FSMC_SRAM4) && !STM32_HAS_FSMC -#error "FSMC not present in the selected device" -#endif - /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ -/** - * @brief Driver state machine possible states. - */ -typedef enum { - SRAM_UNINIT = 0, /**< Not initialized. */ - SRAM_STOP = 1, /**< Stopped. */ - SRAM_READY = 2, /**< Ready. */ -} sramstate_t; - -/** - * @brief Type of a structure representing an NAND driver. - */ -typedef struct SRAMDriver SRAMDriver; - -/** - * @brief Driver configuration structure. - * @note It could be empty on some architectures. - * @note Some bits in BCR register will be forced by driver. - */ -typedef struct { - uint32_t bcr; - uint32_t btr; - uint32_t bwtr; -} SRAMConfig; - -/** - * @brief Structure representing an NAND driver. - */ -struct SRAMDriver { - /** - * @brief Driver state. - */ - sramstate_t state; - /** - * @brief Pointer to the FSMC SRAM registers block. - */ - FSMC_SRAM_NOR_TypeDef *sram; -}; /*===========================================================================*/ /* Driver macros. */ @@ -139,33 +59,32 @@ struct SRAMDriver { /* External declarations. */ /*===========================================================================*/ -#if STM32_SRAM_USE_FSMC_SRAM1 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD1; #endif -#if STM32_SRAM_USE_FSMC_SRAM2 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD2; #endif -#if STM32_SRAM_USE_FSMC_SRAM3 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD3; #endif -#if STM32_SRAM_USE_FSMC_SRAM4 && !defined(__DOXYGEN__) +#if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__) extern SRAMDriver SRAMD4; #endif #ifdef __cplusplus extern "C" { #endif - void fsmcSramInit(void); - void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp); - void fsmcSramStop(SRAMDriver *sramp); + void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp); + void lld_sram_stop(SRAMDriver *sramp); #ifdef __cplusplus } #endif -#endif /* STM32_USE_FSMC_SRAM */ +#endif /* STM32_FSMC_USE_SRAM */ #endif /* HAL_FSMC_SRAM_H_ */ diff --git a/os/hal/src/hal_fsmc.c b/os/hal/src/hal_fsmc.c index 7304866..cdbb387 100644 --- a/os/hal/src/hal_fsmc.c +++ b/os/hal/src/hal_fsmc.c @@ -62,8 +62,6 @@ FSMCDriver FSMCD1; /* Driver exported functions. */ /*===========================================================================*/ -#include "hal_fsmc_sdram_lld.h" - /** * @brief Low level FSMC driver initialization. * @@ -191,7 +189,9 @@ CH_IRQ_HANDLER(STM32_FSMC_HANDLER) { CH_IRQ_EPILOGUE(); } +#if (HAL_USE_FSMC_SDRAM == TRUE) +#include "hal_fsmc_sdram_lld.h" /** * @brief FSMC SDRAM Driver init */ @@ -238,6 +238,81 @@ void fsmcSdramStop(SDRAMDriver *sdramp) { sdramp->state = SDRAM_STOP; } } +#endif /* HAL_USE_FSMC_SDRAM == TRUE */ + + +#if (HAL_USE_FSMC_SRAM == TRUE) + +#include "hal_fsmc_sram_lld.h" + +/** + * @brief Low level SRAM driver initialization. + * + * @notapi + */ +void fsmcSramInit(void) { + + fsmcInit(); + +#if STM32_FSMC_USE_SRAM1 + SRAMD1.sram = FSMCD1.sram1; + SRAMD1.state = SRAM_STOP; +#endif /* STM32_FSMC_USE_SRAM1 */ + +#if STM32_FSMC_USE_SRAM2 + SRAMD2.sram = FSMCD1.sram2; + SRAMD2.state = SRAM_STOP; +#endif /* STM32_FSMC_USE_SRAM2 */ + +#if STM32_FSMC_USE_SRAM3 + SRAMD3.sram = FSMCD1.sram3; + SRAMD3.state = SRAM_STOP; +#endif /* STM32_FSMC_USE_SRAM3 */ + +#if STM32_FSMC_USE_SRAM4 + SRAMD4.sram = FSMCD1.sram4; + SRAMD4.state = SRAM_STOP; +#endif /* STM32_FSMC_USE_SRAM4 */ +} + +/** + * @brief Configures and activates the SRAM peripheral. + * + * @param[in] sramp pointer to the @p SRAMDriver object + * @param[in] cfgp pointer to the @p SRAMConfig object + * + * @notapi + */ +void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) { + + if (FSMCD1.state == FSMC_STOP) + fsmcStart(&FSMCD1); + + osalDbgAssert((sramp->state == SRAM_STOP) || (sramp->state == SRAM_READY), + "invalid state"); + + if (sramp->state == SRAM_STOP) { + lld_sram_start(sramp, cfgp); + sramp->state = SRAM_READY; + } +} + +/** + * @brief Deactivates the SRAM peripheral. + * + * @param[in] sramp pointer to the @p SRAMDriver object + * + * @notapi + */ +void fsmcSramStop(SRAMDriver *sramp) { + + if (sramp->state == SRAM_READY) { + lld_sram_stop(sramp); + sramp->state = SRAM_STOP; + } +} + +#endif /* HAL_USE_FSMC_SRAM == TRUE */ #endif /* HAL_USE_FSMC */ diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h index d1d3ada..9ad41fd 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h @@ -46,13 +46,6 @@ #endif
/**
- * @brief Enables the NAND subsystem.
- */
-#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
-#define HAL_USE_NAND FALSE
-#endif
-
-/**
* @brief Enables the 1-wire subsystem.
*/
#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h index da9c607..f9cfcbe 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h @@ -27,15 +27,22 @@ /**
* @brief Enables the FSMC subsystem.
*/
-#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
-#define HAL_USE_FSMC TRUE
+#if !defined(HAL_USE_FSMC_SDRAM) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC_SDRAM FALSE
#endif
/**
- * @brief Enables the NAND subsystem.
+ * @brief Enables the FSMC subsystem.
+ */
+#if !defined(HAL_USE_FSMC_SRAM) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC_SRAM TRUE
+#endif
+
+/**
+ * @brief Enables the FSMC subsystem.
*/
-#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
-#define HAL_USE_NAND FALSE
+#if !defined(HAL_USE_FSMC_NAND) || defined(__DOXYGEN__)
+#define HAL_USE_FSMC_NAND FALSE
#endif
/**
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c b/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c index c94bd73..6413835 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/main.c @@ -17,7 +17,6 @@ #include "ch.h" #include "hal.h" -#include "hal_fsmc_sram.h" #include "membench.h" #include "memtest.h" diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h index 317fe5d..8abb48d 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h @@ -22,32 +22,30 @@ #define STM32_FSMC_USE_FSMC1 TRUE #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 #define STM32_FSMC_DMA_CHN 0x03010201 +#define STM32_FSMC_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_FSMC_DMA_PRIORITY 0 +#define STM32_FSMC_DMA_ERROR_HOOK(nandp) osalSysHalt("FSMC DMA failure") /* * FSMC NAND driver system settings. */ -#define STM32_NAND_USE_FSMC_NAND1 FALSE -#define STM32_NAND_USE_FSMC_NAND2 FALSE -#define STM32_NAND_USE_EXT_INT FALSE -#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_NAND_DMA_PRIORITY 0 -#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") +#define STM32_FSMC_USE_NAND1 FALSE +#define STM32_FSMC_USE_NAND2 FALSE +#define STM32_FSMC_USE_NAND_EXT_INT FALSE /* * FSMC SRAM driver system settings. */ -#define STM32_USE_FSMC_SRAM TRUE -#define STM32_SRAM_USE_FSMC_SRAM1 FALSE -#define STM32_SRAM_USE_FSMC_SRAM2 FALSE -#define STM32_SRAM_USE_FSMC_SRAM3 FALSE -#define STM32_SRAM_USE_FSMC_SRAM4 TRUE +#define STM32_FSMC_USE_SRAM1 FALSE +#define STM32_FSMC_USE_SRAM2 FALSE +#define STM32_FSMC_USE_SRAM3 FALSE +#define STM32_FSMC_USE_SRAM4 TRUE /* * FSMC SDRAM driver system settings. */ -#define STM32_USE_FSMC_SDRAM FALSE -#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE -#define STM32_SDRAM_USE_FSMC_SDRAM2 TRUE +#define STM32_FSMC_USE_SDRAM1 FALSE +#define STM32_FSMC_USE_SDRAM2 FALSE /* * TIMCAP driver system settings. |