remove on chip memory

6 files changed, 45 insertions, 113 deletions

diff --git a/.gitignore b/.gitignore
index 271e084..625c8e6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -24,3 +24,5 @@ sof.flash
 src/Makefile
 src/obj
 *.pin
+.qsys_edit
+.sopc_builder
diff --git a/Makefile b/Makefile
index 57bb799..2933d51 100644
--- a/Makefile
+++ b/Makefile
@@ -6,7 +6,8 @@ SRCS += $(shell find GPU -type f -print )
 
 BSP_DIR=bsp
 
-SOPC_FILE=my_sys.sopcinfo
+QSYS=pong_mcu
+SOPC_FILE=${QSYS}.sopcinfo
 BSP_TYPE=hal
 NIOS2_BSP_ARGS=""
 CPU_NAME=
@@ -68,6 +69,9 @@ sof.flash: ${SOF}
 elf.flash: ${ELF} sof.flash
 	tools/wrap elf2flash --input=${ELF} --output=$@ --epcs --after=sof.flash --verbose 
 
+qsys:
+	tools/wrap qsys-edit ${QSYS}.qsys --project-dir=${PWD} --system-info=DEVICE_FAMILY="Cyclone II" --system-info=DEVICE=EP2C8Q208C8 --system-info=DEVICE_SPEEDGRADE=8 --host-controller
+
 ${BSP_DIR}/system.h:bsp.stamp
 
 flash: load_sof.stamp sof.flash elf.flash ${BSP_DIR}/system.h
@@ -79,6 +83,7 @@ clean:
 	/bin/rm -rf ${BSP_DIR} db incremental_db src/obj
 	/bin/rm -f ${SOPC_FILE} src/Makefile elf.flash sof.flash *.stamp ${SOF} ${ELF} *.rpt *.html *.summary *.pin *.jdi *.qws
 	/bin/rm -f src/${PROJ}.objdump src/${PROJ}.map 
+	/bin/rm -f sopc_builder_log.txt
 	
 	
 	
diff --git a/pong3.qsf b/pong3.qsf
index b614ba7..e8af12b 100644
--- a/pong3.qsf
+++ b/pong3.qsf
@@ -123,8 +123,8 @@ set_location_assignment PIN_161 -to dm9000_int
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
-set_global_assignment -name SEARCH_PATH db/ip/my_sys/ -tag from_archive
-set_global_assignment -name SEARCH_PATH db/ip/my_sys/submodules/ -tag from_archive
+set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/ -tag from_archive
+set_global_assignment -name SEARCH_PATH db/ip/pong_mcu/submodules/ -tag from_archive
 set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
 set_location_assignment PIN_108 -to vga_red[0]
 set_location_assignment PIN_113 -to vga_red[1]
@@ -147,8 +147,8 @@ set_global_assignment -name VERILOG_FILE DM9000A/hdl/DM9000A_IF.v
 set_global_assignment -name VERILOG_FILE GPU/hdl/GPU_IF.v
 set_global_assignment -name PIN_FILE pong3.pin
 set_global_assignment -name VERILOG_FILE pong3.v
-set_global_assignment -name QSYS_FILE my_sys.qsys
+set_global_assignment -name QSYS_FILE pong_mcu.qsys
 
 
 
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
diff --git a/pong3.v b/pong3.v
index 1f5f68e..1015b64 100644
--- a/pong3.v
+++ b/pong3.v
@@ -73,7 +73,7 @@ pll u_pll(
 
 
 
-my_sys u_my_sys(
+pong_mcu u_pong_mcu(
     .reset_reset_n     (rst_n      ),
     .clk_clk           (sclk       ),
     .sdram_0_wire_addr (sdram_addr ),
diff --git a/my_sys.qsys b/pong_mcu.qsys
index 5431cf0..1366ce2 100644
--- a/my_sys.qsys
+++ b/pong_mcu.qsys
@@ -16,7 +16,7 @@
    {
       datum baseAddress
       {
-         value = "67126384";
+         value = "67118192";
          type = "String";
       }
    }
@@ -24,7 +24,7 @@
    {
       datum baseAddress
       {
-         value = "67125760";
+         value = "67117568";
          type = "String";
       }
    }
@@ -32,7 +32,7 @@
    {
       datum baseAddress
       {
-         value = "67126376";
+         value = "67118184";
          type = "String";
       }
    }
@@ -48,7 +48,7 @@
    {
       datum _sortIndex
       {
-         value = "8";
+         value = "7";
          type = "int";
       }
    }
@@ -56,7 +56,7 @@
    {
       datum baseAddress
       {
-         value = "67121152";
+         value = "67112960";
          type = "String";
       }
    }
@@ -64,7 +64,7 @@
    {
       datum _sortIndex
       {
-         value = "4";
+         value = "3";
          type = "int";
       }
       datum megawizard_uipreferences
@@ -77,7 +77,7 @@
    {
       datum _sortIndex
       {
-         value = "9";
+         value = "8";
          type = "int";
       }
    }
@@ -85,7 +85,7 @@
    {
       datum baseAddress
       {
-         value = "67123200";
+         value = "67115008";
          type = "String";
       }
    }
@@ -93,7 +93,7 @@
    {
       datum _sortIndex
       {
-         value = "7";
+         value = "6";
          type = "int";
       }
    }
@@ -105,35 +105,19 @@
          type = "int";
       }
    }
-   element onchip_memory2_0
-   {
-      datum _sortIndex
-      {
-         value = "2";
-         type = "int";
-      }
-   }
    element pio_0
    {
       datum _sortIndex
       {
-         value = "6";
+         value = "5";
          type = "int";
       }
    }
-   element onchip_memory2_0.s1
-   {
-      datum baseAddress
-      {
-         value = "67112960";
-         type = "String";
-      }
-   }
    element pio_0.s1
    {
       datum baseAddress
       {
-         value = "67126352";
+         value = "67118160";
          type = "String";
       }
    }
@@ -149,7 +133,7 @@
    {
       datum baseAddress
       {
-         value = "67126304";
+         value = "67118112";
          type = "String";
       }
    }
@@ -157,7 +141,7 @@
    {
       datum _sortIndex
       {
-         value = "3";
+         value = "2";
          type = "int";
       }
       datum megawizard_uipreferences
@@ -170,7 +154,7 @@
    {
       datum _sortIndex
       {
-         value = "5";
+         value = "4";
          type = "int";
       }
    }
@@ -186,10 +170,10 @@
  <parameter name="globalResetBus" value="false" />
  <parameter name="hdlLanguage" value="VERILOG" />
  <parameter name="maxAdditionalLatency" value="1" />
- <parameter name="projectName" value="dm9000a_nios.qpf" />
+ <parameter name="projectName" value="pong3.qpf" />
  <parameter name="sopcBorderPoints" value="false" />
  <parameter name="systemHash" value="1" />
- <parameter name="timeStamp" value="1381337803810" />
+ <parameter name="timeStamp" value="1381581508634" />
  <parameter name="useTestBenchNamingPattern" value="false" />
  <instanceScript></instanceScript>
  <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
@@ -317,8 +301,8 @@
   <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
   <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
   <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
-  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram_0.s1' start='0x2000000' end='0x4000000' /><slave name='onchip_memory2_0.s1' start='0x4001000' end='0x4002000' /><slave name='epcs_flash_controller_0.epcs_control_port' start='0x4003000' end='0x4003800' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x4003800' end='0x4004000' /><slave name='gpu_0.avalon_slave' start='0x4004200' end='0x4004400' /><slave name='timer_0.s1' start='0x4004420' end='0x4004440' /><slave name='pio_0.s1' start='0x4004450' end='0x4004460' /><slave name='dm9000a_0.avalon_slave_0' start='0x4004468' end='0x4004470' /></address-map>]]></parameter>
-  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sdram_0.s1' start='0x2000000' end='0x4000000' /><slave name='onchip_memory2_0.s1' start='0x4001000' end='0x4002000' /><slave name='epcs_flash_controller_0.epcs_control_port' start='0x4003000' end='0x4003800' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x4003800' end='0x4004000' /><slave name='gpu_0.avalon_slave' start='0x4004200' end='0x4004400' /><slave name='timer_0.s1' start='0x4004420' end='0x4004440' /><slave name='pio_0.s1' start='0x4004450' end='0x4004460' /><slave name='dm9000a_0.avalon_slave_0' start='0x4004468' end='0x4004470' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4004470' end='0x4004478' /></address-map>]]></parameter>
+  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram_0.s1' start='0x2000000' end='0x4000000' /><slave name='epcs_flash_controller_0.epcs_control_port' start='0x4001000' end='0x4001800' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x4001800' end='0x4002000' /><slave name='gpu_0.avalon_slave' start='0x4002200' end='0x4002400' /><slave name='timer_0.s1' start='0x4002420' end='0x4002440' /><slave name='pio_0.s1' start='0x4002450' end='0x4002460' /><slave name='dm9000a_0.avalon_slave_0' start='0x4002468' end='0x4002470' /></address-map>]]></parameter>
+  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sdram_0.s1' start='0x2000000' end='0x4000000' /><slave name='epcs_flash_controller_0.epcs_control_port' start='0x4001000' end='0x4001800' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x4001800' end='0x4002000' /><slave name='gpu_0.avalon_slave' start='0x4002200' end='0x4002400' /><slave name='timer_0.s1' start='0x4002420' end='0x4002440' /><slave name='pio_0.s1' start='0x4002450' end='0x4002460' /><slave name='dm9000a_0.avalon_slave_0' start='0x4002468' end='0x4002470' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4002470' end='0x4002478' /></address-map>]]></parameter>
   <parameter name="clockFrequency" value="80000000" />
   <parameter name="deviceFamilyName" value="Cyclone II" />
   <parameter name="internalIrqMaskSystemInfo" value="15" />
@@ -334,32 +318,6 @@
   <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
  </module>
  <module
-   kind="altera_avalon_onchip_memory2"
-   version="13.0.1.99.2"
-   enabled="1"
-   name="onchip_memory2_0">
-  <parameter name="allowInSystemMemoryContentEditor" value="false" />
-  <parameter name="blockType" value="AUTO" />
-  <parameter name="dataWidth" value="32" />
-  <parameter name="dualPort" value="false" />
-  <parameter name="initMemContent" value="true" />
-  <parameter name="initializationFileName" value="onchip_memory2_0" />
-  <parameter name="instanceID" value="NONE" />
-  <parameter name="memorySize" value="4096" />
-  <parameter name="readDuringWriteMode" value="DONT_CARE" />
-  <parameter name="simAllowMRAMContentsFile" value="false" />
-  <parameter name="simMemInitOnlyFilename" value="0" />
-  <parameter name="singleClockOperation" value="false" />
-  <parameter name="slave1Latency" value="1" />
-  <parameter name="slave2Latency" value="1" />
-  <parameter name="useNonDefaultInitFile" value="false" />
-  <parameter name="useShallowMemBlocks" value="false" />
-  <parameter name="writable" value="true" />
-  <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter>
-  <parameter name="deviceFamily" value="Cyclone II" />
-  <parameter name="deviceFeatures">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 0 HAS_ADVANCED_IO_TIMING_SUPPORT 0 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 1 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 1 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 0 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 1 HAS_JITTER_SUPPORT 0 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 1 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 0 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 0 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 1 HAS_SPLIT_IO_SUPPORT 0 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 0 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 1 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 0 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 1 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 1 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 0 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 1 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 1 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 0 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 1 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 0 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 0 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 0 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 0 USE_ADVANCED_IO_TIMING_BY_DEFAULT 0 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 0 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 0 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</parameter>
- </module>
- <module
    kind="altera_avalon_new_sdram_controller"
    version="13.0.1.99.2"
    enabled="1"
@@ -462,7 +420,7 @@
    start="nios2_qsys_0.instruction_master"
    end="nios2_qsys_0.jtag_debug_module">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04003800" />
+  <parameter name="baseAddress" value="0x04001800" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -471,7 +429,7 @@
    start="nios2_qsys_0.data_master"
    end="nios2_qsys_0.jtag_debug_module">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04003800" />
+  <parameter name="baseAddress" value="0x04001800" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -485,39 +443,6 @@
    start="nios2_qsys_0.jtag_debug_module_reset"
    end="nios2_qsys_0.reset_n" />
  <connection kind="clock" version="13.0" start="clk_0.clk" end="nios2_qsys_0.clk" />
- <connection
-   kind="clock"
-   version="13.0"
-   start="clk_0.clk"
-   end="onchip_memory2_0.clk1" />
- <connection
-   kind="reset"
-   version="13.0"
-   start="nios2_qsys_0.jtag_debug_module_reset"
-   end="onchip_memory2_0.reset1" />
- <connection
-   kind="reset"
-   version="13.0"
-   start="clk_0.clk_reset"
-   end="onchip_memory2_0.reset1" />
- <connection
-   kind="avalon"
-   version="13.0"
-   start="nios2_qsys_0.data_master"
-   end="onchip_memory2_0.s1">
-  <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04001000" />
-  <parameter name="defaultConnection" value="false" />
- </connection>
- <connection
-   kind="avalon"
-   version="13.0"
-   start="nios2_qsys_0.instruction_master"
-   end="onchip_memory2_0.s1">
-  <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04001000" />
-  <parameter name="defaultConnection" value="false" />
- </connection>
  <connection kind="clock" version="13.0" start="clk_0.clk" end="sdram_0.clk" />
  <connection
    kind="reset"
@@ -550,7 +475,7 @@
    start="nios2_qsys_0.instruction_master"
    end="epcs_flash_controller_0.epcs_control_port">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04003000" />
+  <parameter name="baseAddress" value="0x04001000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -559,7 +484,7 @@
    start="nios2_qsys_0.data_master"
    end="epcs_flash_controller_0.epcs_control_port">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04003000" />
+  <parameter name="baseAddress" value="0x04001000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -597,7 +522,7 @@
    start="nios2_qsys_0.data_master"
    end="timer_0.s1">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004420" />
+  <parameter name="baseAddress" value="0x04002420" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -606,7 +531,7 @@
    start="nios2_qsys_0.instruction_master"
    end="timer_0.s1">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004420" />
+  <parameter name="baseAddress" value="0x04002420" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection kind="clock" version="13.0" start="clk_0.clk" end="pio_0.clk" />
@@ -617,7 +542,7 @@
    start="nios2_qsys_0.data_master"
    end="pio_0.s1">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004450" />
+  <parameter name="baseAddress" value="0x04002450" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -626,7 +551,7 @@
    start="nios2_qsys_0.instruction_master"
    end="pio_0.s1">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004450" />
+  <parameter name="baseAddress" value="0x04002450" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -651,7 +576,7 @@
    start="nios2_qsys_0.data_master"
    end="jtag_uart_0.avalon_jtag_slave">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004470" />
+  <parameter name="baseAddress" value="0x04002470" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -681,7 +606,7 @@
    start="nios2_qsys_0.data_master"
    end="dm9000a_0.avalon_slave_0">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004468" />
+  <parameter name="baseAddress" value="0x04002468" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -690,7 +615,7 @@
    start="nios2_qsys_0.instruction_master"
    end="dm9000a_0.avalon_slave_0">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004468" />
+  <parameter name="baseAddress" value="0x04002468" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -728,7 +653,7 @@
    start="nios2_qsys_0.instruction_master"
    end="gpu_0.avalon_slave">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004200" />
+  <parameter name="baseAddress" value="0x04002200" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <connection
@@ -737,7 +662,7 @@
    start="nios2_qsys_0.data_master"
    end="gpu_0.avalon_slave">
   <parameter name="arbitrationPriority" value="1" />
-  <parameter name="baseAddress" value="0x04004200" />
+  <parameter name="baseAddress" value="0x04002200" />
   <parameter name="defaultConnection" value="false" />
  </connection>
  <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
diff --git a/tools/wrap b/tools/wrap
index 4caed0f..5dca448 100755
--- a/tools/wrap
+++ b/tools/wrap
@@ -3,7 +3,7 @@
 AD=/software/apps/altera/quartus_ii_13.0sp1
 LL=linux
 QUARTUS_ROOTDIR="${AD}/quartus"
-PATH="${AD}/quartus/bin:${AD}/nios2eds/sdk2/bin:${AD}/nios2eds/bin:${AD}/nios2eds/bin/gnu/H-i686-pc-linux-gnu/bin:${PATH}"
+PATH="${AD}/quartus/bin:${AD}/quartus/sopc_builder/bin:${AD}/nios2eds/sdk2/bin:${AD}/nios2eds/bin:${AD}/nios2eds/bin/gnu/H-i686-pc-linux-gnu/bin:${PATH}"
 LD_LIBRARY_PATH="${AD}/quartus/${LL}:${LD_LIBRARY_PATH}"
 
 export LD_LIBRARY_PATH PATH QUARTUS_ROOTDIR