blob: cd259c2e0482568f4be28139504afca1f5466416 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
|
/******************************************************************************
* arch-ia64/hypervisor-if.h
*
* Guest OS interface to IA64 Xen.
*/
#ifndef __HYPERVISOR_IF_IA64_H__
#define __HYPERVISOR_IF_IA64_H__
// "packed" generates awful code
#define PACKED
/* Pointers are naturally 64 bits in this architecture; no padding needed. */
#define _MEMORY_PADDING(_X)
#define MEMORY_PADDING
/* Maximum number of virtual CPUs in multi-processor guests. */
/* WARNING: before changing this, check that shared_info fits on a page */
#define MAX_VIRT_CPUS 1
#ifndef __ASSEMBLY__
/* NB. Both the following are 64 bits each. */
typedef unsigned long memory_t; /* Full-sized pointer/address/memory-size. */
#define MAX_NR_SECTION 32 // at most 32 memory holes
typedef struct {
unsigned long start; /* start of memory hole */
unsigned long end; /* end of memory hole */
} mm_section_t;
typedef struct {
unsigned long mfn : 56;
unsigned long type: 8;
} pmt_entry_t;
#define GPFN_MEM (0UL << 56) /* Guest pfn is normal mem */
#define GPFN_FRAME_BUFFER (1UL << 56) /* VGA framebuffer */
#define GPFN_LOW_MMIO (2UL << 56) /* Low MMIO range */
#define GPFN_PIB (3UL << 56) /* PIB base */
#define GPFN_IOSAPIC (4UL << 56) /* IOSAPIC base */
#define GPFN_LEGACY_IO (5UL << 56) /* Legacy I/O base */
#define GPFN_GFW (6UL << 56) /* Guest Firmware */
#define GPFN_HIGH_MMIO (7UL << 56) /* High MMIO range */
#define GPFN_IO_MASK (7UL << 56) /* Guest pfn is I/O type */
#define GPFN_INV_MASK (31UL << 59) /* Guest pfn is invalid */
#define INVALID_MFN (~0UL)
typedef struct
{
} PACKED cpu_user_regs;
/*
* NB. This may become a 64-bit count with no shift. If this happens then the
* structure size will still be 8 bytes, so no other alignments will change.
*/
typedef struct {
unsigned int tsc_bits; /* 0: 32 bits read from the CPU's TSC. */
unsigned int tsc_bitshift; /* 4: 'tsc_bits' uses N:N+31 of TSC. */
} PACKED tsc_timestamp_t; /* 8 bytes */
struct pt_fpreg {
union {
unsigned long bits[2];
long double __dummy; /* force 16-byte alignment */
} u;
};
struct pt_regs {
/* The following registers are saved by SAVE_MIN: */
unsigned long b6; /* scratch */
unsigned long b7; /* scratch */
unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */
unsigned long ar_ssd; /* reserved for future use (scratch) */
unsigned long r8; /* scratch (return value register 0) */
unsigned long r9; /* scratch (return value register 1) */
unsigned long r10; /* scratch (return value register 2) */
unsigned long r11; /* scratch (return value register 3) */
unsigned long cr_ipsr; /* interrupted task's psr */
unsigned long cr_iip; /* interrupted task's instruction pointer */
unsigned long cr_ifs; /* interrupted task's function state */
unsigned long ar_unat; /* interrupted task's NaT register (preserved) */
unsigned long ar_pfs; /* prev function state */
unsigned long ar_rsc; /* RSE configuration */
/* The following two are valid only if cr_ipsr.cpl > 0: */
unsigned long ar_rnat; /* RSE NaT */
unsigned long ar_bspstore; /* RSE bspstore */
unsigned long pr; /* 64 predicate registers (1 bit each) */
unsigned long b0; /* return pointer (bp) */
unsigned long loadrs; /* size of dirty partition << 16 */
unsigned long r1; /* the gp pointer */
unsigned long r12; /* interrupted task's memory stack pointer */
unsigned long r13; /* thread pointer */
unsigned long ar_fpsr; /* floating point status (preserved) */
unsigned long r15; /* scratch */
/* The remaining registers are NOT saved for system calls. */
unsigned long r14; /* scratch */
unsigned long r2; /* scratch */
unsigned long r3; /* scratch */
#ifdef CONFIG_VTI
unsigned long r4; /* preserved */
unsigned long r5; /* preserved */
unsigned long r6; /* preserved */
unsigned long r7; /* preserved */
unsigned long cr_iipa; /* for emulation */
unsigned long cr_isr; /* for emulation */
unsigned long eml_unat; /* used for emulating instruction */
unsigned long rfi_pfs; /* used for elulating rfi */
#endif
/* The following registers are saved by SAVE_REST: */
unsigned long r16; /* scratch */
unsigned long r17; /* scratch */
unsigned long r18; /* scratch */
unsigned long r19; /* scratch */
unsigned long r20; /* scratch */
unsigned long r21; /* scratch */
unsigned long r22; /* scratch */
unsigned long r23; /* scratch */
unsigned long r24; /* scratch */
unsigned long r25; /* scratch */
unsigned long r26; /* scratch */
unsigned long r27; /* scratch */
unsigned long r28; /* scratch */
unsigned long r29; /* scratch */
unsigned long r30; /* scratch */
unsigned long r31; /* scratch */
unsigned long ar_ccv; /* compare/exchange value (scratch) */
/*
* Floating point registers that the kernel considers scratch:
*/
struct pt_fpreg f6; /* scratch */
struct pt_fpreg f7; /* scratch */
struct pt_fpreg f8; /* scratch */
struct pt_fpreg f9; /* scratch */
struct pt_fpreg f10; /* scratch */
struct pt_fpreg f11; /* scratch */
};
typedef struct {
unsigned long ipsr;
unsigned long iip;
unsigned long ifs;
unsigned long precover_ifs;
unsigned long isr;
unsigned long ifa;
unsigned long iipa;
unsigned long iim;
unsigned long unat; // not sure if this is needed until NaT arch is done
unsigned long tpr;
unsigned long iha;
unsigned long itir;
unsigned long itv;
unsigned long pmv;
unsigned long cmcv;
unsigned long pta;
int interrupt_collection_enabled; // virtual psr.ic
int interrupt_delivery_enabled; // virtual psr.i
int pending_interruption;
int incomplete_regframe; // see SDM vol2 6.8
unsigned long delivery_mask[4];
int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
int banknum; // 0 or 1, which virtual register bank is active
unsigned long bank0_regs[16]; // bank0 regs (r16-r31) when bank1 active
unsigned long bank1_regs[16]; // bank1 regs (r16-r31) when bank0 active
unsigned long rrs[8]; // region registers
unsigned long krs[8]; // kernel registers
unsigned long pkrs[8]; // protection key registers
unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
//} PACKED arch_vcpu_info_t;
} arch_vcpu_info_t; // DON'T PACK
typedef struct {
int evtchn_vector;
int domain_controller_evtchn;
unsigned int flags;
//} PACKED arch_shared_info_t;
} arch_shared_info_t; // DON'T PACK
typedef struct vcpu_guest_context {
struct pt_regs regs;
arch_vcpu_info_t vcpu;
arch_shared_info_t shared;
} PACKED vcpu_guest_context_t;
#endif /* !__ASSEMBLY__ */
#define XEN_HYPER_RFI 1
#define XEN_HYPER_RSM_DT 2
#define XEN_HYPER_SSM_DT 3
#define XEN_HYPER_COVER 4
#define XEN_HYPER_ITC_D 5
#define XEN_HYPER_ITC_I 6
#define XEN_HYPER_SSM_I 7
#endif /* __HYPERVISOR_IF_IA64_H__ */
|
