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* x86/apic: remove Summit supportMatt Wilson2013-08-271-1/+1
| | | | | | | | IBM's Summit chipset was only used for 32-bit only Intel ccNUMA and IA-64 machines, neither of which are supported by Xen anymore. Signed-off-by: Matt Wilson <msw@amazon.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
* x86: Unify direct-apic and hiprio irq vector allocations.Keir Fraser2012-03-301-1/+3
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* x86: Allow direct vectored interrupts to be dynamically allocated.Keir Fraser2012-03-301-5/+3
| | | | | | Use this for Intel's CMCI and thermal interrupts. Signed-off-by: Keir Fraser <keir@xen.org>
* x86: consistently serialize CMOS/RTC accesses on rtc_lockJan Beulich2011-07-191-0/+8
| | | | | | | | | | | | | | | Since RTC/CMOS accesses aren't atomic, there are possible races between code paths setting the index register and subsequently reading/writing the data register. This is supposed to be dealt with by acquiring rtc_lock, but two places up to now lacked respective synchronization: Accesses to the EFI time functions and smpboot_{setup,restore}_warm_reset_vector(). This in turn requires no longer directly passing through guest writes to the index register, but instead using a machanism similar to that for PCI config space method 1 accesses. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* move various bits into .init.* sectionsJan Beulich2011-03-091-3/+3
| | | | | | | | | | This also includes the removal of some entirely unused functions. The patch builds upon the makefile adjustments done in the earlier sent patch titled "move more kernel decompression bits to .init.* sections". Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: Remove obsolete inquire_remote_apic()Keir Fraser2010-05-201-10/+0
| | | | | | | Integrated APICs do not have this facility. Which means no multi-processor machine in more than a decade. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Streamline the CPU early boot process.Keir Fraser2010-05-191-11/+0
| | | | | | | | | | | | Mainly this involves getting rid of a bunch of cpumasks and replacing with a single 'cpu_state' enumeration to track progress and allow master-slave handshaking. Cleaning this stuff up is a prerequisite for safely handling slave failure (e.g., out of memory, invalid slave CPU capabilities, ...). This will get fixed up in a future patch. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Reindent smpboot.c and clean up a little.Keir Fraser2010-05-171-8/+0
| | | | | | No semantic changes. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Implement per-cpu vector for xen hypervisorKeir Fraser2009-08-191-0/+3
| | | | | | | | | | | | | | | Since Xen and Linux has big differece in code base, it is very hard to port Linux's patch and apply it to Xen directly, so this patch only adopts core logic of Linux, and make it work for Xen. Key changes: 1. vector allocation algorithm 2. all IRQ chips' set_affinity logic 3. IRQ migration when cpu hot remove. 4. Break assumptions which depend on global vector policy. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
* x86: Change Xen hypervisor's interrupt infrastructureKeir Fraser2009-08-191-0/+1
| | | | | | | | | | | | | | from vector-based to IRQ-based. In per-cpu vector environment, vector space changes to multi-demension resource, so vector number is not appropriate to index irq_desc which stands for unique interrupt source. As Linux does, irq number is chosen to index irq_desc. This patch changes vector-based interrupt infrastructure to irq-based one. Mostly, it follows upstream linux's changes, and some parts are adapted for Xen. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com>
* x86: some assorted irq related cleanupsKeir Fraser2009-05-201-5/+0
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* Enable CMCI for Intel CPUsKeir Fraser2008-12-221-2/+2
| | | | | Signed-off-by Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by Liping Ke <liping.ke@intel.com>
* x86: make NR_IRQS build-time configurableKeir Fraser2008-11-201-3/+0
| | | | | | | | | | While keeping the NR_IRQS default at 256 here, I think it would be a good thing to set it to a higher value to make sure no new mixing of irq and vector spaces slip in. Tested with NR_IRQS forced to 1024. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* Eliminate NR_IRQ_VECTORSKeir Fraser2008-11-201-1/+0
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* vmx: Enable Core 2 Duo Performance Counters in HVM guestKeir Fraser2008-01-301-1/+2
| | | | Signed-off-by: Haitao Shan <haitao.shan@intel.com>
* x86-64: access only 4 bytes a the reset vector location on smpboot.Keir Fraser2007-11-221-1/+1
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: consolidate/enhance TLB flushing interfaceKeir Fraser2007-10-161-2/+2
| | | | | | | | | | | | Folding into a single local handler and a single SMP multiplexor as well as adding capability to also flush caches through the same interfaces (a subsequent patch will make use of this). Once at changing cpuinfo_x86, this patch also removes several unused fields apparently inherited from Linux. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Keir Fraser <keir@xensource.com>
* Big fixes for the new IO-APIC acknowledging method. The problemskaf24@firebug.cl.cam.ac.uk2006-04-152-85/+17
| | | | | | | | | | | | | | | | | | | | were: 1. Some critical Xen interrupts could get blocked behind unacknowledged guest interrupts. This is avoided by making all Xen-bound interrrupts strictly higher priority. 2. Interrupts must not only be EOIed on the CPU that received them, but also in reverse order when interrupts are nested. A whole load of logic has been added to ensure this. There are two boot parameters relating to all this: 'ioapic_ack=old' -- use the old IO-APIC ACK method 'ioapic_ack=new' -- use the new IO-APIC ACK method (default) 'force_intack' -- periodically force acknowledgement of interrupts (default is no; useful for debugging) Signed-off-by: Keir Fraser <keir@xensource.com>
* Simplify the Xen genapic code. Many genapic hooks have beenkaf24@firebug.cl.cam.ac.uk2006-04-041-110/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replaced with unconditional static 'sane' implementations. Functions relating to interrupt/IPI delivery have been grouped into two sets: physical delivery and logical-flat delivery. All subarchitectures use physical delivery except the basic default subarchitecture. The main behavioural changes are: 1. Summit no longer uses logical-clustered delivery mode 2. Physical mode no longer makes any pretence to set the LDR sanely. We never deliver interrupts in logical mode so this really should not matter. 3. Sanity checking of phys_cpu_present_map is enabled for all subarchitectures. Really we should have a sane set of APIC IDs in the system, as we rely on them for physical delivery mode. 4. We enable 'bigsmp' mode on any system with more than eight CPUs. The previous xAPIC check was unnecessary, since our bigsmp mode uses physical delivery, not logical-clustered. This all obviously needs testing on some big systems. Signed-off-by: Keir Fraser <keir@xensource.com>
* Clean up subarch 'mach-foo' header files. No need forkaf24@firebug.cl.cam.ac.uk2006-04-034-23/+10
| | | | | | | | subarch apicdef.h and ipi.h can be much simplified. Signed-off-by: Keir Fraser <keir@xensource.com>
* Remove send_IPI_all, send_IPI_allbutself and send_IPI_selfkaf24@firebug.cl.cam.ac.uk2006-04-031-40/+0
| | | | | | | | | | shortcutting IPI functions. They're either unused or used so frequently that we may as well simplify things and always use send_IPI_mask. Signed-off-by: Keir Fraser <keir@xensource.com>
* Upgrade genapic code to 2.6.16-rc6 codebase. Remove entries fromkaf24@firebug.cl.cam.ac.uk2006-03-204-35/+23
| | | | | | | | | genapic structure that Xen does not require (mostly because we do not support Visual Workstation nor IBM/Sequent NUMA-Q). Signed-off-by: Keir Fraser <keir@xensource.com>
* Upgrade smpboot.c to linux-2.6.16-rc2 codebase.kaf24@firebug.cl.cam.ac.uk2006-02-161-0/+44
| | | | | | Signed-off-by: Keir Fraser <keir@xensource.com>
* Rename physical-address-related variables and functionskaf24@firebug.cl.cam.ac.uk2006-02-012-3/+3
| | | | | | | | | | | | | | | | to follow a new ocnsistent naming scheme. gpfn is a guest pseudophys frame number. gmfn is a machine frame number (from guest p.o.v.) mfn is a real bona fide machine number. pfn is an arbitrary frame number (used in general-purpose 'polymorphic' functions). pfn_info now called page_info. Signed-off-by: Keir Fraser <keir@xensource.com>
* Here is a patch to enable Xen to run on a Unisys ES7000 x86_64 system.kaf24@firebug.cl.cam.ac.uk2005-07-211-2/+0
| | | | | Signed-off-by: Aravindh Puthiyaparambil <aravindh.puthiyaparambil@unisys.com>
* bitkeeper revision 1.1569 (4296329bfi2iosJzMmIh7KglSdchjQ)kaf24@firebug.cl.cam.ac.uk2005-05-261-44/+0
| | | | | | Clean up SMP bootstrap, and fix uniprocessor/APIC-less booting. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1556 (4294b84bRLO0dqxUhCbkQfM8qt1UoA)kaf24@firebug.cl.cam.ac.uk2005-05-251-1/+2
| | | | | | NR_IRQS should be a bit bigger, in anticipation of PCI-MSI support. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1555 (4294b5f0B3iu-SnB9loIMnLXO0loTA)kaf24@firebug.cl.cam.ac.uk2005-05-2512-510/+1
| | | | | | | Ported genapic to Xen: support for bigsmp and numa platforms such as es7000. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1389.15.4 (4280e2e1TW-3Y8iE13utT8fyuaozWA)kaf24@firebug.cl.cam.ac.uk2005-05-101-1/+14
| | | | | Cset exclude: kaf24@firebug.cl.cam.ac.uk|ChangeSet|20050510144837|42684
* bitkeeper revision 1.1389.15.2 (4280c9c5w05qWQmSXarelhI1f8FZkQ)kaf24@firebug.cl.cam.ac.uk2005-05-101-14/+1
| | | | | | | | | Fix level-triggered IOAPIC acknowledgement. Also a first pass at supporting PCI-MSI notifications in Xen. I think we can support these better with some interface changes in Xen. It's currently rather a kludge. Signed-off-by: Keir Fraser <keir@xensource.com>
* bitkeeper revision 1.1389.10.1 (427fa2d3ZV92f_ErvLuIzWbV1f67QA)kaf24@firebug.cl.cam.ac.uk2005-05-0921-0/+946
Phase 1 of upgrading platform code to be derived from Linux 2.6.11 rather than 2.4.x. Signed-off-by: Keir Fraser <keir@xensource.com>