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* Revert "x86/boot: Explicitly clean pcpu stacks in debug builds"Jan Beulich2013-08-271-4/+0
| | | | | This reverts commit 8a3c4acc9907cfec9aae9f1bc251fbf50af6828e. It's reportedly broken.
* x86/boot: Explicitly clean pcpu stacks in debug buildsAndrew Cooper2013-08-271-0/+4
| | | | | | | | | This reduces confusion when looking at a hexdump of the pcpu stacks and wondering were on earth some of the junk was coming from. Also leave some grep fodder for finding where the BSP switches stack (because it took me far longer to find than I care to admit to). Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
* x86/boot: Remove stack segment parameter from smpbootAndrew Cooper2013-08-161-6/+3
| | | | | | | | | | | The stack segment is legacy remnant of a 32bit hypervisor, and not used in 64bit. Furthermore, the unsigned short in the structure actually aliases whatever the linker decides to put next in the data section. Drop the extern struct definition and change it to a simple void pointer, which matches its definition in arch/x86/boot/x86_64.S Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
* x86: mark certain items staticJan Beulich2012-12-071-1/+1
| | | | | | | ..., and at once constify the data items among them. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: make cpu_2_logical_apicid private to x2apic codeJan Beulich2012-11-081-22/+0
| | | | | | | | ... as it in fact is only being used there. While moving it, also make it a per-CPU variable rather than a NR_CPUS-sized array. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* xen: Remove x86_32 build target.Keir Fraser2012-09-121-4/+0
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* console: prepare for non-COMn port supportJan Beulich2012-09-111-1/+1
| | | | | | | | | | Widen SERHND_IDX (and use it where needed), introduce a flush low level driver method, and remove unnecessary peeking of the common code at the (driver specific) serial port identification string in the "console=" command line option value. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: Unify direct-apic and hiprio irq vector allocations.Keir Fraser2012-03-301-4/+5
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* x86: All vectored interrupts go through do_IRQ().Keir Fraser2012-03-301-11/+5
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* x86: add a new SMP bring up way for tboot caseWei, Gang2012-01-111-3/+3
| | | | | | | | | | | | | | | | | From: Wei, Gang <gang.wei@intel.com> tboot may be trying to put APs waiting in MWAIT loops before launching Xen. Xen could check the new flag field in v6 tboot shared page for the hint. If TB_FLAG_AP_WAKE_SUPPORT bit in flag field is set, Xen BSP have to write the monitored memory(g_tboot_shared->ap_wake_trigger) to bring APs out of MWAIT loops. The sipi vector should be written in g_tboot_shared->ap_wake_addr before waking up APs. Signed-off-by: Joseph Cihula <joseph.cihula@intel.com> Signed-off-by: Shane Wang <shane.wang@intel.com> Signed-off-by: Gang Wei <gang.wei@intel.com> Signed-off-by: Jan Beulich <jbeulich@suse.com> Committed-by: Jan Beulich <jbeulich@suse.com>
* X86: Add a delay between INIT & SIPIs for tboot AP bring-up in X2APIC caseGang Wei2011-12-291-0/+13
| | | | | | | | | | | | Without this delay, Xen could not bring APs up while working with TXT/tboot, because tboot needs some time in APs to handle INIT before becoming ready for receiving SIPIs (this delay was removed as part of c/s 23724 by Tim Deegan). Signed-off-by: Gang Wei <gang.wei@intel.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Tim Deegan <tim@xen.org> Committed-by: Tim Deegan <tim@xen.org>
* x86/IRQ: eliminate irq_vector[]Jan Beulich2011-11-111-2/+1
| | | | | | | | | | | | The vector is already being tracked in struct irq_desc's arch.vector member, so there's no real need for a second place where this to get stored. The only caveat is that legacy vectors (used for interrupts handled through the 8259) must be special cased to not prevent non- legacy vectors from being assigned. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* eliminate first_cpu() etcJan Beulich2011-11-081-4/+4
| | | | | | | | This includes the conversion from for_each_cpu_mask() to for_each-cpu(). Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* eliminate cpu_clear()Jan Beulich2011-11-081-1/+1
| | | | | | Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* eliminate cpu_set()Jan Beulich2011-11-081-5/+5
| | | | | | Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* eliminate cpu_test_xyz()Jan Beulich2011-11-081-3/+3
| | | | | | Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* IRQ: allocate CPU masks dynamicallyJan Beulich2011-11-031-1/+1
| | | | | | | | | | This includes delaying the initialization of dynamically created IRQs until their actual first use and some further elimination of uses of struct irq_cfg. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* cpupools: allocate CPU masks dynamicallyJan Beulich2011-10-211-2/+2
| | | | | Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* allocate CPU sibling and core maps dynamicallyJan Beulich2011-10-211-32/+30
| | | | | | | | | | ... thus reducing the per-CPU data area size back to one page even when building for large NR_CPUS. At once eliminate the old __cpu{mask,list}_scnprintf() helpers. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* eliminate direct assignments of CPU masksJan Beulich2011-10-211-1/+2
| | | | | | | | | | | | | | | | Use cpumask_copy() instead of direct variable assignments for copying CPU masks. While direct assignments are not a problem when both sides are variables actually defined as cpumask_t (except for possibly copying *much* more than would actually need to be copied), they must not happen when the original variable is of type cpumask_var_t (which may have lass space allocated to it than a full cpumask_t). Eliminate as many of such assignments as possible (in several cases it's even possible to collapse two operations [copy then clear one bit] into one [cpumask_andnot()]), and thus set the way for reducing the allocation size in alloc_cpumask_var(). Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* eliminate cpumask accessors referencing NR_CPUSJan Beulich2011-10-211-7/+8
| | | | | | | ... in favor of using the new, nr_cpumask_bits-based ones. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* introduce and use nr_cpu_ids and nr_cpumask_bitsJan Beulich2011-10-211-1/+1
| | | | | | | | | | | | | | | The former is the runtime equivalent of NR_CPUS (and users of NR_CPUS, where necessary, get adjusted accordingly), while the latter is for the sole use of determining the allocation size when dynamically allocating CPU masks (done later in this series). Adjust accessors to use either of the two to bound their bitmap operations - which one gets used depends on whether accessing the bits in the gap between nr_cpu_ids and nr_cpumask_bits is benign but more efficient. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* fold struct irq_cfg into struct irq_descJan Beulich2011-10-191-2/+2
| | | | | | | | | | | | | struct irq_cfg really has become an architecture extension to struct irq_desc, and hence it should be treated as such (rather than as IRQ chip specific data, which it was meant to be originally). For a first step, only convert a subset of the uses; subsequent patches (partly to be sent later) will aim at fully eliminating the use of the old structure type. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
* x86: clean up physid_mask_t handlingJan Beulich2011-10-141-2/+3
| | | | | | | | | | | | | | | | This eliminates passing and returning by value of this type (making it unnecessary for the compiler to create temporary variables for doing so on the stack), thus dramatically reducing the stack frame sizes of a couple of functions (was in one case over 12k for a 4095-CPU build). In one case a local variable gets converted to a static one, possible because the function gets called at most once (during early boot). Some accessors get eliminated altogether as being unused or as being equally well open coded at the place of use. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: Simplify smpboot_alloc by merging x86-{32,64} code as far asKeir Fraser2011-10-131-45/+24
| | | | | | | | | | | | | | | possible. We still need one ifdef, as x86-32 does not have a compat_gdt_table. On x86-32 there is 1/2-page wastage due to allocating a whole page for the per-CPU IDT, however we expect very few users of the x86-32 hypervisor. Those that cannot move to the 64-bit hypervisor are likely using old single-processor systems or new single-procesor netbooks. On UP and small MP systems, the wastage is insignificant. Signed-off-by: Keir Fraser <keir@xen.org> Committed-by: Keir Fraser <keir@xen.org>
* x86-64: don't use xmalloc_array() for allocation of the (per-CPU) IDTsJan Beulich2011-10-131-6/+14
| | | | | | | | | | | | | | | | | | The IDTs being exactly a page in size, using xmalloc() here is rather inefficient, as this requires double the amount to be allocated (with almost an entire page wasted). For hot plugged CPUs, this at once eliminates one more non-order-zero runtime allocation. For x86-32, however, the IDT is exactly half a page, so allocating a full page seems wasteful here, so it continues to use xmalloc() as before. With most of the affected functions' bodies now being inside #ifdef-s, it might be reasonable to split those parts out into subarch-specific code... Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
* x86: make run-time part of trampoline relocatableJan Beulich2011-08-191-0/+2
| | | | | | | | | | | | | | In order to eliminate an initial hack in the EFI boot code (where memory for the trampoline was just "claimed" instead of properly allocated), the trampoline code must no longer make assumption on the address at which it would be located. For the time being, the fixed address is being retained for the traditional multiboot path. As an additional benefit (at least from my pov) it allows confining the visibility of the BOOT_TRAMPOLINE definition to just the boot code. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: Remove timeouts from INIT-SIPI-SIPI sequence when using x2apic.Tim Deegan2011-07-191-30/+33
| | | | | | | | | Some of the timeouts are pointless since they're waiting for the ICR to ack the IPI delivery and that doesn't happen on x2apic. The others should be benign (and are suggested in the SDM) but removing them makes AP bringup much more reliable on some test boxes. Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
* cpuidle: initialize default Cstate informationKevin Tian2011-07-081-1/+0
| | | | | | | | | C0/C1 should be always available when cpuidle is enabled in Xen. When there's case that Dom0 doesn't register ACPI Cstate information, e.g. due to BIOS issue or acpi processor module is not installed, this patch provides basic C0/C1 information available to xenpm tool. Signed-off-by: Kevin Tian <kevin.tian@intel.com>
* x86: AMD core-pair topology detection codeWei Huang2011-06-281-7/+16
| | | | | | | | | | | This patch is to support core-pair topology introduced by AMD CPUs, which introduces a new concept of [core, compute unit]. There is a new feature bit for topology extension in CPUID:0x80000001. Also a new CPUID 0x8000001E is introduced for CPU topology enumeration. This patch collects the sibling information from the new CPUID and will be stored in the sibling map in Xen hypervisor. Signed-off-by: Wei Huang <wei.huang2@amd.com>
* x86: consolidate cpu_core_id and phys_proc_id into cpuinfo_x86 structWei Huang2011-06-281-11/+5
| | | | | | | This patch moves cpu_core_id and phys_proc_id into cpuinfo_x86 structure. This is similar to upstream Linux kernel's approach. Signed-off-by: Wei Huang <wei.huang2@amd.com>
* x86: Fix argument checking in (privileged) function cpu_add().Keir Fraser2011-06-101-1/+3
| | | | | | Thanks to John McDermott <john.mcdermott@nrl.navy.mil> for spotting. Signed-off-by: Keir Fraser <keir@xen.org>
* xen: remove extern function declarations from C files.Tim Deegan2011-05-261-2/+0
| | | | | | | | Move all extern declarations into appropriate header files. This also fixes up a few places where the caller and the definition had different signatures. Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
* x86/tsc: Remove incorrect assertion from cstate_restore_tsc()...Keir Fraser2011-05-161-1/+6
| | | | | | ..fix and move to write_tsc(). Signed-off-by: Keir Fraser <keir@xen.org>
* A little bit of SMP boot code cleanupJan Beulich2011-05-011-1/+1
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: don't write_tsc() non-zero values on CPUs updating only the lower 32 bitsKeir Fraser2011-04-151-0/+13
| | | | | | | | | | This means suppressing the uses in time_calibration_tsc_rendezvous(), cstate_restore_tsc(), and synchronize_tsc_slave(), and fixes a boot hang of Linux Dom0 when loading processor.ko on such systems that have support for C states above C1. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Keir Fraser <keir@xen.org>
* x86: remove pre-686 CPU support bitsJan Beulich2011-03-091-14/+0
| | | | | | | ... as Xen doesn't run on such CPUs anyway. Clearly these bits were particularly odd to have on x86-64. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: cleanup mpparse.cJan Beulich2011-03-091-1/+1
| | | | | | | | Remove unused and pointless bits from mpparse.c (and other files where they are related to it). Of what remains, move whatever possible into .init.*, and some data items into .data.read_mostly. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: Cache read of cpu_state in __cpu_die() for subsequent BUG_ON check.Keir Fraser2011-03-051-2/+3
| | | | | | | | Otherwise compiler may re-read cpu_state for the BUG_ON and see a modified value causing erroneous BUG. Signed-off-by: Keir Fraser <keir@xen.org> Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
* x86: On CPU offline, fix master waiting for slave to be fully dead.Keir Fraser2011-03-051-1/+5
| | | | | | | | | | | | | | On two back-to-back CPU offline operations, on second offline the cpu_state var will be CPU_STATE_DEAD from the first offline. Hence __cpu_die() will incorrectly not wait for the second slave to fully die and set cpu_state itself. The fix is to set cpu_state to a new value, CPU_STATE_DYING, earlier during CPU offline, before __cpu_die() starts to execute. Original diagnosis and patch by Liu, Jinsong <jinsong.liu@intel.com> Signed-off-by: Keir Fraser <keir@xen.org>
* x86: adjust x2apic section placementKeir Fraser2010-12-151-1/+1
| | | | Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: increase MAX_LOCAL_APICKeir Fraser2010-12-151-3/+4
| | | | | | | | | | | | | | | | | | | | otherwise apicid_to_node[MAX_LOCAL_APIC] will be overrun if apicid > 255. After patch, the mapping get right. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Make this and also MAX_MADT_ENTRIES loosely depend on NR_CPUS. Tie MAX_APICS to MAX_LOCAL_APIC. Fix initializer of x86_acpiid_to_apicid[] to match the array member type of u32, as well as all checks in readers of this array and x86_cpu_to_apicid[]. While the adjustment to xen_vcpu_physid_to_x86_{acpi,apic}id() is not backward compatible, I think it should still be done this way as the former reserving of values beyond 0xff should never have been part of the interface. If considered impossible, a second best solution would appear to be to make the macros depend on __XEN_INTERFACE_VERSION__. Signed-off-by: Jan Beulich <jbeulich@novell.com>
* x86: x2apic: Large cleanupKeir Fraser2010-12-091-2/+1
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* Add CPU_STARTING notifier during CPU bringup.Keir Fraser2010-12-091-3/+4
| | | | Signed-off-by: Keir Fraser <keir@xen.org>
* x86_64: Make 32-bit-hypercall translate area per-vcpu.Keir Fraser2010-11-161-9/+0
| | | | | | | This is a prerequisite for allowing guest descheduling within a hypercall. Signed-off-by: Keir Fraser <keir@xen.org>
* Fix serial interrupt's destinationKeir Fraser2010-09-131-1/+1
| | | | | | | | Lowest Priority can't use with invalid cpu_mask, and the default value of CPU_MASK_ALL may cover CPU which wasn't online. From: "Yang, Sheng" <sheng.yang@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* Rename irq_cfg->domain to irq_cfg->cpu_maskKeir Fraser2010-08-301-1/+1
| | | | | From: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: Small APIC timer initialisation cleanupKeir Fraser2010-06-071-1/+1
| | | | Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: On CPU offline, freed stack should be *un*guarded.Keir Fraser2010-06-021-1/+1
| | | | | | Fix stupid typo. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
* x86: During cpu offline, cpu_disable_scheduler() cannot fail.Keir Fraser2010-06-011-1/+2
| | | | | | BUG on this scenario. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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