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| author | Keir Fraser <keir@xen.org> | 2011-04-15 08:52:08 +0100 |
|---|---|---|
| committer | Keir Fraser <keir@xen.org> | 2011-04-15 08:52:08 +0100 |
| commit | 8d24303023ec82d94f97154785302d52e9917f91 (patch) | |
| tree | e28fc5abc76a74469c7258d6efe7f724ad951449 /xen/arch/x86/smpboot.c | |
| parent | 486fa85e92c675a03e9bc482e02d7af2d00dc81e (diff) | |
| download | xen-8d24303023ec82d94f97154785302d52e9917f91.tar.gz xen-8d24303023ec82d94f97154785302d52e9917f91.tar.bz2 xen-8d24303023ec82d94f97154785302d52e9917f91.zip | |
x86: don't write_tsc() non-zero values on CPUs updating only the lower 32 bits
This means suppressing the uses in time_calibration_tsc_rendezvous(),
cstate_restore_tsc(), and synchronize_tsc_slave(), and fixes a boot
hang of Linux Dom0 when loading processor.ko on such systems that
have support for C states above C1.
Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Keir Fraser <keir@xen.org>
Diffstat (limited to 'xen/arch/x86/smpboot.c')
| -rw-r--r-- | xen/arch/x86/smpboot.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 530ccd2399..82a78f54d5 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -41,6 +41,7 @@ #include <asm/flushtlb.h> #include <asm/msr.h> #include <asm/mtrr.h> +#include <asm/time.h> #include <mach_apic.h> #include <mach_wakecpu.h> #include <smpboot_hooks.h> @@ -124,6 +125,12 @@ static void smp_store_cpu_info(int id) ; } +/* + * TSC's upper 32 bits can't be written in earlier CPUs (before + * Prescott), there is no way to resync one AP against BP. + */ +bool_t disable_tsc_sync; + static atomic_t tsc_count; static uint64_t tsc_value; static cpumask_t tsc_sync_cpu_mask; @@ -132,6 +139,9 @@ static void synchronize_tsc_master(unsigned int slave) { unsigned int i; + if ( disable_tsc_sync ) + return; + if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) && !cpu_isset(slave, tsc_sync_cpu_mask) ) return; @@ -153,6 +163,9 @@ static void synchronize_tsc_slave(unsigned int slave) { unsigned int i; + if ( disable_tsc_sync ) + return; + if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) && !cpu_isset(slave, tsc_sync_cpu_mask) ) return; |