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-rw-r--r--xen/arch/x86/genapic/delivery.c4
-rw-r--r--xen/arch/x86/genapic/x2apic.c2
-rw-r--r--xen/arch/x86/i8259.c2
-rw-r--r--xen/arch/x86/io_apic.c16
-rw-r--r--xen/arch/x86/irq.c38
-rw-r--r--xen/arch/x86/msi.c2
-rw-r--r--xen/arch/x86/smpboot.c2
-rw-r--r--xen/drivers/passthrough/vtd/iommu.c2
-rw-r--r--xen/include/asm-x86/genapic.h16
-rw-r--r--xen/include/asm-x86/irq.h4
-rw-r--r--xen/include/asm-x86/mach-generic/mach_apic.h2
-rw-r--r--xen/include/xen/irq.h2
12 files changed, 46 insertions, 46 deletions
diff --git a/xen/arch/x86/genapic/delivery.c b/xen/arch/x86/genapic/delivery.c
index cbc20cb1cc..f618d75ba5 100644
--- a/xen/arch/x86/genapic/delivery.c
+++ b/xen/arch/x86/genapic/delivery.c
@@ -31,7 +31,7 @@ cpumask_t target_cpus_flat(void)
return cpu_online_map;
}
-cpumask_t vector_allocation_domain_flat(int cpu)
+cpumask_t vector_allocation_cpumask_flat(int cpu)
{
return cpu_online_map;
}
@@ -64,7 +64,7 @@ cpumask_t target_cpus_phys(void)
return cpu_online_map;
}
-cpumask_t vector_allocation_domain_phys(int cpu)
+cpumask_t vector_allocation_cpumask_phys(int cpu)
{
return cpumask_of_cpu(cpu);
}
diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c
index ae61567f59..93b9765c8a 100644
--- a/xen/arch/x86/genapic/x2apic.c
+++ b/xen/arch/x86/genapic/x2apic.c
@@ -94,7 +94,7 @@ cpumask_t target_cpus_x2apic(void)
return cpu_online_map;
}
-cpumask_t vector_allocation_domain_x2apic(int cpu)
+cpumask_t vector_allocation_cpumask_x2apic(int cpu)
{
return cpumask_of_cpu(cpu);
}
diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c
index bd9c956ef2..75e47ece60 100644
--- a/xen/arch/x86/i8259.c
+++ b/xen/arch/x86/i8259.c
@@ -392,7 +392,7 @@ void __init init_IRQ(void)
desc->handler = &i8259A_irq_type;
per_cpu(vector_irq, cpu)[FIRST_LEGACY_VECTOR + irq] = irq;
- cfg->domain = cpumask_of_cpu(cpu);
+ cfg->cpu_mask= cpumask_of_cpu(cpu);
cfg->vector = FIRST_LEGACY_VECTOR + irq;
}
diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c
index 97ccf9e266..c1445d4c30 100644
--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -412,7 +412,7 @@ fastcall void smp_irq_move_cleanup_interrupt(struct cpu_user_regs *regs)
if (!cfg->move_cleanup_count)
goto unlock;
- if (vector == cfg->vector && cpu_isset(me, cfg->domain))
+ if (vector == cfg->vector && cpu_isset(me, cfg->cpu_mask))
goto unlock;
irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
@@ -441,7 +441,7 @@ static void send_cleanup_vector(struct irq_cfg *cfg)
{
cpumask_t cleanup_mask;
- cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
+ cpus_and(cleanup_mask, cfg->old_cpu_mask, cpu_online_map);
cfg->move_cleanup_count = cpus_weight(cleanup_mask);
genapic->send_IPI_mask(&cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
@@ -460,7 +460,7 @@ void irq_complete_move(struct irq_desc **descp)
vector = get_irq_regs()->entry_vector;
me = smp_processor_id();
- if (vector == cfg->vector && cpu_isset(me, cfg->domain))
+ if (vector == cfg->vector && cpu_isset(me, cfg->cpu_mask))
send_cleanup_vector(cfg);
}
@@ -488,7 +488,7 @@ unsigned int set_desc_affinity(struct irq_desc *desc, cpumask_t mask)
return BAD_APICID;
cpus_copy(desc->affinity, mask);
- cpus_and(dest_mask, desc->affinity, cfg->domain);
+ cpus_and(dest_mask, desc->affinity, cfg->cpu_mask);
return cpu_mask_to_apicid(dest_mask);
}
@@ -638,8 +638,8 @@ void /*__init*/ setup_ioapic_dest(void)
continue;
irq = pin_2_irq(irq_entry, ioapic, pin);
cfg = irq_cfg(irq);
- BUG_ON(cpus_empty(cfg->domain));
- set_ioapic_affinity_irq(irq, cfg->domain);
+ BUG_ON(cpus_empty(cfg->cpu_mask));
+ set_ioapic_affinity_irq(irq, cfg->cpu_mask);
}
}
@@ -1003,7 +1003,7 @@ static void __init setup_IO_APIC_irqs(void)
}
cfg = irq_cfg(irq);
SET_DEST(entry.dest.dest32, entry.dest.logical.logical_dest,
- cpu_mask_to_apicid(cfg->domain));
+ cpu_mask_to_apicid(cfg->cpu_mask));
spin_lock_irqsave(&ioapic_lock, flags);
io_apic_write(apic, 0x11+2*pin, *(((int *)&entry)+1));
io_apic_write(apic, 0x10+2*pin, *(((int *)&entry)+0));
@@ -2446,7 +2446,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
rte.vector = cfg->vector;
SET_DEST(rte.dest.dest32, rte.dest.logical.logical_dest,
- cpu_mask_to_apicid(cfg->domain));
+ cpu_mask_to_apicid(cfg->cpu_mask));
io_apic_write(apic, 0x10 + 2 * pin, *(((int *)&rte) + 0));
io_apic_write(apic, 0x11 + 2 * pin, *(((int *)&rte) + 1));
diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index a6bb226eb3..7fd967be8a 100644
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -74,39 +74,39 @@ void unlock_vector_lock(void)
spin_unlock(&vector_lock);
}
-static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
+static int __bind_irq_vector(int irq, int vector, cpumask_t cpu_mask)
{
- cpumask_t mask;
+ cpumask_t online_mask;
int cpu;
struct irq_cfg *cfg = irq_cfg(irq);
BUG_ON((unsigned)irq >= nr_irqs);
BUG_ON((unsigned)vector >= NR_VECTORS);
- cpus_and(mask, domain, cpu_online_map);
- if (cpus_empty(mask))
+ cpus_and(online_mask, cpu_mask, cpu_online_map);
+ if (cpus_empty(online_mask))
return -EINVAL;
- if ((cfg->vector == vector) && cpus_equal(cfg->domain, mask))
+ if ((cfg->vector == vector) && cpus_equal(cfg->cpu_mask, online_mask))
return 0;
if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
return -EBUSY;
- for_each_cpu_mask(cpu, mask)
+ for_each_cpu_mask(cpu, online_mask)
per_cpu(vector_irq, cpu)[vector] = irq;
cfg->vector = vector;
- cfg->domain = mask;
+ cfg->cpu_mask = online_mask;
irq_status[irq] = IRQ_USED;
if (IO_APIC_IRQ(irq))
irq_vector[irq] = vector;
return 0;
}
-int bind_irq_vector(int irq, int vector, cpumask_t domain)
+int bind_irq_vector(int irq, int vector, cpumask_t cpu_mask)
{
unsigned long flags;
int ret;
spin_lock_irqsave(&vector_lock, flags);
- ret = __bind_irq_vector(irq, vector, domain);
+ ret = __bind_irq_vector(irq, vector, cpu_mask);
spin_unlock_irqrestore(&vector_lock, flags);
return ret;
}
@@ -179,13 +179,13 @@ static void __clear_irq_vector(int irq)
BUG_ON(!cfg->vector);
vector = cfg->vector;
- cpus_and(tmp_mask, cfg->domain, cpu_online_map);
+ cpus_and(tmp_mask, cfg->cpu_mask, cpu_online_map);
for_each_cpu_mask(cpu, tmp_mask)
per_cpu(vector_irq, cpu)[vector] = -1;
cfg->vector = IRQ_VECTOR_UNASSIGNED;
- cpus_clear(cfg->domain);
+ cpus_clear(cfg->cpu_mask);
init_one_irq_status(irq);
if (likely(!cfg->move_in_progress))
@@ -257,8 +257,8 @@ static void init_one_irq_status(int irq)
static void init_one_irq_cfg(struct irq_cfg *cfg)
{
cfg->vector = IRQ_VECTOR_UNASSIGNED;
- cpus_clear(cfg->domain);
- cpus_clear(cfg->old_domain);
+ cpus_clear(cfg->cpu_mask);
+ cpus_clear(cfg->old_cpu_mask);
}
int init_irq_data(void)
@@ -354,7 +354,7 @@ int __assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask)
old_vector = irq_to_vector(irq);
if (old_vector) {
cpus_and(tmp_mask, mask, cpu_online_map);
- cpus_and(tmp_mask, cfg->domain, tmp_mask);
+ cpus_and(tmp_mask, cfg->cpu_mask, tmp_mask);
if (!cpus_empty(tmp_mask)) {
cfg->vector = old_vector;
return 0;
@@ -369,7 +369,7 @@ int __assign_irq_vector(int irq, struct irq_cfg *cfg, cpumask_t mask)
int new_cpu;
int vector, offset;
- tmp_mask = vector_allocation_domain(cpu);
+ tmp_mask = vector_allocation_cpumask(cpu);
cpus_and(tmp_mask, tmp_mask, cpu_online_map);
vector = current_vector;
@@ -395,12 +395,12 @@ next:
current_offset = offset;
if (old_vector) {
cfg->move_in_progress = 1;
- cpus_copy(cfg->old_domain, cfg->domain);
+ cpus_copy(cfg->old_cpu_mask, cfg->cpu_mask);
}
for_each_cpu_mask(new_cpu, tmp_mask)
per_cpu(vector_irq, new_cpu)[vector] = irq;
cfg->vector = vector;
- cpus_copy(cfg->domain, tmp_mask);
+ cpus_copy(cfg->cpu_mask, tmp_mask);
irq_status[irq] = IRQ_USED;
if (IO_APIC_IRQ(irq))
@@ -424,7 +424,7 @@ int assign_irq_vector(int irq)
ret = __assign_irq_vector(irq, cfg, TARGET_CPUS);
if (!ret) {
ret = cfg->vector;
- cpus_copy(desc->affinity, cfg->domain);
+ cpus_copy(desc->affinity, cfg->cpu_mask);
}
spin_unlock_irqrestore(&vector_lock, flags);
return ret;
@@ -445,7 +445,7 @@ void __setup_vector_irq(int cpu)
/* Mark the inuse vectors */
for (irq = 0; irq < nr_irqs; ++irq) {
cfg = irq_cfg(irq);
- if (!cpu_isset(cpu, cfg->domain))
+ if (!cpu_isset(cpu, cfg->cpu_mask))
continue;
vector = irq_to_vector(irq);
per_cpu(vector_irq, cpu)[vector] = irq;
diff --git a/xen/arch/x86/msi.c b/xen/arch/x86/msi.c
index 1c8ad26c3d..9f944a45a0 100644
--- a/xen/arch/x86/msi.c
+++ b/xen/arch/x86/msi.c
@@ -124,7 +124,7 @@ void msi_compose_msg(struct pci_dev *pdev, int irq,
cpumask_t domain;
struct irq_cfg *cfg = irq_cfg(irq);
int vector = cfg->vector;
- domain = cfg->domain;
+ domain = cfg->cpu_mask;
if ( cpus_empty( domain ) ) {
dprintk(XENLOG_ERR,"%s, compose msi message error!!\n", __func__);
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 6c007afbef..baae4f3584 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -1015,7 +1015,7 @@ void __init smp_intr_init(void)
irq_vector[irq] = FIRST_HIPRIORITY_VECTOR + seridx + 1;
per_cpu(vector_irq, cpu)[FIRST_HIPRIORITY_VECTOR + seridx + 1] = irq;
irq_cfg[irq].vector = FIRST_HIPRIORITY_VECTOR + seridx + 1;
- irq_cfg[irq].domain = (cpumask_t)CPU_MASK_ALL;
+ irq_cfg[irq].cpu_mask = (cpumask_t)CPU_MASK_ALL;
}
/* IPI for cleanuping vectors after irq move */
diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c
index f33bce8bef..c1bf71b843 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1837,7 +1837,7 @@ static int init_vtd_hw(void)
}
cfg = irq_cfg(iommu->irq);
- dma_msi_set_affinity(iommu->irq, cfg->domain);
+ dma_msi_set_affinity(iommu->irq, cfg->cpu_mask);
clear_fault_bits(iommu);
diff --git a/xen/include/asm-x86/genapic.h b/xen/include/asm-x86/genapic.h
index bcd03aed84..bd8debb8d5 100644
--- a/xen/include/asm-x86/genapic.h
+++ b/xen/include/asm-x86/genapic.h
@@ -34,7 +34,7 @@ struct genapic {
void (*init_apic_ldr)(void);
void (*clustered_apic_check)(void);
cpumask_t (*target_cpus)(void);
- cpumask_t (*vector_allocation_domain)(int cpu);
+ cpumask_t (*vector_allocation_cpumask)(int cpu);
unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
void (*send_IPI_mask)(const cpumask_t *mask, int vector);
void (*send_IPI_self)(int vector);
@@ -58,14 +58,14 @@ cpumask_t target_cpus_flat(void);
unsigned int cpu_mask_to_apicid_flat(cpumask_t cpumask);
void send_IPI_mask_flat(const cpumask_t *mask, int vector);
void send_IPI_self_flat(int vector);
-cpumask_t vector_allocation_domain_flat(int cpu);
+cpumask_t vector_allocation_cpumask_flat(int cpu);
#define GENAPIC_FLAT \
.int_delivery_mode = dest_LowestPrio, \
.int_dest_mode = 1 /* logical delivery */, \
.init_apic_ldr = init_apic_ldr_flat, \
.clustered_apic_check = clustered_apic_check_flat, \
.target_cpus = target_cpus_flat, \
- .vector_allocation_domain = vector_allocation_domain_flat, \
+ .vector_allocation_cpumask = vector_allocation_cpumask_flat, \
.cpu_mask_to_apicid = cpu_mask_to_apicid_flat, \
.send_IPI_mask = send_IPI_mask_flat, \
.send_IPI_self = send_IPI_self_flat
@@ -80,14 +80,14 @@ unsigned int cpu_mask_to_apicid_x2apic_cluster(cpumask_t cpumask);
void send_IPI_mask_x2apic_phys(const cpumask_t *mask, int vector);
void send_IPI_mask_x2apic_cluster(const cpumask_t *mask, int vector);
void send_IPI_self_x2apic(int vector);
-cpumask_t vector_allocation_domain_x2apic(int cpu);
+cpumask_t vector_allocation_cpumask_x2apic(int cpu);
#define GENAPIC_X2APIC_PHYS \
.int_delivery_mode = dest_Fixed, \
.int_dest_mode = 0 /* physical delivery */, \
.init_apic_ldr = init_apic_ldr_x2apic_phys, \
.clustered_apic_check = clustered_apic_check_x2apic, \
.target_cpus = target_cpus_x2apic, \
- .vector_allocation_domain = vector_allocation_domain_x2apic, \
+ .vector_allocation_cpumask = vector_allocation_cpumask_x2apic, \
.cpu_mask_to_apicid = cpu_mask_to_apicid_x2apic_phys, \
.send_IPI_mask = send_IPI_mask_x2apic_phys, \
.send_IPI_self = send_IPI_self_x2apic
@@ -98,7 +98,7 @@ cpumask_t vector_allocation_domain_x2apic(int cpu);
.init_apic_ldr = init_apic_ldr_x2apic_cluster, \
.clustered_apic_check = clustered_apic_check_x2apic, \
.target_cpus = target_cpus_x2apic, \
- .vector_allocation_domain = vector_allocation_domain_x2apic, \
+ .vector_allocation_cpumask = vector_allocation_cpumask_x2apic, \
.cpu_mask_to_apicid = cpu_mask_to_apicid_x2apic_cluster, \
.send_IPI_mask = send_IPI_mask_x2apic_cluster, \
.send_IPI_self = send_IPI_self_x2apic
@@ -109,14 +109,14 @@ cpumask_t target_cpus_phys(void);
unsigned int cpu_mask_to_apicid_phys(cpumask_t cpumask);
void send_IPI_mask_phys(const cpumask_t *mask, int vector);
void send_IPI_self_phys(int vector);
-cpumask_t vector_allocation_domain_phys(int cpu);
+cpumask_t vector_allocation_cpumask_phys(int cpu);
#define GENAPIC_PHYS \
.int_delivery_mode = dest_Fixed, \
.int_dest_mode = 0 /* physical delivery */, \
.init_apic_ldr = init_apic_ldr_phys, \
.clustered_apic_check = clustered_apic_check_phys, \
.target_cpus = target_cpus_phys, \
- .vector_allocation_domain = vector_allocation_domain_phys, \
+ .vector_allocation_cpumask = vector_allocation_cpumask_phys, \
.cpu_mask_to_apicid = cpu_mask_to_apicid_phys, \
.send_IPI_mask = send_IPI_mask_phys, \
.send_IPI_self = send_IPI_self_phys
diff --git a/xen/include/asm-x86/irq.h b/xen/include/asm-x86/irq.h
index efbfb8fa19..d94647be29 100644
--- a/xen/include/asm-x86/irq.h
+++ b/xen/include/asm-x86/irq.h
@@ -25,8 +25,8 @@
struct irq_cfg {
int vector;
- cpumask_t domain;
- cpumask_t old_domain;
+ cpumask_t cpu_mask;
+ cpumask_t old_cpu_mask;
unsigned move_cleanup_count;
u8 move_in_progress : 1;
};
diff --git a/xen/include/asm-x86/mach-generic/mach_apic.h b/xen/include/asm-x86/mach-generic/mach_apic.h
index ecf96d47c2..845f25536b 100644
--- a/xen/include/asm-x86/mach-generic/mach_apic.h
+++ b/xen/include/asm-x86/mach-generic/mach_apic.h
@@ -16,7 +16,7 @@
#define init_apic_ldr (genapic->init_apic_ldr)
#define clustered_apic_check (genapic->clustered_apic_check)
#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
-#define vector_allocation_domain(cpu) (genapic->vector_allocation_domain(cpu))
+#define vector_allocation_cpumask(cpu) (genapic->vector_allocation_cpumask(cpu))
static inline void enable_apic_mode(void)
{
diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 2faa8c37b3..2ae5a43d42 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -117,7 +117,7 @@ extern int request_irq_vector(unsigned int vector,
struct irq_cfg {
int vector;
- cpumask_t domain;
+ cpumask_t cpu_mask;
};
extern struct irq_cfg irq_cfg[];
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-23 20:01:41 +0000