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-rw-r--r--xen/arch/arm/head.S13
-rw-r--r--xen/include/asm-arm/cpregs.h1
2 files changed, 14 insertions, 0 deletions
diff --git a/xen/arch/arm/head.S b/xen/arch/arm/head.S
index 48f8f3fd8a..5b5034b7bf 100644
--- a/xen/arch/arm/head.S
+++ b/xen/arch/arm/head.S
@@ -61,6 +61,19 @@ start:
add r8, r10 /* r8 := paddr(DTB) */
#endif
+ /* Are we the boot CPU? */
+ mrc CP32(r0, MPIDR)
+ tst r0, #(1<<31) /* Multiprocessor extension supported? */
+ beq boot_cpu
+ tst r0, #(1<<30) /* Uniprocessor system? */
+ bne boot_cpu
+ bics r0, r0, #(0xff << 24) /* Ignore flags */
+ beq boot_cpu /* If all other fields are 0, we win */
+
+1: wfi
+ b 1b
+
+boot_cpu:
#ifdef EARLY_UART_ADDRESS
/* Say hello */
ldr r11, =EARLY_UART_ADDRESS /* r11 := UART base address */
diff --git a/xen/include/asm-arm/cpregs.h b/xen/include/asm-arm/cpregs.h
index d61ea88c5c..f6e71eb8f9 100644
--- a/xen/include/asm-arm/cpregs.h
+++ b/xen/include/asm-arm/cpregs.h
@@ -91,6 +91,7 @@
/* Coprocessor 15 */
/* CP15 CR0: CPUID and Cache Type Registers */
+#define MPIDR p15,0,c0,c0,5 /* Multiprocessor Affinity Register */
#define ID_PFR0 p15,0,c0,c1,0 /* Processor Feature Register 0 */
#define ID_PFR1 p15,0,c0,c1,1 /* Processor Feature Register 1 */
#define ID_DFR0 p15,0,c0,c1,2 /* Debug Feature Register 0 */