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authorJan Beulich <jbeulich@suse.com>2013-07-17 08:47:18 +0200
committerJan Beulich <jbeulich@suse.com>2013-07-17 08:47:18 +0200
commit303066fdb1e4fe816e48acd665453f58b8399e81 (patch)
tree61cd57057814cf581bc20e42476b702f8e9f8cdf /xen/include/asm-x86
parent85047d9e4f4afeb73bca1e98f705a2f4f1d51c03 (diff)
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VMX: fix interaction of APIC-V and Viridian emulation
Viridian using a synthetic MSR for issuing EOI notifications bypasses the normal in-processor handling, which would clear GUEST_INTR_STATUS.SVI. Hence we need to do this in software in order for future interrupts to get delivered. Based on analysis by Yang Z Zhang <yang.z.zhang@intel.com>. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Yang Zhang <yang.z.zhang@intel.com>
Diffstat (limited to 'xen/include/asm-x86')
-rw-r--r--xen/include/asm-x86/hvm/hvm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h
index 84084209a2..00489cfc73 100644
--- a/xen/include/asm-x86/hvm/hvm.h
+++ b/xen/include/asm-x86/hvm/hvm.h
@@ -186,6 +186,7 @@ struct hvm_function_table {
void (*process_isr)(int isr, struct vcpu *v);
void (*deliver_posted_intr)(struct vcpu *v, u8 vector);
void (*sync_pir_to_irr)(struct vcpu *v);
+ void (*handle_eoi)(u8 vector);
/*Walk nested p2m */
int (*nhvm_hap_walk_L1_p2m)(struct vcpu *v, paddr_t L2_gpa,