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authorKeir Fraser <keir.fraser@citrix.com>2007-11-21 14:36:07 +0000
committerKeir Fraser <keir.fraser@citrix.com>2007-11-21 14:36:07 +0000
commit539c329f1f77c98963bbc88bb3144d0128261bfa (patch)
tree78dff2ab2967c358696cf9aa0410e258165560d5 /xen/include/asm-x86/system.h
parent07dd618798bf97a19e5632329f68422378e0ea99 (diff)
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x86: rmb() can be weakened according to new Intel spec.
Both Intel and AMD agree that, from a programmer's viewpoint: Loads cannot be reordered relative to other loads. Stores cannot be reordered relative to other stores. Intel64 Architecture Memory Ordering White Paper <http://developer.intel.com/products/processor/manuals/318147.pdf> AMD64 Architecture Programmer's Manual, Volume 2: System Programming <http://www.amd.com/us-en/assets/content_type/\ white_papers_and_tech_docs/24593.pdf> Signed-off-by: Keir Fraser <keir.fraser@eu.citrix.com>
Diffstat (limited to 'xen/include/asm-x86/system.h')
-rw-r--r--xen/include/asm-x86/system.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/xen/include/asm-x86/system.h b/xen/include/asm-x86/system.h
index 1217002643..c257513dad 100644
--- a/xen/include/asm-x86/system.h
+++ b/xen/include/asm-x86/system.h
@@ -135,6 +135,21 @@ static always_inline unsigned long __cmpxchg(
#define __HAVE_ARCH_CMPXCHG
+/*
+ * Both Intel and AMD agree that, from a programmer's viewpoint:
+ * Loads cannot be reordered relative to other loads.
+ * Stores cannot be reordered relative to other stores.
+ *
+ * Intel64 Architecture Memory Ordering White Paper
+ * <http://developer.intel.com/products/processor/manuals/318147.pdf>
+ *
+ * AMD64 Architecture Programmer's Manual, Volume 2: System Programming
+ * <http://www.amd.com/us-en/assets/content_type/\
+ * white_papers_and_tech_docs/24593.pdf>
+ */
+#define rmb() barrier()
+#define wmb() barrier()
+
#ifdef CONFIG_SMP
#define smp_mb() mb()
#define smp_rmb() rmb()